From: Carl Love Date: Mon, 20 Jul 2015 22:22:42 +0000 (+0000) Subject: Patch 7 of 7, improve PPC HW capabiltiy checking. X-Git-Tag: svn/VALGRIND_3_11_0~222 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=059aa611c13fd462f71a1df1af808c19f0029898;p=thirdparty%2Fvalgrind.git Patch 7 of 7, improve PPC HW capabiltiy checking. The patch was submitted by Will Schmidt (will_schmidt@vnet.ibm.com). A handful of cosmetic changes to the ppc32 and ppc64 makefiles. Cleans up some whitespace issues, spaces/tabs/etc, Rearranges some of the contents so they are logically group, and more consistent between the 32- and 64- bit versions of the same. Bugzilla 34979 git-svn-id: svn://svn.valgrind.org/valgrind/trunk@15425 --- diff --git a/none/tests/ppc32/Makefile.am b/none/tests/ppc32/Makefile.am index 763846057a..196239e0b9 100644 --- a/none/tests/ppc32/Makefile.am +++ b/none/tests/ppc32/Makefile.am @@ -9,12 +9,12 @@ EXTRA_DIST = \ bug139050-ppc32.stdout.exp bug139050-ppc32.stderr.exp \ bug139050-ppc32.vgtest \ ldstrev.stderr.exp ldstrev.stdout.exp ldstrev.vgtest \ - lsw.stderr.exp lsw.stdout.exp lsw.vgtest \ jm-int.stderr.exp jm-int.stdout.exp jm-int.vgtest \ jm-fp.stderr.exp jm-fp.stdout.exp jm-fp.vgtest jm-fp.stdout.exp-BE2 \ jm-vmx.stderr.exp jm-vmx.stdout.exp jm-vmx.stdout.exp_Minus_nan \ jm-vmx.vgtest \ jm-misc.stderr.exp jm-misc.stdout.exp jm-misc.vgtest \ + lsw.stderr.exp lsw.stdout.exp lsw.vgtest \ mftocrf.stderr.exp mftocrf.stdout.exp mftocrf.vgtest \ mcrfs.stderr.exp mcrfs.stdout.exp mcrfs.vgtest \ round.stderr.exp round.stdout.exp round.vgtest \ @@ -40,31 +40,25 @@ EXTRA_DIST = \ test_dfp5.stderr.exp test_dfp5.stdout.exp test_dfp5.vgtest \ jm_vec_isa_2_07.stderr.exp jm_vec_isa_2_07.stdout.exp jm_vec_isa_2_07.vgtest \ jm_fp_isa_2_07.stderr.exp jm_fp_isa_2_07.stdout.exp jm_fp_isa_2_07.vgtest \ - jm_int_isa_2_07.stdout.exp \ jm_int_isa_2_07.stderr.exp jm_int_isa_2_07.vgtest \ + jm_int_isa_2_07.stdout.exp \ test_isa_2_07_part2.stderr.exp test_isa_2_07_part2.stdout.exp test_isa_2_07_part2.vgtest \ test_tm.stderr.exp test_tm.stdout.exp test_tm.vgtest \ test_touch_tm.stderr.exp test_touch_tm.stdout.exp test_touch_tm.vgtest \ ldst_multiple.stderr.exp ldst_multiple.stdout.exp ldst_multiple.vgtest \ data-cache-instructions.stderr.exp data-cache-instructions.stdout.exp data-cache-instructions.vgtest - check_PROGRAMS = \ allexec \ - bug129390-ppc32 \ - bug139050-ppc32 \ - ldstrev lsw jm-insns mftocrf mcrfs round test_fx test_gx \ - testVMX twi tw xlc_dbl_u32 power5+_round power6_bcmp \ - test_isa_2_06_part1 \ - test_isa_2_06_part2 \ - test_isa_2_06_part3 \ + lsw jm-insns round \ + test_isa_2_06_part1 test_isa_2_06_part2 test_isa_2_06_part3 \ test_dfp1 test_dfp2 test_dfp3 test_dfp4 test_dfp5 \ - test_isa_2_07_part1 \ - test_isa_2_07_part2 \ - test_tm \ - test_touch_tm \ - ldst_multiple \ - data-cache-instructions + test_isa_2_07_part1 test_isa_2_07_part2 \ + test_tm test_touch_tm ldst_multiple data-cache-instructions \ + test_fx test_gx \ + testVMX twi tw xlc_dbl_u32 power5+_round power6_bcmp \ + bug129390-ppc32 bug139050-ppc32 \ + ldstrev mftocrf mcrfs AM_CFLAGS += @FLAG_M32@ AM_CXXFLAGS += @FLAG_M32@ @@ -132,16 +126,13 @@ test_dfp2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \ @FLAG_M32@ $(BUILD_FLAGS_DFP) test_dfp3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \ @FLAG_M32@ $(BUILD_FLAGS_DFP) - test_dfp4_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \ @FLAG_M32@ $(BUILD_FLAGS_DFP) - test_dfp5_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \ @FLAG_M32@ $(BUILD_FLAGS_DFP) test_isa_2_07_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \ - @FLAG_M32@ $(BUILD_FLAGS_ISA_2_07) - + @FLAG_M32@ $(BUILD_FLAGS_ISA_2_07) test_isa_2_07_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \ @FLAG_M32@ $(BUILD_FLAGS_ISA_2_07) diff --git a/none/tests/ppc64/Makefile.am b/none/tests/ppc64/Makefile.am index cc1fef42c6..a4f71e2624 100644 --- a/none/tests/ppc64/Makefile.am +++ b/none/tests/ppc64/Makefile.am @@ -17,7 +17,8 @@ EXTRA_DIST = \ opcodes.h \ power6_bcmp.stderr.exp power6_bcmp.stdout.exp power6_bcmp.vgtest \ power6_mf_gpr.stderr.exp power6_mf_gpr.stdout.exp power6_mf_gpr.vgtest \ - test_isa_2_06_part1.stderr.exp test_isa_2_06_part1.stdout.exp test_isa_2_06_part1.vgtest test_isa_2_06_part1.stdout.exp-LE \ + test_isa_2_06_part1.stderr.exp test_isa_2_06_part1.stdout.exp test_isa_2_06_part1.vgtest \ + test_isa_2_06_part1.stdout.exp-LE \ test_isa_2_06_part2.stderr.exp test_isa_2_06_part2.stdout.exp test_isa_2_06_part2.vgtest \ test_isa_2_06_part3.stderr.exp test_isa_2_06_part3.stdout.exp test_isa_2_06_part3.vgtest \ test_dfp1.stderr.exp test_dfp1.stdout.exp test_dfp1.vgtest \ @@ -38,11 +39,14 @@ EXTRA_DIST = \ check_PROGRAMS = \ allexec \ - jm-insns lsw round std_reg_imm twi_tdi tw_td power6_bcmp \ - power6_mf_gpr test_isa_2_06_part1 test_isa_2_06_part2 \ - test_isa_2_06_part3 test_dfp1 test_dfp2 test_dfp3 test_dfp4 \ - test_dfp5 test_isa_2_07_part1 test_isa_2_07_part2 \ - test_tm test_touch_tm ldst_multiple data-cache-instructions + lsw jm-insns round \ + test_isa_2_06_part1 test_isa_2_06_part2 test_isa_2_06_part3 \ + test_dfp1 test_dfp2 test_dfp3 test_dfp4 test_dfp5 \ + test_isa_2_07_part1 test_isa_2_07_part2 \ + test_tm test_touch_tm ldst_multiple data-cache-instructions \ + power6_mf_gpr std_reg_imm \ + twi_tdi tw_td power6_bcmp + AM_CFLAGS += @FLAG_M64@ AM_CXXFLAGS += @FLAG_M64@ @@ -86,6 +90,9 @@ if SUPPORTS_HTM HTM_FLAG = -mhtm -DSUPPORTS_HTM endif +jm_insns_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames \ + @FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_ALTIVEC) + test_isa_2_06_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \ @FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX) @@ -95,26 +102,19 @@ test_isa_2_06_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_ test_isa_2_06_part3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \ @FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX) -jm_insns_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames \ - @FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_ALTIVEC) - test_dfp1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \ @FLAG_M64@ $(BUILD_FLAGS_DFP) - test_dfp2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \ @FLAG_M64@ $(BUILD_FLAGS_DFP) test_dfp3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \ @FLAG_M64@ $(BUILD_FLAGS_DFP) - test_dfp4_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \ @FLAG_M64@ $(BUILD_FLAGS_DFP) - test_dfp5_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \ @FLAG_M64@ $(BUILD_FLAGS_DFP) test_isa_2_07_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \ @FLAG_M64@ $(BUILD_FLAGS_ISA_2_07) - test_isa_2_07_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \ @FLAG_M64@ $(BUILD_FLAGS_ISA_2_07)