From: Marc Zyngier Date: Tue, 13 May 2025 17:28:16 +0000 (+0100) Subject: irqchip/msi-lib: Honour the MSI_FLAG_NO_AFFINITY flag X-Git-Tag: v6.16-rc1~186^2~4 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=06526443a34c06879664eb5ae247c5e93dde7ed9;p=thirdparty%2Fkernel%2Flinux.git irqchip/msi-lib: Honour the MSI_FLAG_NO_AFFINITY flag Bad MSI implementations multiplex MSIs onto a single downstream interrupt, meaning they have no concept of individual affinity. The old MSI code did a reasonable job at this by honouring the MSI_FLAG_NO_AFFINITY, but the new shiny device MSI code doesn't. Teach it about the sad reality of existing hardware. Signed-off-by: Marc Zyngier Signed-off-by: Thomas Gleixner Link: https://lore.kernel.org/all/20250513172819.2216709-7-maz@kernel.org --- diff --git a/drivers/irqchip/irq-msi-lib.c b/drivers/irqchip/irq-msi-lib.c index 2a61c06c4da07..246c30205af40 100644 --- a/drivers/irqchip/irq-msi-lib.c +++ b/drivers/irqchip/irq-msi-lib.c @@ -105,8 +105,13 @@ bool msi_lib_init_dev_msi_info(struct device *dev, struct irq_domain *domain, * MSI message into the hardware which is the whole purpose of the * device MSI domain aside of mask/unmask which is provided e.g. by * PCI/MSI device domains. + * + * The exception to the rule is when the underlying domain + * tells you that affinity is not a thing -- for example when + * everything is muxed behind a single interrupt. */ - chip->irq_set_affinity = msi_domain_set_affinity; + if (!chip->irq_set_affinity && !(info->flags & MSI_FLAG_NO_AFFINITY)) + chip->irq_set_affinity = msi_domain_set_affinity; return true; } EXPORT_SYMBOL_GPL(msi_lib_init_dev_msi_info);