From: Uros Bizjak Date: Wed, 22 Jan 2014 19:57:30 +0000 (+0100) Subject: re PR target/59880 (ix86_avoid_lea_for_addr is buggy) X-Git-Tag: releases/gcc-4.7.4~300 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=0670466dc62c2a1a7f8878b6a032c5b8a5da7d0d;p=thirdparty%2Fgcc.git re PR target/59880 (ix86_avoid_lea_for_addr is buggy) PR target/59880 * config/i386/i386.c (ix86_avoid_lea_for_addr): Return false for SImode_address_operand operands. Return false if operands[1] is a REG. Co-Authored-By: Jakub Jelinek From-SVN: r206940 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4d3f1e5fa332..8660db337f3c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2014-01-22 Uros Bizjak + Jakub Jelinek + + PR target/59880 + * config/i386/i386.c (ix86_avoid_lea_for_addr): Return false + for SImode_address_operand operands. Return false + if operands[1] is a REG. + 2014-01-21 Andrey Belevantsev Backport from mainline diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 8e0185623a38..447f6f27f144 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -16986,16 +16986,23 @@ ix86_avoid_lea_for_addr (rtx insn, rtx operands[]) int ok; /* FIXME: Handle zero-extended addresses. */ - if (GET_CODE (operands[1]) == ZERO_EXTEND - || GET_CODE (operands[1]) == AND) + if (SImode_address_operand (operands[1], VOIDmode)) return false; /* Check we need to optimize. */ if (!TARGET_OPT_AGU || optimize_function_for_size_p (cfun)) return false; - /* Check it is correct to split here. */ - if (!ix86_ok_to_clobber_flags(insn)) + /* The "at least two components" test below might not catch simple + move insns if parts.base is non-NULL and parts.disp is const0_rtx + as the only components in the address, e.g. if the register is + %rbp or %r13. As this test is much cheaper and moves are the + common case, do this check first. */ + if (REG_P (operands[1])) + return false; + + /* Check if it is OK to split here. */ + if (!ix86_ok_to_clobber_flags (insn)) return false; ok = ix86_decompose_address (operands[1], &parts);