From: Kito Cheng <kito.cheng@sifive.com>
Date: Wed, 11 Oct 2023 23:18:00 +0000 (-0700)
Subject: RISC-V: Add TARGET_MIN_VLEN_OPTS to fix the build
X-Git-Tag: basepoints/gcc-15~5573
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=06f36c1d83a7e8b6da47d3c5b325a963baee6aab;p=thirdparty%2Fgcc.git

RISC-V: Add TARGET_MIN_VLEN_OPTS to fix the build

gcc/ChangeLog:

	* config/riscv/riscv-opts.h (TARGET_MIN_VLEN_OPTS): New.
---

diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index e7c6b75c5ea1..31ee42dea6bd 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -112,6 +112,12 @@ enum riscv_entity
    ? 0 \
    : 32 << (__builtin_popcount (riscv_zvl_flags) - 1))
 
+/* Same as TARGET_MIN_VLEN, but take an OPTS as gcc_options.  */
+#define TARGET_MIN_VLEN_OPTS(opts)                                             \
+  ((opts->x_riscv_zvl_flags == 0)                                              \
+     ? 0                                                                       \
+     : 32 << (__builtin_popcount (opts->x_riscv_zvl_flags) - 1))
+
 /* We only enable VLS modes for VLA vectorization since fixed length VLMAX mode
    is the highest priority choice and should not conflict with VLS modes.  */
 #define TARGET_VECTOR_VLS                                                      \