From: Julian Seward <jseward@acm.org>
Date: Thu, 8 Sep 2005 17:53:03 +0000 (+0000)
Subject: Reinstate stwbrx.
X-Git-Tag: svn/VALGRIND_3_1_1^2~118
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=0a1862af0f9fa1fa0c43096a379a2a613f9edd8e;p=thirdparty%2Fvalgrind.git

Reinstate stwbrx.


git-svn-id: svn://svn.valgrind.org/vex/trunk@1373
---

diff --git a/VEX/priv/guest-ppc32/toIR.c b/VEX/priv/guest-ppc32/toIR.c
index 7e048e5de7..3a49b0a87c 100644
--- a/VEX/priv/guest-ppc32/toIR.c
+++ b/VEX/priv/guest-ppc32/toIR.c
@@ -3317,6 +3317,23 @@ static Bool dis_int_shift ( UInt theInstr )
 /*
   Integer Load/Store Reverse Instructions
 */
+static IRExpr* /* :: Ity_I32 */ gen_byterev32 ( IRTemp t )
+{
+   vassert(typeOfIRTemp(irbb->tyenv, t) == Ity_I32);
+   return
+      binop(Iop_Or32,
+         binop(Iop_Shl32, mkexpr(t), mkU8(24)),
+      binop(Iop_Or32,
+         binop(Iop_And32, binop(Iop_Shl32, mkexpr(t), mkU8(8)), 
+                          mkU32(0x00FF0000)),
+      binop(Iop_Or32,
+         binop(Iop_And32, binop(Iop_Shr32, mkexpr(t), mkU8(8)),
+                          mkU32(0x0000FF00)),
+         binop(Iop_And32, binop(Iop_Shr32, mkexpr(t), mkU8(24)),
+                          mkU32(0x000000FF) )
+      )));
+}
+
 static Bool dis_int_ldst_rev ( UInt theInstr )
 {
    /* X-Form */
@@ -3364,24 +3381,12 @@ static Bool dis_int_ldst_rev ( UInt theInstr )
 //zz       putIReg( Rd_addr, mkexpr(Rd));
 //zz       break;
        
-   case 0x216: // lwbrx (Load Word Byte-Reverse Indexed, PPC32 p459)
-      DIP("lwbrx r%d,r%d,r%d\n", Rd_addr, Ra_addr, Rb_addr);
-      assign( w1, loadBE(Ity_I32, mkexpr(EA)) );
-      assign( w2,
-         binop(Iop_Or32,
-            binop(Iop_Shl32, mkexpr(w1), mkU8(24)),
-         binop(Iop_Or32,
-            binop(Iop_And32, binop(Iop_Shl32, mkexpr(w1), mkU8(8)), 
-                             mkU32(0x00FF0000)),
-         binop(Iop_Or32,
-            binop(Iop_And32, binop(Iop_Shr32, mkexpr(w1), mkU8(8)),
-                             mkU32(0x0000FF00)),
-            binop(Iop_And32, binop(Iop_Shr32, mkexpr(w1), mkU8(24)),
-                             mkU32(0x000000FF) )
-         )))
-      );
-      putIReg( Rd_addr, mkexpr(w2));
-      break;
+      case 0x216: // lwbrx (Load Word Byte-Reverse Indexed, PPC32 p459)
+         DIP("lwbrx r%d,r%d,r%d\n", Rd_addr, Ra_addr, Rb_addr);
+         assign( w1, loadBE(Ity_I32, mkexpr(EA)) );
+         assign( w2, gen_byterev32(w1) );
+         putIReg( Rd_addr, mkexpr(w2));
+         break;
       
 //zz    case 0x396: // sthbrx (Store Half Word Byte-Reverse Indexed, PPC32 p523)
 //zz vassert(0);
@@ -3397,32 +3402,17 @@ static Bool dis_int_ldst_rev ( UInt theInstr )
 //zz                          binop(Iop_Shl32, mkexpr(byte0), mkU8(8)),
 //zz                          binop(Iop_Shr32, mkexpr(byte1), mkU8(8)))) );
 //zz       storeBE( mkexpr(EA), getIReg(tmp16) );
-//zz       break;
-//zz       
-//zz    case 0x296: // stwbrx (Store Word Byte-Reverse Indexed, PPC32 p531)
-//zz vassert(0);
-//zz 
-//zz       DIP("stwbrx r%d,r%d,r%d\n", Rs_addr, Ra_addr, Rb_addr);
-//zz       assign( Rs, getIReg(Rs_addr) );
-//zz       assign( byte0, binop(Iop_And32, mkexpr(Rs), mkU32(0x000000FF)) );
-//zz       assign( byte1, binop(Iop_And32, mkexpr(Rs), mkU32(0x0000FF00)) );
-//zz       assign( byte2, binop(Iop_And32, mkexpr(Rs), mkU32(0x00FF0000)) );
-//zz       assign( byte3, binop(Iop_And32, mkexpr(Rs), mkU32(0xFF000000)) );
-//zz       
-//zz       assign( tmp32,
-//zz               binop(Iop_Or32,
-//zz                     binop(Iop_Or32,
-//zz                           binop(Iop_Shl32, mkexpr(byte0), mkU8(24)),
-//zz                           binop(Iop_Shl32, mkexpr(byte1), mkU8(8))),
-//zz                     binop(Iop_Or32,
-//zz                           binop(Iop_Shr32, mkexpr(byte2), mkU8(8)),
-//zz                           binop(Iop_Shr32, mkexpr(byte3), mkU8(24)))) );
-//zz       storeBE( mkexpr(EA), mkexpr(tmp32) );
 //zz       break;
       
-   default:
-      vex_printf("dis_int_ldst_rev(PPC32)(opc2)\n");
-      return False;
+      case 0x296: // stwbrx (Store Word Byte-Reverse Indexed, PPC32 p531)
+         DIP("stwbrx r%d,r%d,r%d\n", Rd_addr, Ra_addr, Rb_addr);
+	 assign( w1, getIReg(Rd_addr) );
+         storeBE( mkexpr(EA), gen_byterev32(w1) );
+         break;
+      
+      default:
+         vex_printf("dis_int_ldst_rev(PPC32)(opc2)\n");
+         return False;
    }
    return True;
 }