From: H.J. Lu Date: Wed, 30 Jun 2021 17:47:06 +0000 (-0700) Subject: x86: Check RTM_ALWAYS_ABORT for RTM [BZ #28033] X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=0a5f5e2dc1223c1defd6421c0cceb12883d5ad07;p=thirdparty%2Fglibc.git x86: Check RTM_ALWAYS_ABORT for RTM [BZ #28033] From https://www.intel.com/content/www/us/en/support/articles/000059422/processors.html * Intel TSX will be disabled by default. * The processor will force abort all Restricted Transactional Memory (RTM) transactions by default. * A new CPUID bit CPUID.07H.0H.EDX[11](RTM_ALWAYS_ABORT) will be enumerated, which is set to indicate to updated software that the loaded microcode is forcing RTM abort. * On processors that enumerate support for RTM, the CPUID enumeration bits for Intel TSX (CPUID.07H.0H.EBX[11] and CPUID.07H.0H.EBX[4]) continue to be set by default after microcode update. * Workloads that were benefited from Intel TSX might experience a change in performance. * System software may use a new bit in Model-Specific Register (MSR) 0x10F TSX_FORCE_ABORT[TSX_CPUID_CLEAR] functionality to clear the Hardware Lock Elision (HLE) and RTM bits to indicate to software that Intel TSX is disabled. 1. Add RTM_ALWAYS_ABORT to CPUID features. 2. Set RTM usable only if RTM_ALWAYS_ABORT isn't set. This skips the string/tst-memchr-rtm etc. testcases on the affected processors, which always fail after a microcde update. 3. Check RTM feature, instead of usability, against /proc/cpuinfo. This fixes BZ #28033. (cherry picked from commit ea8e465a6b8d0f26c72bcbe453a854de3abf68ec) --- diff --git a/manual/platform.texi b/manual/platform.texi index 6caf68d7969..3e988261ba1 100644 --- a/manual/platform.texi +++ b/manual/platform.texi @@ -510,6 +510,9 @@ capability. @item @code{RTM} -- RTM instruction extensions. +@item +@code{RTM_ALWAYS_ABORT} -- Transactions always abort, making RTM unusable. + @item @code{SDBG} -- IA32_DEBUG_INTERFACE MSR for silicon debug. diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h index 8f423ae721d..2cf898ff7c4 100644 --- a/sysdeps/x86/bits/platform/x86.h +++ b/sysdeps/x86/bits/platform/x86.h @@ -210,7 +210,7 @@ enum x86_cpu_AVX512_VP2INTERSECT = x86_cpu_index_7_edx + 8, x86_cpu_INDEX_7_EDX_9 = x86_cpu_index_7_edx + 9, x86_cpu_MD_CLEAR = x86_cpu_index_7_edx + 10, - x86_cpu_INDEX_7_EDX_11 = x86_cpu_index_7_edx + 11, + x86_cpu_RTM_ALWAYS_ABORT = x86_cpu_index_7_edx + 11, x86_cpu_INDEX_7_EDX_12 = x86_cpu_index_7_edx + 12, x86_cpu_INDEX_7_EDX_13 = x86_cpu_index_7_edx + 13, x86_cpu_SERIALIZE = x86_cpu_index_7_edx + 14, diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 7a524dbae61..898246c232d 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -66,7 +66,6 @@ update_usable (struct cpu_features *cpu_features) CPU_FEATURE_SET_USABLE (cpu_features, HLE); CPU_FEATURE_SET_USABLE (cpu_features, BMI2); CPU_FEATURE_SET_USABLE (cpu_features, ERMS); - CPU_FEATURE_SET_USABLE (cpu_features, RTM); CPU_FEATURE_SET_USABLE (cpu_features, RDSEED); CPU_FEATURE_SET_USABLE (cpu_features, ADX); CPU_FEATURE_SET_USABLE (cpu_features, CLFLUSHOPT); @@ -82,6 +81,7 @@ update_usable (struct cpu_features *cpu_features) CPU_FEATURE_SET_USABLE (cpu_features, MOVDIRI); CPU_FEATURE_SET_USABLE (cpu_features, MOVDIR64B); CPU_FEATURE_SET_USABLE (cpu_features, FSRM); + CPU_FEATURE_SET_USABLE (cpu_features, RTM_ALWAYS_ABORT); CPU_FEATURE_SET_USABLE (cpu_features, SERIALIZE); CPU_FEATURE_SET_USABLE (cpu_features, TSXLDTRK); CPU_FEATURE_SET_USABLE (cpu_features, LAHF64_SAHF64); @@ -95,6 +95,9 @@ update_usable (struct cpu_features *cpu_features) CPU_FEATURE_SET_USABLE (cpu_features, FSRS); CPU_FEATURE_SET_USABLE (cpu_features, FSRCS); + if (!CPU_FEATURES_CPU_P (cpu_features, RTM_ALWAYS_ABORT)) + CPU_FEATURE_SET_USABLE (cpu_features, RTM); + #if CET_ENABLED CPU_FEATURE_SET_USABLE (cpu_features, IBT); CPU_FEATURE_SET_USABLE (cpu_features, SHSTK); diff --git a/sysdeps/x86/include/cpu-features.h b/sysdeps/x86/include/cpu-features.h index 04d8e5734eb..bfe4fe231ea 100644 --- a/sysdeps/x86/include/cpu-features.h +++ b/sysdeps/x86/include/cpu-features.h @@ -229,7 +229,7 @@ enum #define bit_cpu_AVX512_VP2INTERSECT (1u << 8) #define bit_cpu_INDEX_7_EDX_9 (1u << 9) #define bit_cpu_MD_CLEAR (1u << 10) -#define bit_cpu_INDEX_7_EDX_11 (1u << 11) +#define bit_cpu_RTM_ALWAYS_ABORT (1u << 11) #define bit_cpu_INDEX_7_EDX_12 (1u << 12) #define bit_cpu_INDEX_7_EDX_13 (1u << 13) #define bit_cpu_SERIALIZE (1u << 14) @@ -454,7 +454,7 @@ enum #define index_cpu_AVX512_VP2INTERSECT CPUID_INDEX_7 #define index_cpu_INDEX_7_EDX_9 CPUID_INDEX_7 #define index_cpu_MD_CLEAR CPUID_INDEX_7 -#define index_cpu_INDEX_7_EDX_11 CPUID_INDEX_7 +#define index_cpu_RTM_ALWAYS_ABORT CPUID_INDEX_7 #define index_cpu_INDEX_7_EDX_12 CPUID_INDEX_7 #define index_cpu_INDEX_7_EDX_13 CPUID_INDEX_7 #define index_cpu_SERIALIZE CPUID_INDEX_7 @@ -679,7 +679,7 @@ enum #define reg_AVX512_VP2INTERSECT edx #define reg_INDEX_7_EDX_9 edx #define reg_MD_CLEAR edx -#define reg_INDEX_7_EDX_11 edx +#define reg_RTM_ALWAYS_ABORT edx #define reg_INDEX_7_EDX_12 edx #define reg_INDEX_7_EDX_13 edx #define reg_SERIALIZE edx diff --git a/sysdeps/x86/tst-cpu-features-supports.c b/sysdeps/x86/tst-cpu-features-supports.c index cc0d2b2d569..871fe4d265f 100644 --- a/sysdeps/x86/tst-cpu-features-supports.c +++ b/sysdeps/x86/tst-cpu-features-supports.c @@ -152,7 +152,7 @@ do_test (int argc, char **argv) fails += CHECK_SUPPORTS (rdpid, RDPID); fails += CHECK_SUPPORTS (rdrnd, RDRAND); fails += CHECK_SUPPORTS (rdseed, RDSEED); - fails += CHECK_SUPPORTS (rtm, RTM); + fails += CHECK_CPU_SUPPORTS (rtm, RTM); fails += CHECK_SUPPORTS (serialize, SERIALIZE); fails += CHECK_SUPPORTS (sha, SHA); fails += CHECK_CPU_SUPPORTS (shstk, SHSTK); diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c index b5e7f6e7b03..37d9ec9d8cc 100644 --- a/sysdeps/x86/tst-get-cpu-features.c +++ b/sysdeps/x86/tst-get-cpu-features.c @@ -158,6 +158,7 @@ do_test (void) CHECK_CPU_FEATURE (UINTR); CHECK_CPU_FEATURE (AVX512_VP2INTERSECT); CHECK_CPU_FEATURE (MD_CLEAR); + CHECK_CPU_FEATURE (RTM_ALWAYS_ABORT); CHECK_CPU_FEATURE (SERIALIZE); CHECK_CPU_FEATURE (HYBRID); CHECK_CPU_FEATURE (TSXLDTRK); @@ -321,6 +322,7 @@ do_test (void) CHECK_CPU_FEATURE_USABLE (FSRM); CHECK_CPU_FEATURE_USABLE (AVX512_VP2INTERSECT); CHECK_CPU_FEATURE_USABLE (MD_CLEAR); + CHECK_CPU_FEATURE_USABLE (RTM_ALWAYS_ABORT); CHECK_CPU_FEATURE_USABLE (SERIALIZE); CHECK_CPU_FEATURE_USABLE (HYBRID); CHECK_CPU_FEATURE_USABLE (TSXLDTRK);