From: David S. Miller <davem@davemloft.net>
Date: Fri, 28 Oct 2011 05:09:42 +0000 (+0000)
Subject: Fix constraint on 64-bit VIS3 vector moves.
X-Git-Tag: releases/gcc-4.7.0~2752
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=0a940828f6dce12ae6e9b3e5c7317c086682974d;p=thirdparty%2Fgcc.git

Fix constraint on 64-bit VIS3 vector moves.

	* config/sparc/sparc.md (64-bit vector moves): Use 'e' not 'f'
	constraint.

From-SVN: r180601
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 54e059e51977..2d864d81af2b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,8 @@
 2011-10-27  David S. Miller  <davem@davemloft.net>
 
+	* config/sparc/sparc.md (64-bit vector moves): Use 'e' not 'f'
+	constraint.
+
 	* regcprop.c (copyprop_hardreg_forward_1): Reject the
 	transformation when we narrow the mode on big endian.
 
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 2b4b2bb54a43..dcd23a16d919 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -7686,8 +7686,8 @@
    (set_attr "cpu_feature" "vis,vis,vis,*,*,*,*,*,*,vis3,vis3")])
 
 (define_insn "*mov<VM64:mode>_insn_sp64"
-  [(set (match_operand:VM64 0 "nonimmediate_operand" "=e,e,e,e,m,m,*r, m,*r, f,*r")
-	(match_operand:VM64 1 "input_operand"         "Y,C,e,m,e,Y, m,*r, f,*r,*r"))]
+  [(set (match_operand:VM64 0 "nonimmediate_operand" "=e,e,e,e,m,m,*r, m,*r, e,*r")
+	(match_operand:VM64 1 "input_operand"         "Y,C,e,m,e,Y, m,*r, e,*r,*r"))]
   "TARGET_VIS
    && TARGET_ARCH64
    && (register_operand (operands[0], <VM64:MODE>mode)