From: Cerion Armour-Brown <cerion@valgrind.org>
Date: Thu, 24 Feb 2005 20:01:02 +0000 (+0000)
Subject: Fixed a backend shift bug: src/dst were swapped in emitted code.
X-Git-Tag: svn/VALGRIND_3_0_1^2~375
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=0ae631d5bff5b4eba02efa2883145a1b483d8a6f;p=thirdparty%2Fvalgrind.git

Fixed a backend shift bug: src/dst were swapped in emitted code.
Also fixed an assembly printf for Set32.



git-svn-id: svn://svn.valgrind.org/vex/trunk@959
---

diff --git a/VEX/priv/host-ppc32/hdefs.c b/VEX/priv/host-ppc32/hdefs.c
index 74fa95ecc7..5e1d81defe 100644
--- a/VEX/priv/host-ppc32/hdefs.c
+++ b/VEX/priv/host-ppc32/hdefs.c
@@ -895,7 +895,7 @@ void ppPPC32Instr ( PPC32Instr* i )
       } else {
          vex_printf(": { mfcr r0 ; rlwinm ");
          ppHRegPPC32(i->Pin.Set32.dst);
-         vex_printf(",r0,%d,31,31,0", cc.flag+1);
+         vex_printf(",r0,%d,31,31", cc.flag+1);
          if (cc.test == Pct_FALSE) {
             vex_printf("; xori ");
             ppHRegPPC32(i->Pin.Set32.dst);
@@ -2042,8 +2042,8 @@ Int emit_PPC32Instr ( UChar* buf, Int nbuf, PPC32Instr* i )
    case Pin_Sh32: {
       UInt opc1 = 31, opc2, rB, sh;
       UInt op = i->Pin.Sh32.op;
-      UInt rS = iregNo(i->Pin.Sh32.dst);
-      UInt rA = iregNo(i->Pin.Sh32.src);
+      UInt rS = iregNo(i->Pin.Sh32.src);
+      UInt rA = iregNo(i->Pin.Sh32.dst);
       PPC32RITag ri_tag = i->Pin.Sh32.shft->tag;
 
       if ((op == Psh_SHL || op == Psh_SHR) && ri_tag == Pri_Imm)