From: Julian Seward <jseward@acm.org>
Date: Wed, 11 Jul 2012 16:46:47 +0000 (+0000)
Subject: Implement (T1) SMMUL{R}.  Fixes #300140.  (Evgeniy Stepanov,
X-Git-Tag: svn/VALGRIND_3_8_1^2~53
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=0c0f4a6698ae017437f1ac784d83cd7d887b9287;p=thirdparty%2Fvalgrind.git

Implement (T1) SMMUL{R}.  Fixes #300140.  (Evgeniy Stepanov,
eugeni.stepanov@gmail.com) w/ fixes.



git-svn-id: svn://svn.valgrind.org/vex/trunk@2425
---

diff --git a/VEX/priv/guest_arm_toIR.c b/VEX/priv/guest_arm_toIR.c
index 0426b40e17..af1202cda6 100644
--- a/VEX/priv/guest_arm_toIR.c
+++ b/VEX/priv/guest_arm_toIR.c
@@ -18324,6 +18324,28 @@ DisResult disInstr_THUMB_WRK (
       goto decode_success;
    }
 
+   /* ------------------- (T1) SMMUL{R} ------------------ */
+   if (INSN0(15,7) == BITS9(1,1,1,1,1,0,1,1,0)
+       && INSN0(6,4) == BITS3(1,0,1)
+       && INSN1(15,12) == BITS4(1,1,1,1)
+       && INSN1(7,5) == BITS3(0,0,0)) {
+      UInt bitR = INSN1(4,4);
+      UInt rD = INSN1(11,8);
+      UInt rM = INSN1(3,0);
+      UInt rN = INSN0(3,0);
+      if (!isBadRegT(rD) && !isBadRegT(rN) && !isBadRegT(rM)) {
+         IRExpr* res
+         = unop(Iop_64HIto32,
+                binop(Iop_Add64,
+                      binop(Iop_MullS32, getIRegT(rN), getIRegT(rM)),
+                      mkU64(bitR ? 0x80000000ULL : 0ULL)));
+         putIRegT(rD, res, condT);
+         DIP("smmul%s r%u, r%u, r%u\n",
+             bitR ? "r" : "", rD, rN, rM);
+         goto decode_success;
+      }
+   }
+
    /* ----------------------------------------------------------- */
    /* -- VFP (CP 10, CP 11) instructions (in Thumb mode)       -- */
    /* ----------------------------------------------------------- */