From: Julian Seward Date: Sun, 23 Nov 2014 17:34:54 +0000 (+0000) Subject: Merge, from trunk, r2995 X-Git-Tag: svn/VALGRIND_3_10_1^2~2 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=0c935b24b049322240bd6625bdf5e317aefc7405;p=thirdparty%2Fvalgrind.git Merge, from trunk, r2995 340807 disInstr(arm): unhandled instruction: 0xEE989B20 2995, testcase=14736. git-svn-id: svn://svn.valgrind.org/vex/branches/VEX_3_10_BRANCH@3020 --- diff --git a/VEX/priv/guest_arm_toIR.c b/VEX/priv/guest_arm_toIR.c index ab2bfe522b..76d6e97863 100644 --- a/VEX/priv/guest_arm_toIR.c +++ b/VEX/priv/guest_arm_toIR.c @@ -13529,6 +13529,28 @@ static Bool decode_CP10_CP11_instruction ( condT); DIP("fdivd%s d%u, d%u, d%u\n", nCC(conq), dD, dN, dM); goto decode_success_vfp; + case BITS4(1,0,1,0): /* VNFMS: -(d - n * m) (fused) */ + /* XXXROUNDINGFIXME look up ARM reference for fused + multiply-add rounding */ + putDReg(dD, triop(Iop_AddF64, rm, + unop(Iop_NegF64, getDReg(dD)), + triop(Iop_MulF64, rm, + getDReg(dN), + getDReg(dM))), + condT); + DIP("vfnmsd%s d%u, d%u, d%u\n", nCC(conq), dD, dN, dM); + goto decode_success_vfp; + case BITS4(1,0,1,1): /* VNFMA: -(d + n * m) (fused) */ + /* XXXROUNDINGFIXME look up ARM reference for fused + multiply-add rounding */ + putDReg(dD, triop(Iop_AddF64, rm, + unop(Iop_NegF64, getDReg(dD)), + triop(Iop_MulF64, rm, + unop(Iop_NegF64, getDReg(dN)), + getDReg(dM))), + condT); + DIP("vfnmad%s d%u, d%u, d%u\n", nCC(conq), dD, dN, dM); + goto decode_success_vfp; case BITS4(1,1,0,0): /* VFMA: d + n * m (fused) */ /* XXXROUNDINGFIXME look up ARM reference for fused multiply-add rounding */ @@ -14014,6 +14036,28 @@ static Bool decode_CP10_CP11_instruction ( condT); DIP("fdivs%s s%u, s%u, s%u\n", nCC(conq), fD, fN, fM); goto decode_success_vfp; + case BITS4(1,0,1,0): /* VNFMS: -(d - n * m) (fused) */ + /* XXXROUNDINGFIXME look up ARM reference for fused + multiply-add rounding */ + putFReg(fD, triop(Iop_AddF32, rm, + unop(Iop_NegF32, getFReg(fD)), + triop(Iop_MulF32, rm, + getFReg(fN), + getFReg(fM))), + condT); + DIP("vfnmss%s s%u, s%u, s%u\n", nCC(conq), fD, fN, fM); + goto decode_success_vfp; + case BITS4(1,0,1,1): /* VNFMA: -(d + n * m) (fused) */ + /* XXXROUNDINGFIXME look up ARM reference for fused + multiply-add rounding */ + putFReg(fD, triop(Iop_AddF32, rm, + unop(Iop_NegF32, getFReg(fD)), + triop(Iop_MulF32, rm, + unop(Iop_NegF32, getFReg(fN)), + getFReg(fM))), + condT); + DIP("vfnmas%s s%u, s%u, s%u\n", nCC(conq), fD, fN, fM); + goto decode_success_vfp; case BITS4(1,1,0,0): /* VFMA: d + n * m (fused) */ /* XXXROUNDINGFIXME look up ARM reference for fused multiply-add rounding */