From: Petar Jovanovic Date: Thu, 4 Jul 2013 00:39:37 +0000 (+0000) Subject: mips: implement Iop_8Uto64 in iselInt64Expr X-Git-Tag: svn/VALGRIND_3_9_0^2~66 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=0df2b83d0613135bc0f56ef484ea2fe56f378521;p=thirdparty%2Fvalgrind.git mips: implement Iop_8Uto64 in iselInt64Expr Iop_8Uto64 was missing in iselInt64Expr. The change should resolve Bugzilla #319505. git-svn-id: svn://svn.valgrind.org/vex/trunk@2729 --- diff --git a/VEX/priv/host_mips_isel.c b/VEX/priv/host_mips_isel.c index 404b8da172..7be6c93f9a 100644 --- a/VEX/priv/host_mips_isel.c +++ b/VEX/priv/host_mips_isel.c @@ -2278,6 +2278,20 @@ static void iselInt64Expr_wrk(HReg * rHi, HReg * rLo, ISelEnv * env, IRExpr * e) return; } + /* 8Uto64(e) */ + case Iop_8Uto64: { + HReg tLo = newVRegI(env); + HReg tHi = newVRegI(env); + HReg src = iselWordExpr_R(env, e->Iex.Unop.arg); + addInstr(env, MIPSInstr_Alu(Malu_AND, tLo, src, + MIPSRH_Imm(False, 0xFF))); + addInstr(env, MIPSInstr_Alu(Malu_ADD, tHi, hregMIPS_GPR0(mode64), + MIPSRH_Reg(hregMIPS_GPR0(mode64)))); + *rHi = tHi; + *rLo = tLo; + return; + } + /* 32Uto64(e) */ case Iop_32Uto64: { HReg tLo = newVRegI(env);