From: Florian Weimer Date: Fri, 2 Aug 2024 13:22:07 +0000 (+0200) Subject: x86: Add missing switch/case fall-through markers to init_cpu_features X-Git-Tag: glibc-2.41~782 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=0df48472ff5b291ab0014146f33b0269ff0286a9;p=thirdparty%2Fglibc.git x86: Add missing switch/case fall-through markers to init_cpu_features The commits introducing these fall-throughs intended them to happen. Reviewed-by: Noah Goldstein --- diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index c096dd390a..18ed008040 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -879,6 +879,7 @@ init_cpu_features (struct cpu_features *cpu_features) non-temporal on all Skylake servers. */ cpu_features->preferred[index_arch_Avoid_Non_Temporal_Memset] |= bit_arch_Avoid_Non_Temporal_Memset; + /* fallthrough */ case INTEL_BIGCORE_COMETLAKE: case INTEL_BIGCORE_SKYLAKE: case INTEL_BIGCORE_KABYLAKE: @@ -1073,6 +1074,7 @@ https://www.intel.com/content/www/us/en/support/articles/000059422/processors.ht /* Yongfeng and Shijidadao mircoarch tuning. */ case 0x5b: cpu_features->cachesize_non_temporal_divisor = 2; + /* fallthrough */ case 0x6b: cpu_features->preferred[index_arch_AVX_Fast_Unaligned_Load] &= ~bit_arch_AVX_Fast_Unaligned_Load;