From: Carl Love <cel@us.ibm.com>
Date: Tue, 3 Nov 2015 17:44:55 +0000 (+0000)
Subject: Add ISA 2.07 vbit test support
X-Git-Tag: svn/VALGRIND_3_12_0^2~64
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=0f0b01f15ae36a4d1bc995fa94ed1cf4aefcce09;p=thirdparty%2Fvalgrind.git

Add ISA 2.07 vbit test support

The ISA 2.07 support adds new Iops as well as support for some existing
Iops.  None of these Iops have been enabled in the vbit tester.  This commit
adds the needed support to the files VEX/priv/ir_inject and VEX/pub/libvex.h.
These changes add support for additional immediate operands.

There are additional changes to the memcheck files to complete the ISA 2.07
support.

Bugzilla 354797 was created for this issue.

git-svn-id: svn://svn.valgrind.org/vex/trunk@3202
---

diff --git a/VEX/priv/ir_inject.c b/VEX/priv/ir_inject.c
index 93b4c1c9bc..94b0fdfcb9 100644
--- a/VEX/priv/ir_inject.c
+++ b/VEX/priv/ir_inject.c
@@ -36,6 +36,7 @@
 
 /* Convenience macros for readibility */
 #define mkU8(v)   IRExpr_Const(IRConst_U8(v))
+#define mkU16(v)  IRExpr_Const(IRConst_U16(v))
 #define mkU32(v)  IRExpr_Const(IRConst_U32(v))
 #define mkU64(v)  IRExpr_Const(IRConst_U64(v))
 #define unop(kind, a)  IRExpr_Unop(kind, a)
@@ -209,12 +210,26 @@ vex_inject_ir(IRSB *irsb, IREndness endian)
 
    case 2:
       opnd1 = load(endian, iricb.t_opnd1, iricb.opnd1);
+      /* HACK, compiler warning ‘opnd2’ may be used uninitialized */
+      opnd2 = opnd1;
+
+      /* immediate_index = 0  immediate value is not used.
+       * immediate_index = 2  opnd2 is an immediate value.
+       */
+      vassert(iricb.immediate_index == 0 || iricb.immediate_index == 2);
+
+      if (iricb.immediate_index == 2) {
+         vassert((iricb.t_opnd2 == Ity_I8) || (iricb.t_opnd2 == Ity_I16)
+                 || (iricb.t_opnd2 == Ity_I32));
 
-      if (iricb.shift_amount_is_immediate) {
-         // This implies that the IROp is a shift op
-         vassert(iricb.t_opnd2 == Ity_I8);
          /* Interpret the memory as an ULong. */
-         opnd2 = mkU8(*((ULong *)iricb.opnd2));
+         if (iricb.immediate_type == Ity_I8) {
+            opnd2 = mkU8(*((ULong *)iricb.opnd2));
+         } else if (iricb.immediate_type == Ity_I16) {
+            opnd2 = mkU16(*((ULong *)iricb.opnd2));
+         } else if (iricb.immediate_type == Ity_I32) {
+            opnd2 = mkU32(*((ULong *)iricb.opnd2));
+         }
       } else {
          opnd2 = load(endian, iricb.t_opnd2, iricb.opnd2);
       }
@@ -228,7 +243,28 @@ vex_inject_ir(IRSB *irsb, IREndness endian)
    case 3:
       opnd1 = load(endian, iricb.t_opnd1, iricb.opnd1);
       opnd2 = load(endian, iricb.t_opnd2, iricb.opnd2);
-      opnd3 = load(endian, iricb.t_opnd3, iricb.opnd3);
+      /* HACK, compiler warning ‘opnd3’ may be used uninitialized */
+      opnd3 = opnd2;
+
+      /* immediate_index = 0  immediate value is not used.
+       * immediate_index = 3  opnd3 is an immediate value.
+       */
+      vassert(iricb.immediate_index == 0 || iricb.immediate_index == 3);
+
+      if (iricb.immediate_index == 3) {
+         vassert((iricb.t_opnd3 == Ity_I8) || (iricb.t_opnd3 == Ity_I16)
+                 || (iricb.t_opnd2 == Ity_I32));
+
+         if (iricb.immediate_type == Ity_I8) {
+            opnd3 = mkU8(*((ULong *)iricb.opnd3));
+         } else if (iricb.immediate_type == Ity_I16) {
+            opnd3 = mkU16(*((ULong *)iricb.opnd3));
+         } else if (iricb.immediate_type == Ity_I32) {
+            opnd3 = mkU32(*((ULong *)iricb.opnd3));
+         }
+      } else {
+         opnd3 = load(endian, iricb.t_opnd3, iricb.opnd3);
+      }
       if (rounding_mode)
          data = qop(iricb.op, rounding_mode, opnd1, opnd2, opnd3);
       else
@@ -240,7 +276,28 @@ vex_inject_ir(IRSB *irsb, IREndness endian)
       opnd1 = load(endian, iricb.t_opnd1, iricb.opnd1);
       opnd2 = load(endian, iricb.t_opnd2, iricb.opnd2);
       opnd3 = load(endian, iricb.t_opnd3, iricb.opnd3);
-      opnd4 = load(endian, iricb.t_opnd4, iricb.opnd4);
+      /* HACK, compiler warning ‘opnd4’ may be used uninitialized */
+      opnd4 = opnd3;
+
+      /* immediate_index = 0  immediate value is not used.
+       * immediate_index = 4  opnd4 is an immediate value.
+       */
+      vassert(iricb.immediate_index == 0 || iricb.immediate_index == 4);
+
+      if (iricb.immediate_index == 4) {
+         vassert((iricb.t_opnd3 == Ity_I8) || (iricb.t_opnd3 == Ity_I16)
+                 || (iricb.t_opnd2 == Ity_I32));
+
+         if (iricb.immediate_type == Ity_I8) {
+            opnd4 = mkU8(*((ULong *)iricb.opnd4));
+         } else if (iricb.immediate_type == Ity_I16) {
+            opnd4 = mkU16(*((ULong *)iricb.opnd4));
+         } else if (iricb.immediate_type == Ity_I32) {
+            opnd4 = mkU32(*((ULong *)iricb.opnd4));
+         }
+      } else {
+         opnd4 = load(endian, iricb.t_opnd4, iricb.opnd4);
+      }
       data = qop(iricb.op, opnd1, opnd2, opnd3, opnd4);
       break;
 
diff --git a/VEX/pub/libvex.h b/VEX/pub/libvex.h
index 011fd53915..b055c54cff 100644
--- a/VEX/pub/libvex.h
+++ b/VEX/pub/libvex.h
@@ -847,7 +847,14 @@ typedef
       IRType t_opnd4;  // type of 4th operand
       UInt  rounding_mode;
       UInt  num_operands; // excluding rounding mode, if any
-      Bool  shift_amount_is_immediate;
+      /* The following two members describe if this operand has immediate
+       *  operands. There are a few restrictions:
+       *    (1) An operator can have at most one immediate operand.
+       * (2) If there is an immediate operand, it is the right-most operand
+       *  An immediate_index of 0 means there is no immediate operand.
+       */
+      UInt immediate_type;  // size of immediate Ity_I8, Ity_16
+      UInt immediate_index; // operand number: 1, 2
    }
    IRICB;