From: Alistair Popple Date: Mon, 10 Nov 2025 13:34:10 +0000 (+0900) Subject: gpu: nova-core: Set correct DMA mask X-Git-Tag: v6.19-rc1~157^2~8^2~32 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=1101c442410cd57af848c30804e985aab9e0e569;p=thirdparty%2Fkernel%2Flinux.git gpu: nova-core: Set correct DMA mask Set the correct DMA mask. Without this DMA will fail on some setups. Signed-off-by: Alistair Popple Signed-off-by: Alexandre Courbot Message-ID: <20251110-gsp_boot-v9-2-8ae4058e3c0e@nvidia.com> --- diff --git a/drivers/gpu/nova-core/driver.rs b/drivers/gpu/nova-core/driver.rs index 2509f75eccb99..d91bbc50cde7e 100644 --- a/drivers/gpu/nova-core/driver.rs +++ b/drivers/gpu/nova-core/driver.rs @@ -4,6 +4,8 @@ use kernel::{ auxiliary, c_str, device::Core, + dma::Device, + dma::DmaMask, pci, pci::{ Class, @@ -25,6 +27,15 @@ pub(crate) struct NovaCore { } const BAR0_SIZE: usize = SZ_16M; + +// For now we only support Ampere which can use up to 47-bit DMA addresses. +// +// TODO: Add an abstraction for this to support newer GPUs which may support +// larger DMA addresses. Limiting these GPUs to smaller address widths won't +// have any adverse affects, unless installed on systems which require larger +// DMA addresses. These systems should be quite rare. +const GPU_DMA_BITS: u32 = 47; + pub(crate) type Bar0 = pci::Bar; kernel::pci_device_table!( @@ -62,6 +73,11 @@ impl pci::Driver for NovaCore { pdev.enable_device_mem()?; pdev.set_master(); + // SAFETY: No concurrent DMA allocations or mappings can be made because + // the device is still being probed and therefore isn't being used by + // other threads of execution. + unsafe { pdev.dma_set_mask_and_coherent(DmaMask::new::())? }; + let devres_bar = Arc::pin_init( pdev.iomap_region_sized::(0, c_str!("nova-core/bar0")), GFP_KERNEL,