From: Laurent Vivier Date: Fri, 26 Dec 2025 21:37:07 +0000 (+0100) Subject: m68k: fix CAS2 writeback when Dc1==Dc2 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=11dac41f2e830bcd7ba74969dc50f5740e3ce7e7;p=thirdparty%2Fqemu.git m68k: fix CAS2 writeback when Dc1==Dc2 According to Programmer's Reference Manual, if Dc1 and Dc2 specify the same data register and the comparison fails, memory operand 1 is stored in the data register. The current helpers wrote Dc1 then Dc2, leaving operand 2 in the shared register. Swap the writeback order for cas2w/cas2l so memory operand 1 wins. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson Message-ID: <20251226213707.331741-1-laurent@vivier.eu> --- diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index e9c20a8e03..10266b1e0e 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -799,8 +799,8 @@ void HELPER(cas2w)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2) env->cc_v = c2; } env->cc_op = CC_OP_CMPW; - env->dregs[Dc1] = deposit32(env->dregs[Dc1], 0, 16, l1); env->dregs[Dc2] = deposit32(env->dregs[Dc2], 0, 16, l2); + env->dregs[Dc1] = deposit32(env->dregs[Dc1], 0, 16, l1); } static void do_cas2l(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2, @@ -861,8 +861,8 @@ static void do_cas2l(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2, env->cc_v = c2; } env->cc_op = CC_OP_CMPL; - env->dregs[Dc1] = l1; env->dregs[Dc2] = l2; + env->dregs[Dc1] = l1; } void HELPER(cas2l)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2)