From: Marek Vasut Date: Sun, 18 Jan 2026 13:49:52 +0000 (+0100) Subject: arm64: dts: renesas: r8a77965: Describe PCIe root ports X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=12424624c8484f79e02fdc8a437fd401bc21ed41;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: renesas: r8a77965: Describe PCIe root ports Add nodes which describe the root ports in the PCIe controller DT nodes. This can be used together with the pwrctrl driver to control clock and power supply to a PCIe slot. Signed-off-by: Marek Vasut Reviewed-by: Geert Uytterhoeven Link: https://patch.msgid.link/20260118135038.8033-5-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven --- diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index 425561e658caf..611a9335c63ad 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi @@ -2494,6 +2494,16 @@ iommu-map = <0 &ipmmu_hc 0 1>; iommu-map-mask = <0>; status = "disabled"; + + /* PCIe bridge, Root Port */ + pciec0_rp: pci@0,0 { + #address-cells = <3>; + #size-cells = <2>; + reg = <0x0 0x0 0x0 0x0 0x0>; + compatible = "pciclass,0604"; + device_type = "pci"; + ranges; + }; }; pciec1: pcie@ee800000 { @@ -2523,6 +2533,16 @@ iommu-map = <0 &ipmmu_hc 1 1>; iommu-map-mask = <0>; status = "disabled"; + + /* PCIe bridge, Root Port */ + pciec1_rp: pci@0,0 { + #address-cells = <3>; + #size-cells = <2>; + reg = <0x0 0x0 0x0 0x0 0x0>; + compatible = "pciclass,0604"; + device_type = "pci"; + ranges; + }; }; fdp1@fe940000 {