From: Alex Deucher <alexander.deucher@amd.com>
Date: Tue, 23 Sep 2014 14:20:13 +0000 (-0400)
Subject: drm/radeon/cik: use a separate counter for CP init timeout
X-Git-Tag: v3.16.4~259
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=127e837f479a2fa68f1cca05be739afb3cd3f8f0;p=thirdparty%2Fkernel%2Fstable.git

drm/radeon/cik: use a separate counter for CP init timeout

commit 370ce45b5986118fa496dddbcd7039e1aa1a418f upstream.

Otherwise we may fail to init the second compute ring.

Noticed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 78b4a277083cc..5ea01de617ab4 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -4489,7 +4489,7 @@ struct bonaire_mqd
  */
 static int cik_cp_compute_resume(struct radeon_device *rdev)
 {
-	int r, i, idx;
+	int r, i, j, idx;
 	u32 tmp;
 	bool use_doorbell = true;
 	u64 hqd_gpu_addr;
@@ -4608,7 +4608,7 @@ static int cik_cp_compute_resume(struct radeon_device *rdev)
 		mqd->queue_state.cp_hqd_pq_wptr= 0;
 		if (RREG32(CP_HQD_ACTIVE) & 1) {
 			WREG32(CP_HQD_DEQUEUE_REQUEST, 1);
-			for (i = 0; i < rdev->usec_timeout; i++) {
+			for (j = 0; j < rdev->usec_timeout; j++) {
 				if (!(RREG32(CP_HQD_ACTIVE) & 1))
 					break;
 				udelay(1);