From: Chenyi Qiang Date: Thu, 11 Dec 2025 06:08:01 +0000 (+0800) Subject: i386/tdx: Add CET SHSTK/IBT into the supported CPUID by XFAM X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=12ef9d4ed3fd265f56066681097bce6ea12b8dc7;p=thirdparty%2Fqemu.git i386/tdx: Add CET SHSTK/IBT into the supported CPUID by XFAM So that it can be configured in TD guest. And considerring CET_U and CET_S bits are always same in supported XFAM reported by TDX module, i.e., either 00 or 11. So, only need to choose one of them. Tested-by: Farrah Chen Reviewed-by: Xiaoyao Li Signed-off-by: Chenyi Qiang Signed-off-by: Zhao Liu Link: https://lore.kernel.org/r/20251211060801.3600039-23-zhao1.liu@intel.com Signed-off-by: Paolo Bonzini --- diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c index a344462365..0161985768 100644 --- a/target/i386/kvm/tdx.c +++ b/target/i386/kvm/tdx.c @@ -526,6 +526,8 @@ TdxXFAMDep tdx_xfam_deps[] = { { XSTATE_OPMASK_BIT, { FEAT_7_0_EDX, CPUID_7_0_EDX_AVX512_FP16 } }, { XSTATE_PT_BIT, { FEAT_7_0_EBX, CPUID_7_0_EBX_INTEL_PT } }, { XSTATE_PKRU_BIT, { FEAT_7_0_ECX, CPUID_7_0_ECX_PKU } }, + { XSTATE_CET_U_BIT, { FEAT_7_0_ECX, CPUID_7_0_ECX_CET_SHSTK } }, + { XSTATE_CET_U_BIT, { FEAT_7_0_EDX, CPUID_7_0_EDX_CET_IBT } }, { XSTATE_XTILE_CFG_BIT, { FEAT_7_0_EDX, CPUID_7_0_EDX_AMX_BF16 } }, { XSTATE_XTILE_CFG_BIT, { FEAT_7_0_EDX, CPUID_7_0_EDX_AMX_TILE } }, { XSTATE_XTILE_CFG_BIT, { FEAT_7_0_EDX, CPUID_7_0_EDX_AMX_INT8 } },