From: Pat Haugen <pthaugen@us.ibm.com>
Date: Wed, 1 Mar 2017 21:17:46 +0000 (+0000)
Subject: re PR target/79544 (vec_sra (unsigned long long,foo) generating vsrd instead of vsrad)
X-Git-Tag: releases/gcc-5.5.0~494
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=131c883e311e2bf02a905ec1e6c44a763a2ab5d1;p=thirdparty%2Fgcc.git

re PR target/79544 (vec_sra (unsigned long long,foo) generating vsrd instead of vsrad)

	PR target/79544
	* rs6000/rs6000-c.c (struct altivec_builtin_types): Use VSRAD for
	arithmetic shift of unsigned V2DI.

	* gcc.target/powerpc/pr79544.c: New.

From-SVN: r245818
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e2ebd83d21d7..6df3353f272a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2017-03-01  Pat Haugen  <pthaugen@us.ibm.com>
+
+	Backport from mainline:
+	2017-02-27  Pat Haugen  <pthaugen@us.ibm.com>
+
+	PR target/79544
+	* rs6000/rs6000-c.c (struct altivec_builtin_types): Use VSRAD for
+	arithmetic shift of unsigned V2DI.
+
 2017-03-01  Martin Jambor  <mjambor@suse.cz>
 
 	Backport from mainline
diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index 33cb27f083db..4b5433be5764 100644
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -2343,7 +2343,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRD,
+  { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
@@ -4158,7 +4158,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
 
   { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
-  { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRD,
+  { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
 
   { P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ,
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index cca71f0fa54a..7b7dc05095b0 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,16 @@
+2017-03-01  Pat Haugen  <pthaugen@us.ibm.com>
+
+	Backport from mainline:
+	2017-03-01  Pat Haugen  <pthaugen@us.ibm.com>
+
+	* gcc.target/powerpc/pr79544.c: Add test for vec_vsrad and fix up
+	scan string.
+
+	2017-02-27  Pat Haugen  <pthaugen@us.ibm.com>
+
+	PR target/79544
+	* gcc.target/powerpc/pr79544.c: New.
+
 2017-02-28  Eric Botcazou  <ebotcazou@adacore.com>
 
 	* gcc.target/sparc/20170228-1.c: New test.
diff --git a/gcc/testsuite/gcc.target/powerpc/pr79544.c b/gcc/testsuite/gcc.target/powerpc/pr79544.c
new file mode 100644
index 000000000000..1016fbdb4821
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr79544.c
@@ -0,0 +1,21 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-options "-mcpu=power8 -O2" } */
+
+#include <altivec.h>
+
+vector unsigned long long
+test_sra (vector unsigned long long x, vector unsigned long long y)
+{
+  return vec_sra (x, y);
+}
+
+vector unsigned long long
+test_vsrad (vector unsigned long long x, vector unsigned long long y)
+{
+  return vec_vsrad (x, y);
+}
+
+/* { dg-final { scan-assembler-times {\mvsrad\M} 2 } } */
+