From: Richard Henderson Date: Thu, 2 Jul 2026 20:43:02 +0000 (-0700) Subject: target/arm: Implement FMOP4 (non-widening) for float64 X-Git-Tag: v11.1.0-rc0~26^2~16 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=13c434a796c8d5b6fd3d3df8bc6c4ea3aaaba0a2;p=thirdparty%2Fqemu.git target/arm: Implement FMOP4 (non-widening) for float64 Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20260702204314.79224-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- diff --git a/target/arm/cpu-features.h b/target/arm/cpu-features.h index a1a4f37277..a07151e634 100644 --- a/target/arm/cpu-features.h +++ b/target/arm/cpu-features.h @@ -1812,6 +1812,11 @@ static inline bool isar_feature_aa64_sme_mop4_f16f16(const ARMISARegisters *id) return isar_feature_aa64_sme_mop4(id) && isar_feature_aa64_sme_f16f16(id); } +static inline bool isar_feature_aa64_sme_mop4_f64f64(const ARMISARegisters *id) +{ + return isar_feature_aa64_sme_mop4(id) && isar_feature_aa64_sme_f64f64(id); +} + /* * Feature tests for "does this exist in either 32-bit or 64-bit?" */ diff --git a/target/arm/tcg/helper-sme-defs.h b/target/arm/tcg/helper-sme-defs.h index ec7389d2ae..8a2ff88d49 100644 --- a/target/arm/tcg/helper-sme-defs.h +++ b/target/arm/tcg/helper-sme-defs.h @@ -363,3 +363,7 @@ DEF_HELPER_FLAGS_5(sme_ah_fmop4s_hh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst, DEF_HELPER_FLAGS_5(sme_fmop4a_ss, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst, i32) DEF_HELPER_FLAGS_5(sme_fmop4s_ss, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst, i32) DEF_HELPER_FLAGS_5(sme_ah_fmop4s_ss, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst, i32) + +DEF_HELPER_FLAGS_5(sme_fmop4a_dd, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst, i32) +DEF_HELPER_FLAGS_5(sme_fmop4s_dd, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst, i32) +DEF_HELPER_FLAGS_5(sme_ah_fmop4s_dd, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst, i32) diff --git a/target/arm/tcg/sme.decode b/target/arm/tcg/sme.decode index 227f3d7790..3b7d8e9430 100644 --- a/target/arm/tcg/sme.decode +++ b/target/arm/tcg/sme.decode @@ -1098,6 +1098,9 @@ LUTI4_s_4b 1100 0000 1001 101 1 00 00 00 ....0 zd:5 \ &mop4 zm=%mop4_zm zn=%mop4_zn @mop4_o2 .... .... ... m:1 .... .... .. n:1 ... . s:1 .. zad:2 \ &mop4 zm=%mop4_zm zn=%mop4_zn +@mop4_o3 .... .... ... m:1 .... .... .. n:1 ... . s:1 . zad:3 \ + &mop4 zm=%mop4_zm zn=%mop4_zn FMOP4_hh 1000 0001 000. ...0 0000 00.. ..0. 100. @mop4_o1 FMOP4_ss 1000 0000 000. ...0 0000 00.. ..0. 00.. @mop4_o2 +FMOP4_dd 1000 0000 110. ...0 0000 00.. ..0. 1... @mop4_o3 diff --git a/target/arm/tcg/sme_helper.c b/target/arm/tcg/sme_helper.c index c4d149f7f7..81ec7ccfa1 100644 --- a/target/arm/tcg/sme_helper.c +++ b/target/arm/tcg/sme_helper.c @@ -2719,3 +2719,45 @@ void HELPER(sme_ah_fmop4s_ss)(void *vza, void *vzn, void *vzm, { sme_mop4(vza, vzn, vzm, fpst, desc, sizeof(float32), inner_ah_fmop4s_ss); } + +static void inner_fmop4a_dd(void *vd, void *vn, void *vm, void *vinfo) +{ + float64 *d = vd, *n = vn, *m = vm; + float_status *fpst = vinfo; + + *d = float64_muladd(*n, *m, *d, 0, fpst); +} + +void HELPER(sme_fmop4a_dd)(void *vza, void *vzn, void *vzm, + float_status *fpst, uint32_t desc) +{ + sme_mop4(vza, vzn, vzm, fpst, desc, sizeof(float64), inner_fmop4a_dd); +} + +static void inner_fmop4s_dd(void *vd, void *vn, void *vm, void *vinfo) +{ + float64 *d = vd, *n = vn, *m = vm; + float_status *fpst = vinfo; + + *d = float64_muladd(float64_chs(*n), *m, *d, 0, fpst); +} + +void HELPER(sme_fmop4s_dd)(void *vza, void *vzn, void *vzm, + float_status *fpst, uint32_t desc) +{ + sme_mop4(vza, vzn, vzm, fpst, desc, sizeof(float64), inner_fmop4s_dd); +} + +static void inner_ah_fmop4s_dd(void *vd, void *vn, void *vm, void *vinfo) +{ + float64 *d = vd, *n = vn, *m = vm; + float_status *fpst = vinfo; + + *d = float64_muladd(*n, *m, *d, float_muladd_negate_product, fpst); +} + +void HELPER(sme_ah_fmop4s_dd)(void *vza, void *vzn, void *vzm, + float_status *fpst, uint32_t desc) +{ + sme_mop4(vza, vzn, vzm, fpst, desc, sizeof(float64), inner_ah_fmop4s_dd); +} diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c index d19cd274ac..b6c49b9993 100644 --- a/target/arm/tcg/translate-sme.c +++ b/target/arm/tcg/translate-sme.c @@ -2039,3 +2039,11 @@ static gen_helper_gvec_3_ptr * const fmop4_ss[3] = { gen_helper_sme_ah_fmop4s_ss }; TRANS_FEAT(FMOP4_ss, aa64_sme_mop4, do_mop4_fp, a, MO_32, FPST_ZA, fmop4_ss) + +static gen_helper_gvec_3_ptr * const fmop4_dd[3] = { + gen_helper_sme_fmop4a_dd, + gen_helper_sme_fmop4s_dd, + gen_helper_sme_ah_fmop4s_dd +}; +TRANS_FEAT(FMOP4_dd, aa64_sme_mop4_f64f64, + do_mop4_fp, a, MO_64, FPST_ZA, fmop4_dd)