From: Lehua Ding Date: Mon, 3 Jul 2023 08:28:59 +0000 (+0800) Subject: Revert "RISC-V: Support vfwnmacc/vfwmsac/vfwnmsac combine lowering" X-Git-Tag: basepoints/gcc-15~7880 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=14fa8c1d651a2e9fd3d9e75ab746589a36c86986;p=thirdparty%2Fgcc.git Revert "RISC-V: Support vfwnmacc/vfwmsac/vfwnmsac combine lowering" This reverts commit 47e6dcb597b2d4abcab13c9dea0cc7d2131b6419. --- diff --git a/gcc/config/riscv/autovec-opt.md b/gcc/config/riscv/autovec-opt.md index fd9cd27f50a2..80b85fa2de88 100644 --- a/gcc/config/riscv/autovec-opt.md +++ b/gcc/config/riscv/autovec-opt.md @@ -463,185 +463,3 @@ } [(set_attr "type" "vfwmuladd") (set_attr "mode" "")]) - -;; ------------------------------------------------------------------------- -;; ---- [FP] VFWNMSAC -;; ------------------------------------------------------------------------- -;; Includes: -;; - vfwnmsac.vv -;; ------------------------------------------------------------------------- - -;; Combine ext + ext + fnma ===> widen fnma. -;; Most of circumstantces, LoopVectorizer will generate the following IR: -;; vect__8.176_40 = (vector([2,2]) double) vect__7.175_41; -;; vect__11.180_35 = (vector([2,2]) double) vect__10.179_36; -;; vect__13.182_33 = .FNMA (vect__11.180_35, vect__8.176_40, vect__4.172_45); -(define_insn_and_split "*double_widen_fnma" - [(set (match_operand:VWEXTF 0 "register_operand") - (fma:VWEXTF - (neg:VWEXTF - (float_extend:VWEXTF - (match_operand: 2 "register_operand"))) - (float_extend:VWEXTF - (match_operand: 3 "register_operand")) - (match_operand:VWEXTF 1 "register_operand")))] - "TARGET_VECTOR && can_create_pseudo_p ()" - "#" - "&& 1" - [(const_int 0)] - { - riscv_vector::emit_vlmax_fp_ternary_insn (code_for_pred_widen_mul_neg (PLUS, mode), - riscv_vector::RVV_WIDEN_TERNOP, operands); - DONE; - } - [(set_attr "type" "vfwmuladd") - (set_attr "mode" "")]) - -;; This helps to match ext + fnma. -(define_insn_and_split "*single_widen_fnma" - [(set (match_operand:VWEXTF 0 "register_operand") - (fma:VWEXTF - (neg:VWEXTF - (float_extend:VWEXTF - (match_operand: 2 "register_operand"))) - (match_operand:VWEXTF 3 "register_operand") - (match_operand:VWEXTF 1 "register_operand")))] - "TARGET_VECTOR && can_create_pseudo_p ()" - "#" - "&& 1" - [(const_int 0)] - { - insn_code icode = code_for_pred_extend (mode); - rtx tmp = gen_reg_rtx (mode); - rtx ext_ops[] = {tmp, operands[2]}; - riscv_vector::emit_vlmax_insn (icode, riscv_vector::RVV_UNOP, ext_ops); - - rtx dst = expand_ternary_op (mode, fnma_optab, tmp, operands[3], - operands[1], operands[0], 0); - emit_move_insn (operands[0], dst); - DONE; - } - [(set_attr "type" "vfwmuladd") - (set_attr "mode" "")]) - -;; ------------------------------------------------------------------------- -;; ---- [FP] VFWMSAC -;; ------------------------------------------------------------------------- -;; Includes: -;; - vfwmsac.vv -;; ------------------------------------------------------------------------- - -;; Combine ext + ext + fms ===> widen fms. -;; Most of circumstantces, LoopVectorizer will generate the following IR: -;; vect__8.176_40 = (vector([2,2]) double) vect__7.175_41; -;; vect__11.180_35 = (vector([2,2]) double) vect__10.179_36; -;; vect__13.182_33 = .FMS (vect__11.180_35, vect__8.176_40, vect__4.172_45); -(define_insn_and_split "*double_widen_fms" - [(set (match_operand:VWEXTF 0 "register_operand") - (fma:VWEXTF - (float_extend:VWEXTF - (match_operand: 2 "register_operand")) - (float_extend:VWEXTF - (match_operand: 3 "register_operand")) - (neg:VWEXTF - (match_operand:VWEXTF 1 "register_operand"))))] - "TARGET_VECTOR && can_create_pseudo_p ()" - "#" - "&& 1" - [(const_int 0)] - { - riscv_vector::emit_vlmax_fp_ternary_insn (code_for_pred_widen_mul (MINUS, mode), - riscv_vector::RVV_WIDEN_TERNOP, operands); - DONE; - } - [(set_attr "type" "vfwmuladd") - (set_attr "mode" "")]) - -;; This helps to match ext + fms. -(define_insn_and_split "*single_widen_fms" - [(set (match_operand:VWEXTF 0 "register_operand") - (fma:VWEXTF - (float_extend:VWEXTF - (match_operand: 2 "register_operand")) - (match_operand:VWEXTF 3 "register_operand") - (neg:VWEXTF - (match_operand:VWEXTF 1 "register_operand"))))] - "TARGET_VECTOR && can_create_pseudo_p ()" - "#" - "&& 1" - [(const_int 0)] - { - insn_code icode = code_for_pred_extend (mode); - rtx tmp = gen_reg_rtx (mode); - rtx ext_ops[] = {tmp, operands[2]}; - riscv_vector::emit_vlmax_insn (icode, riscv_vector::RVV_UNOP, ext_ops); - - rtx dst = expand_ternary_op (mode, fms_optab, tmp, operands[3], - operands[1], operands[0], 0); - emit_move_insn (operands[0], dst); - DONE; - } - [(set_attr "type" "vfwmuladd") - (set_attr "mode" "")]) - -;; ------------------------------------------------------------------------- -;; ---- [FP] VFWNMACC -;; ------------------------------------------------------------------------- -;; Includes: -;; - vfwnmacc.vv -;; ------------------------------------------------------------------------- - -;; Combine ext + ext + fnms ===> widen fnms. -;; Most of circumstantces, LoopVectorizer will generate the following IR: -;; vect__8.176_40 = (vector([2,2]) double) vect__7.175_41; -;; vect__11.180_35 = (vector([2,2]) double) vect__10.179_36; -;; vect__13.182_33 = .FNMS (vect__11.180_35, vect__8.176_40, vect__4.172_45); -(define_insn_and_split "*double_widen_fnms" - [(set (match_operand:VWEXTF 0 "register_operand") - (fma:VWEXTF - (neg:VWEXTF - (float_extend:VWEXTF - (match_operand: 2 "register_operand"))) - (float_extend:VWEXTF - (match_operand: 3 "register_operand")) - (neg:VWEXTF - (match_operand:VWEXTF 1 "register_operand"))))] - "TARGET_VECTOR && can_create_pseudo_p ()" - "#" - "&& 1" - [(const_int 0)] - { - riscv_vector::emit_vlmax_fp_ternary_insn (code_for_pred_widen_mul_neg (MINUS, mode), - riscv_vector::RVV_WIDEN_TERNOP, operands); - DONE; - } - [(set_attr "type" "vfwmuladd") - (set_attr "mode" "")]) - -;; This helps to match ext + fnms. -(define_insn_and_split "*single_widen_fnms" - [(set (match_operand:VWEXTF 0 "register_operand") - (fma:VWEXTF - (neg:VWEXTF - (float_extend:VWEXTF - (match_operand: 2 "register_operand"))) - (match_operand:VWEXTF 3 "register_operand") - (neg:VWEXTF - (match_operand:VWEXTF 1 "register_operand"))))] - "TARGET_VECTOR && can_create_pseudo_p ()" - "#" - "&& 1" - [(const_int 0)] - { - insn_code icode = code_for_pred_extend (mode); - rtx tmp = gen_reg_rtx (mode); - rtx ext_ops[] = {tmp, operands[2]}; - riscv_vector::emit_vlmax_insn (icode, riscv_vector::RVV_UNOP, ext_ops); - - rtx dst = expand_ternary_op (mode, fnms_optab, tmp, operands[3], - operands[1], operands[0], 0); - emit_move_insn (operands[0], dst); - DONE; - } - [(set_attr "type" "vfwmuladd") - (set_attr "mode" "")]) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-10.c deleted file mode 100644 index 490f1a410682..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-10.c +++ /dev/null @@ -1,22 +0,0 @@ -/* { dg-do compile } */ -/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d --param=riscv-autovec-preference=scalable -O3 -ffast-math" } */ - -#include - -#define TEST_TYPE(TYPE1, TYPE2) \ - __attribute__ ((noipa)) void vwmacc_##TYPE1_##TYPE2 (TYPE1 *__restrict dst, \ - TYPE2 *__restrict a, \ - TYPE2 *__restrict b, \ - int n) \ - { \ - for (int i = 0; i < n; i++) \ - dst[i] += -((TYPE1) a[i] * (TYPE1) b[i]); \ - } - -#define TEST_ALL() \ - TEST_TYPE (float, _Float16) \ - TEST_TYPE (double, float) - -TEST_ALL () - -/* { dg-final { scan-assembler-times {\tvfwnmsac\.vv} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-11.c deleted file mode 100644 index 4d44a40fed3a..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-11.c +++ /dev/null @@ -1,22 +0,0 @@ -/* { dg-do compile } */ -/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d --param=riscv-autovec-preference=scalable -O3 -ffast-math" } */ - -#include - -#define TEST_TYPE(TYPE1, TYPE2) \ - __attribute__ ((noipa)) void vwmacc_##TYPE1_##TYPE2 (TYPE1 *__restrict dst, \ - TYPE2 *__restrict a, \ - TYPE2 *__restrict b, \ - int n) \ - { \ - for (int i = 0; i < n; i++) \ - dst[i] = (TYPE1) a[i] * (TYPE1) b[i] - dst[i]; \ - } - -#define TEST_ALL() \ - TEST_TYPE (float, _Float16) \ - TEST_TYPE (double, float) - -TEST_ALL () - -/* { dg-final { scan-assembler-times {\tvfwmsac\.vv} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-12.c deleted file mode 100644 index 2cb2a1edebf3..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-12.c +++ /dev/null @@ -1,22 +0,0 @@ -/* { dg-do compile } */ -/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d --param=riscv-autovec-preference=scalable -O3 -ffast-math" } */ - -#include - -#define TEST_TYPE(TYPE1, TYPE2) \ - __attribute__ ((noipa)) void vwmacc_##TYPE1_##TYPE2 (TYPE1 *__restrict dst, \ - TYPE2 *__restrict a, \ - TYPE2 *__restrict b, \ - int n) \ - { \ - for (int i = 0; i < n; i++) \ - dst[i] = -((TYPE1) a[i] * (TYPE1) b[i]) - dst[i]; \ - } - -#define TEST_ALL() \ - TEST_TYPE (float, _Float16) \ - TEST_TYPE (double, float) - -TEST_ALL () - -/* { dg-final { scan-assembler-times {\tvfwnmacc\.vv} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-complicate-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-complicate-7.c deleted file mode 100644 index 2e3f6664d936..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-complicate-7.c +++ /dev/null @@ -1,27 +0,0 @@ -/* { dg-do compile } */ -/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d --param=riscv-autovec-preference=scalable -ffast-math" } */ - -#include - -#define TEST_TYPE(TYPE1, TYPE2) \ - __attribute__ ((noipa)) void vwadd_##TYPE1_##TYPE2 ( \ - TYPE1 *__restrict dst, TYPE1 *__restrict dst2, TYPE1 *__restrict dst3, \ - TYPE1 *__restrict dst4, TYPE2 *__restrict a, TYPE2 *__restrict b, \ - TYPE2 *__restrict a2, TYPE2 *__restrict b2, int n) \ - { \ - for (int i = 0; i < n; i++) \ - { \ - dst[i] += -((TYPE1) a[i] * (TYPE1) b[i]); \ - dst2[i] += -((TYPE1) a2[i] * (TYPE1) b[i]); \ - dst3[i] += -((TYPE1) a2[i] * (TYPE1) a[i]); \ - dst4[i] += -((TYPE1) a[i] * (TYPE1) b2[i]); \ - } \ - } - -#define TEST_ALL() \ - TEST_TYPE (float, _Float16) \ - TEST_TYPE (double, float) - -TEST_ALL () - -/* { dg-final { scan-assembler-times {\tvfwnmsac\.vv} 8 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-complicate-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-complicate-8.c deleted file mode 100644 index 2acfbd01c6de..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-complicate-8.c +++ /dev/null @@ -1,27 +0,0 @@ -/* { dg-do compile } */ -/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d --param=riscv-autovec-preference=scalable -ffast-math" } */ - -#include - -#define TEST_TYPE(TYPE1, TYPE2) \ - __attribute__ ((noipa)) void vwadd_##TYPE1_##TYPE2 ( \ - TYPE1 *__restrict dst, TYPE1 *__restrict dst2, TYPE1 *__restrict dst3, \ - TYPE1 *__restrict dst4, TYPE2 *__restrict a, TYPE2 *__restrict b, \ - TYPE2 *__restrict a2, TYPE2 *__restrict b2, int n) \ - { \ - for (int i = 0; i < n; i++) \ - { \ - dst[i] = (TYPE1) a[i] * (TYPE1) b[i] - dst[i]; \ - dst2[i] = (TYPE1) a2[i] * (TYPE1) b[i] - dst2[i]; \ - dst3[i] = (TYPE1) a2[i] * (TYPE1) a[i] - dst3[i]; \ - dst4[i] = (TYPE1) a[i] * (TYPE1) b2[i] - dst4[i]; \ - } \ - } - -#define TEST_ALL() \ - TEST_TYPE (float, _Float16) \ - TEST_TYPE (double, float) - -TEST_ALL () - -/* { dg-final { scan-assembler-times {\tvfwmsac\.vv} 8 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-complicate-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-complicate-9.c deleted file mode 100644 index da7f870c12b9..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen-complicate-9.c +++ /dev/null @@ -1,27 +0,0 @@ -/* { dg-do compile } */ -/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d --param=riscv-autovec-preference=scalable -ffast-math" } */ - -#include - -#define TEST_TYPE(TYPE1, TYPE2) \ - __attribute__ ((noipa)) void vwadd_##TYPE1_##TYPE2 ( \ - TYPE1 *__restrict dst, TYPE1 *__restrict dst2, TYPE1 *__restrict dst3, \ - TYPE1 *__restrict dst4, TYPE2 *__restrict a, TYPE2 *__restrict b, \ - TYPE2 *__restrict a2, TYPE2 *__restrict b2, int n) \ - { \ - for (int i = 0; i < n; i++) \ - { \ - dst[i] = -((TYPE1) a[i] * (TYPE1) b[i]) - dst[i]; \ - dst2[i] = -((TYPE1) a2[i] * (TYPE1) b[i]) - dst2[i]; \ - dst3[i] = -((TYPE1) a2[i] * (TYPE1) a[i]) - dst3[i]; \ - dst4[i] = -((TYPE1) a[i] * (TYPE1) b2[i]) - dst4[i]; \ - } \ - } - -#define TEST_ALL() \ - TEST_TYPE (float, _Float16) \ - TEST_TYPE (double, float) - -TEST_ALL () - -/* { dg-final { scan-assembler-times {\tvfwnmacc\.vv} 8 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run-10.c deleted file mode 100644 index 262660c5bcda..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run-10.c +++ /dev/null @@ -1,32 +0,0 @@ -/* { dg-do run { target { riscv_vector } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */ - -#include -#include "widen-10.c" - -#define SZ 512 - -#define RUN(TYPE1, TYPE2, LIMIT) \ - TYPE2 a##TYPE2[SZ]; \ - TYPE2 b##TYPE2[SZ]; \ - TYPE1 dst##TYPE1[SZ]; \ - TYPE1 dst2##TYPE1[SZ]; \ - for (int i = 0; i < SZ; i++) \ - { \ - a##TYPE2[i] = LIMIT + i % 8723; \ - b##TYPE2[i] = LIMIT + i & 1964; \ - dst##TYPE1[i] = LIMIT + i & 628; \ - dst2##TYPE1[i] = LIMIT + i & 628; \ - } \ - vwmacc_##TYPE1_##TYPE2 (dst##TYPE1, a##TYPE2, b##TYPE2, SZ); \ - for (int i = 0; i < SZ; i++) \ - assert (dst##TYPE1[i] \ - == -((TYPE1) a##TYPE2[i] * (TYPE1) b##TYPE2[i]) + dst2##TYPE1[i]); - -#define RUN_ALL() RUN (double, float, -2147483648) - -int -main () -{ - RUN_ALL () -} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run-11.c deleted file mode 100644 index 246999cab623..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run-11.c +++ /dev/null @@ -1,32 +0,0 @@ -/* { dg-do run { target { riscv_vector } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */ - -#include -#include "widen-11.c" - -#define SZ 512 - -#define RUN(TYPE1, TYPE2, LIMIT) \ - TYPE2 a##TYPE2[SZ]; \ - TYPE2 b##TYPE2[SZ]; \ - TYPE1 dst##TYPE1[SZ]; \ - TYPE1 dst2##TYPE1[SZ]; \ - for (int i = 0; i < SZ; i++) \ - { \ - a##TYPE2[i] = LIMIT + i % 8723; \ - b##TYPE2[i] = LIMIT + i & 1964; \ - dst##TYPE1[i] = LIMIT + i & 628; \ - dst2##TYPE1[i] = LIMIT + i & 628; \ - } \ - vwmacc_##TYPE1_##TYPE2 (dst##TYPE1, a##TYPE2, b##TYPE2, SZ); \ - for (int i = 0; i < SZ; i++) \ - assert (dst##TYPE1[i] \ - == ((TYPE1) a##TYPE2[i] * (TYPE1) b##TYPE2[i]) - dst2##TYPE1[i]); - -#define RUN_ALL() RUN (double, float, -2147483648) - -int -main () -{ - RUN_ALL () -} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run-12.c deleted file mode 100644 index 2a6a03b5b35c..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run-12.c +++ /dev/null @@ -1,32 +0,0 @@ -/* { dg-do run { target { riscv_vector } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */ - -#include -#include "widen-12.c" - -#define SZ 512 - -#define RUN(TYPE1, TYPE2, LIMIT) \ - TYPE2 a##TYPE2[SZ]; \ - TYPE2 b##TYPE2[SZ]; \ - TYPE1 dst##TYPE1[SZ]; \ - TYPE1 dst2##TYPE1[SZ]; \ - for (int i = 0; i < SZ; i++) \ - { \ - a##TYPE2[i] = LIMIT + i % 8723; \ - b##TYPE2[i] = LIMIT + i & 1964; \ - dst##TYPE1[i] = LIMIT + i & 628; \ - dst2##TYPE1[i] = LIMIT + i & 628; \ - } \ - vwmacc_##TYPE1_##TYPE2 (dst##TYPE1, a##TYPE2, b##TYPE2, SZ); \ - for (int i = 0; i < SZ; i++) \ - assert (dst##TYPE1[i] \ - == -((TYPE1) a##TYPE2[i] * (TYPE1) b##TYPE2[i]) - dst2##TYPE1[i]); - -#define RUN_ALL() RUN (double, float, -2147483648) - -int -main () -{ - RUN_ALL () -} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-10.c deleted file mode 100644 index f678c35f81f7..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-10.c +++ /dev/null @@ -1,32 +0,0 @@ -/* { dg-do run { target { riscv_vector && riscv_zvfh_hw } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */ - -#include -#include "widen-10.c" - -#define SZ 512 - -#define RUN(TYPE1, TYPE2, LIMIT) \ - TYPE2 a##TYPE2[SZ]; \ - TYPE2 b##TYPE2[SZ]; \ - TYPE1 dst##TYPE1[SZ]; \ - TYPE1 dst2##TYPE1[SZ]; \ - for (int i = 0; i < SZ; i++) \ - { \ - a##TYPE2[i] = LIMIT + i % 8723; \ - b##TYPE2[i] = LIMIT + i & 1964; \ - dst##TYPE1[i] = LIMIT + i & 628; \ - dst2##TYPE1[i] = LIMIT + i & 628; \ - } \ - vwmacc_##TYPE1_##TYPE2 (dst##TYPE1, a##TYPE2, b##TYPE2, SZ); \ - for (int i = 0; i < SZ; i++) \ - assert (dst##TYPE1[i] \ - == -((TYPE1) a##TYPE2[i] * (TYPE1) b##TYPE2[i]) + dst2##TYPE1[i]); - -#define RUN_ALL() RUN (float, _Float16, -32768) - -int -main () -{ - RUN_ALL () -} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-11.c deleted file mode 100644 index 294f77dbc466..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-11.c +++ /dev/null @@ -1,32 +0,0 @@ -/* { dg-do run { target { riscv_vector && riscv_zvfh_hw } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */ - -#include -#include "widen-11.c" - -#define SZ 512 - -#define RUN(TYPE1, TYPE2, LIMIT) \ - TYPE2 a##TYPE2[SZ]; \ - TYPE2 b##TYPE2[SZ]; \ - TYPE1 dst##TYPE1[SZ]; \ - TYPE1 dst2##TYPE1[SZ]; \ - for (int i = 0; i < SZ; i++) \ - { \ - a##TYPE2[i] = LIMIT + i % 8723; \ - b##TYPE2[i] = LIMIT + i & 1964; \ - dst##TYPE1[i] = LIMIT + i & 628; \ - dst2##TYPE1[i] = LIMIT + i & 628; \ - } \ - vwmacc_##TYPE1_##TYPE2 (dst##TYPE1, a##TYPE2, b##TYPE2, SZ); \ - for (int i = 0; i < SZ; i++) \ - assert (dst##TYPE1[i] \ - == ((TYPE1) a##TYPE2[i] * (TYPE1) b##TYPE2[i]) - dst2##TYPE1[i]); - -#define RUN_ALL() RUN (float, _Float16, -32768) - -int -main () -{ - RUN_ALL () -} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-12.c deleted file mode 100644 index 013291cdc60f..000000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_run_zvfh-12.c +++ /dev/null @@ -1,32 +0,0 @@ -/* { dg-do run { target { riscv_vector && riscv_zvfh_hw } } } */ -/* { dg-additional-options "--param=riscv-autovec-preference=scalable -ffast-math" } */ - -#include -#include "widen-12.c" - -#define SZ 512 - -#define RUN(TYPE1, TYPE2, LIMIT) \ - TYPE2 a##TYPE2[SZ]; \ - TYPE2 b##TYPE2[SZ]; \ - TYPE1 dst##TYPE1[SZ]; \ - TYPE1 dst2##TYPE1[SZ]; \ - for (int i = 0; i < SZ; i++) \ - { \ - a##TYPE2[i] = LIMIT + i % 8723; \ - b##TYPE2[i] = LIMIT + i & 1964; \ - dst##TYPE1[i] = LIMIT + i & 628; \ - dst2##TYPE1[i] = LIMIT + i & 628; \ - } \ - vwmacc_##TYPE1_##TYPE2 (dst##TYPE1, a##TYPE2, b##TYPE2, SZ); \ - for (int i = 0; i < SZ; i++) \ - assert (dst##TYPE1[i] \ - == -((TYPE1) a##TYPE2[i] * (TYPE1) b##TYPE2[i]) - dst2##TYPE1[i]); - -#define RUN_ALL() RUN (float, _Float16, -32768) - -int -main () -{ - RUN_ALL () -}