From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Wed, 3 Jul 2024 13:57:35 +0000 (+0200)
Subject: 6.9-stable patches
X-Git-Tag: v4.19.317~15
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=15a037439f886e5b59ce93587139f1f732d08af6;p=thirdparty%2Fkernel%2Fstable-queue.git

6.9-stable patches

added patches:
	serial-imx-only-set-receiver-level-if-it-is-zero.patch
---

diff --git a/queue-6.9/serial-imx-only-set-receiver-level-if-it-is-zero.patch b/queue-6.9/serial-imx-only-set-receiver-level-if-it-is-zero.patch
new file mode 100644
index 00000000000..6e2649e8f8d
--- /dev/null
+++ b/queue-6.9/serial-imx-only-set-receiver-level-if-it-is-zero.patch
@@ -0,0 +1,56 @@
+From 9706fc87b4cff0ac4f5d5d62327be83fe72e3108 Mon Sep 17 00:00:00 2001
+From: Stefan Eichenberger <stefan.eichenberger@toradex.com>
+Date: Wed, 3 Jul 2024 13:25:40 +0200
+Subject: serial: imx: only set receiver level if it is zero
+
+From: Stefan Eichenberger <stefan.eichenberger@toradex.com>
+
+commit 9706fc87b4cff0ac4f5d5d62327be83fe72e3108 upstream.
+
+With commit a81dbd0463ec ("serial: imx: set receiver level before
+starting uart") we set the receiver level to its default value. This
+caused a regression when using SDMA, where the receiver level is 9
+instead of 8 (default). This change will first check if the receiver
+level is zero and only then set it to the default. This still avoids the
+interrupt storm when the receiver level is zero.
+
+Fixes: a81dbd0463ec ("serial: imx: set receiver level before starting uart")
+Cc: stable <stable@kernel.org>
+Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
+Link: https://lore.kernel.org/r/20240703112543.148304-1-eichest@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/tty/serial/imx.c |    8 ++++++--
+ 1 file changed, 6 insertions(+), 2 deletions(-)
+
+--- a/drivers/tty/serial/imx.c
++++ b/drivers/tty/serial/imx.c
+@@ -119,6 +119,7 @@
+ #define UCR4_OREN	(1<<1)	/* Receiver overrun interrupt enable */
+ #define UCR4_DREN	(1<<0)	/* Recv data ready interrupt enable */
+ #define UFCR_RXTL_SHF	0	/* Receiver trigger level shift */
++#define UFCR_RXTL_MASK	0x3F	/* Receiver trigger 6 bits wide */
+ #define UFCR_DCEDTE	(1<<6)	/* DCE/DTE mode select */
+ #define UFCR_RFDIV	(7<<7)	/* Reference freq divider mask */
+ #define UFCR_RFDIV_REG(x)	(((x) < 7 ? 6 - (x) : 6) << 7)
+@@ -1941,7 +1942,7 @@ static int imx_uart_rs485_config(struct
+ 				 struct serial_rs485 *rs485conf)
+ {
+ 	struct imx_port *sport = (struct imx_port *)port;
+-	u32 ucr2;
++	u32 ucr2, ufcr;
+ 
+ 	if (rs485conf->flags & SER_RS485_ENABLED) {
+ 		/* Enable receiver if low-active RTS signal is requested */
+@@ -1961,7 +1962,10 @@ static int imx_uart_rs485_config(struct
+ 	/* Make sure Rx is enabled in case Tx is active with Rx disabled */
+ 	if (!(rs485conf->flags & SER_RS485_ENABLED) ||
+ 	    rs485conf->flags & SER_RS485_RX_DURING_TX) {
+-		imx_uart_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT);
++		/* If the receiver trigger is 0, set it to a default value */
++		ufcr = imx_uart_readl(sport, UFCR);
++		if ((ufcr & UFCR_RXTL_MASK) == 0)
++			imx_uart_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT);
+ 		imx_uart_start_rx(port);
+ 	}
+ 
diff --git a/queue-6.9/series b/queue-6.9/series
index f58d1314938..d2f3ce74875 100644
--- a/queue-6.9/series
+++ b/queue-6.9/series
@@ -220,3 +220,4 @@ cxl-region-avoid-null-pointer-dereference-in-region-.patch
 cxl-region-check-interleave-capability.patch
 netfs-fix-netfs_page_mkwrite-to-check-folio-mapping-.patch
 netfs-fix-netfs_page_mkwrite-to-flush-conflicting-da.patch
+serial-imx-only-set-receiver-level-if-it-is-zero.patch