From: Julian Seward Date: Sun, 24 Dec 2006 02:20:24 +0000 (+0000) Subject: A large but non-functional commit: as suggested by Nick, rename some X-Git-Tag: svn/VALGRIND_3_3_1^2~74 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=18a1c8ec6d27fc5697376dd67569d74bc14980d9;p=thirdparty%2Fvalgrind.git A large but non-functional commit: as suggested by Nick, rename some IR types, structure fields and functions to make IR a bit easier to understand. Specifically: dopyIR* -> deepCopyIR* sopyIR* -> shallowCopyIR* The presence of a .Tmp union in both IRExpr and IRStmt is confusing. It has been renamed to RdTmp in IRExpr, reflecting the fact that here we are getting the value of an IRTemp, and to WrTmp in IRStmt, reflecting the fact that here we are assigning to an IRTemp. IRBB (IR Basic Block) is renamed to IRSB (IR SuperBlock), reflecting the reality that Vex does not really operate in terms of basic blocks, but in terms of superblocks - single entry, multiple exit sequences. IRArray is renamed to IRRegArray, to make it clearer it refers to arrays of guest registers and not arrays in memory. VexMiscInfo is renamed to VexAbiInfo, since that's what it is -- relevant facts about the ABI (calling conventions, etc) for both the guest and host platforms. git-svn-id: svn://svn.valgrind.org/vex/trunk@1689 --- diff --git a/VEX/priv/guest-amd64/gdefs.h b/VEX/priv/guest-amd64/gdefs.h index 01a8642265..888935dc12 100644 --- a/VEX/priv/guest-amd64/gdefs.h +++ b/VEX/priv/guest-amd64/gdefs.h @@ -57,7 +57,7 @@ /* Convert one amd64 insn to IR. See the type DisOneInstrFn in bb_to_IR.h. */ extern -DisResult disInstr_AMD64 ( IRBB* irbb, +DisResult disInstr_AMD64 ( IRSB* irbb, Bool put_IP, Bool (*resteerOkFn) ( void*, Addr64 ), void* callback_opaque, @@ -66,7 +66,7 @@ DisResult disInstr_AMD64 ( IRBB* irbb, Addr64 guest_IP, VexArch guest_arch, VexArchInfo* archinfo, - VexMiscInfo* miscinfo, + VexAbiInfo* abiinfo, Bool host_bigendian ); /* Used by the optimiser to specialise calls to helpers. */ diff --git a/VEX/priv/guest-amd64/toIR.c b/VEX/priv/guest-amd64/toIR.c index 9230590384..e96a72b83c 100644 --- a/VEX/priv/guest-amd64/toIR.c +++ b/VEX/priv/guest-amd64/toIR.c @@ -184,8 +184,8 @@ static Addr64 guest_RIP_bbstart; translated. */ static Addr64 guest_RIP_curr_instr; -/* The IRBB* into which we're generating code. */ -static IRBB* irbb; +/* The IRSB* into which we're generating code. */ +static IRSB* irsb; /* For ensuring that %rip-relative addressing is done right. A read of %rip generates the address of the next instruction. It may be @@ -211,19 +211,19 @@ static Bool guest_RIP_next_mustcheck; static IRTemp newTemp ( IRType ty ) { vassert(isPlausibleIRType(ty)); - return newIRTemp( irbb->tyenv, ty ); + return newIRTemp( irsb->tyenv, ty ); } -/* Add a statement to the list held by "irbb". */ +/* Add a statement to the list held by "irsb". */ static void stmt ( IRStmt* st ) { - addStmtToIRBB( irbb, st ); + addStmtToIRSB( irsb, st ); } /* Generate a statement "dst := e". */ static void assign ( IRTemp dst, IRExpr* e ) { - stmt( IRStmt_Tmp(dst, e) ); + stmt( IRStmt_WrTmp(dst, e) ); } static IRExpr* unop ( IROp op, IRExpr* a ) @@ -243,7 +243,7 @@ static IRExpr* triop ( IROp op, IRExpr* a1, IRExpr* a2, IRExpr* a3 ) static IRExpr* mkexpr ( IRTemp tmp ) { - return IRExpr_Tmp(tmp); + return IRExpr_RdTmp(tmp); } static IRExpr* mkU8 ( ULong i ) @@ -915,7 +915,7 @@ static IRExpr* getIRegCL ( void ) static void putIRegAH ( IRExpr* e ) { vassert(!host_is_bigendian); - vassert(typeOfIRExpr(irbb->tyenv, e) == Ity_I8); + vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_I8); stmt( IRStmt_Put( OFFB_RAX+1, e ) ); } @@ -948,7 +948,7 @@ static IRExpr* getIRegRAX ( Int sz ) static void putIRegRAX ( Int sz, IRExpr* e ) { - IRType ty = typeOfIRExpr(irbb->tyenv, e); + IRType ty = typeOfIRExpr(irsb->tyenv, e); vassert(!host_is_bigendian); switch (sz) { case 8: vassert(ty == Ity_I64); @@ -986,7 +986,7 @@ static IRExpr* getIRegRDX ( Int sz ) static void putIRegRDX ( Int sz, IRExpr* e ) { vassert(!host_is_bigendian); - vassert(typeOfIRExpr(irbb->tyenv, e) == szToITy(sz)); + vassert(typeOfIRExpr(irsb->tyenv, e) == szToITy(sz)); switch (sz) { case 8: stmt( IRStmt_Put( OFFB_RDX, e )); break; @@ -1012,7 +1012,7 @@ static IRExpr* getIReg64 ( UInt regno ) static void putIReg64 ( UInt regno, IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_I64); stmt( IRStmt_Put( integerGuestReg64Offset(regno), e ) ); } @@ -1034,7 +1034,7 @@ static IRExpr* getIReg32 ( UInt regno ) static void putIReg32 ( UInt regno, IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_I32); stmt( IRStmt_Put( integerGuestReg64Offset(regno), unop(Iop_32Uto64,e) ) ); } @@ -1105,7 +1105,7 @@ static void putIRegRexB ( Int sz, Prefix pfx, UInt lo3bits, IRExpr* e ) vassert(lo3bits < 8); vassert(IS_VALID_PFX(pfx)); vassert(sz == 8 || sz == 4 || sz == 2 || sz == 1); - vassert(typeOfIRExpr(irbb->tyenv, e) == szToITy(sz)); + vassert(typeOfIRExpr(irsb->tyenv, e) == szToITy(sz)); stmt( IRStmt_Put( offsetIReg( sz, lo3bits | (getRexB(pfx) << 3), toBool(sz==1 && !haveREX(pfx)) ), @@ -1170,7 +1170,7 @@ IRExpr* getIRegG ( Int sz, Prefix pfx, UChar mod_reg_rm ) static void putIRegG ( Int sz, Prefix pfx, UChar mod_reg_rm, IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv,e) == szToITy(sz)); + vassert(typeOfIRExpr(irsb->tyenv,e) == szToITy(sz)); if (sz == 4) { e = unop(Iop_32Uto64,e); } @@ -1210,7 +1210,7 @@ IRExpr* getIRegE ( Int sz, Prefix pfx, UChar mod_reg_rm ) static void putIRegE ( Int sz, Prefix pfx, UChar mod_reg_rm, IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv,e) == szToITy(sz)); + vassert(typeOfIRExpr(irsb->tyenv,e) == szToITy(sz)); if (sz == 4) { e = unop(Iop_32Uto64,e); } @@ -1299,7 +1299,7 @@ static Int xmmGuestRegLane64offset ( UInt xmmreg, Int laneno ) //.. //.. static void putSReg ( UInt sreg, IRExpr* e ) //.. { -//.. vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_I16); +//.. vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_I16); //.. stmt( IRStmt_Put( segmentGuestRegOffset(sreg), e ) ); //.. } @@ -1330,37 +1330,37 @@ static IRExpr* getXMMRegLane32F ( UInt xmmreg, Int laneno ) static void putXMMReg ( UInt xmmreg, IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_V128); + vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_V128); stmt( IRStmt_Put( xmmGuestRegOffset(xmmreg), e ) ); } static void putXMMRegLane64 ( UInt xmmreg, Int laneno, IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_I64); stmt( IRStmt_Put( xmmGuestRegLane64offset(xmmreg,laneno), e ) ); } static void putXMMRegLane64F ( UInt xmmreg, Int laneno, IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_F64); + vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_F64); stmt( IRStmt_Put( xmmGuestRegLane64offset(xmmreg,laneno), e ) ); } static void putXMMRegLane32F ( UInt xmmreg, Int laneno, IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_F32); + vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_F32); stmt( IRStmt_Put( xmmGuestRegLane32offset(xmmreg,laneno), e ) ); } static void putXMMRegLane32 ( UInt xmmreg, Int laneno, IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_I32); stmt( IRStmt_Put( xmmGuestRegLane32offset(xmmreg,laneno), e ) ); } static void putXMMRegLane16 ( UInt xmmreg, Int laneno, IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_I16); + vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_I16); stmt( IRStmt_Put( xmmGuestRegLane16offset(xmmreg,laneno), e ) ); } @@ -1371,8 +1371,8 @@ static IRExpr* mkV128 ( UShort mask ) static IRExpr* mkAnd1 ( IRExpr* x, IRExpr* y ) { - vassert(typeOfIRExpr(irbb->tyenv,x) == Ity_I1); - vassert(typeOfIRExpr(irbb->tyenv,y) == Ity_I1); + vassert(typeOfIRExpr(irsb->tyenv,x) == Ity_I1); + vassert(typeOfIRExpr(irsb->tyenv,y) == Ity_I1); return unop(Iop_64to1, binop(Iop_And64, unop(Iop_1Uto64,x), @@ -1475,7 +1475,7 @@ static Bool isLogic ( IROp op8 ) /* U-widen 8/16/32/64 bit int expr to 64. */ static IRExpr* widenUto64 ( IRExpr* e ) { - switch (typeOfIRExpr(irbb->tyenv,e)) { + switch (typeOfIRExpr(irsb->tyenv,e)) { case Ity_I64: return e; case Ity_I32: return unop(Iop_32Uto64, e); case Ity_I16: return unop(Iop_16Uto64, e); @@ -1487,7 +1487,7 @@ static IRExpr* widenUto64 ( IRExpr* e ) /* S-widen 8/16/32/64 bit int expr to 32. */ static IRExpr* widenSto64 ( IRExpr* e ) { - switch (typeOfIRExpr(irbb->tyenv,e)) { + switch (typeOfIRExpr(irsb->tyenv,e)) { case Ity_I64: return e; case Ity_I32: return unop(Iop_32Sto64, e); case Ity_I16: return unop(Iop_16Sto64, e); @@ -1500,7 +1500,7 @@ static IRExpr* widenSto64 ( IRExpr* e ) of these combinations make sense. */ static IRExpr* narrowTo ( IRType dst_ty, IRExpr* e ) { - IRType src_ty = typeOfIRExpr(irbb->tyenv,e); + IRType src_ty = typeOfIRExpr(irsb->tyenv,e); if (src_ty == dst_ty) return e; if (src_ty == Ity_I32 && dst_ty == Ity_I16) @@ -1902,14 +1902,14 @@ static HChar nameISize ( Int size ) static void jmp_lit( IRJumpKind kind, Addr64 d64 ) { - irbb->next = mkU64(d64); - irbb->jumpkind = kind; + irsb->next = mkU64(d64); + irsb->jumpkind = kind; } static void jmp_treg( IRJumpKind kind, IRTemp t ) { - irbb->next = mkexpr(t); - irbb->jumpkind = kind; + irsb->next = mkexpr(t); + irsb->jumpkind = kind; } static @@ -1922,14 +1922,14 @@ void jcc_01 ( AMD64Condcode cond, Addr64 d64_false, Addr64 d64_true ) stmt( IRStmt_Exit( mk_amd64g_calculate_condition(condPos), Ijk_Boring, IRConst_U64(d64_false) ) ); - irbb->next = mkU64(d64_true); - irbb->jumpkind = Ijk_Boring; + irsb->next = mkU64(d64_true); + irsb->jumpkind = Ijk_Boring; } else { stmt( IRStmt_Exit( mk_amd64g_calculate_condition(condPos), Ijk_Boring, IRConst_U64(d64_true) ) ); - irbb->next = mkU64(d64_false); - irbb->jumpkind = Ijk_Boring; + irsb->next = mkU64(d64_false); + irsb->jumpkind = Ijk_Boring; } } @@ -1938,9 +1938,9 @@ void jcc_01 ( AMD64Condcode cond, Addr64 d64_false, Addr64 d64_true ) be regarded as uninitialised. */ static -void make_redzone_AbiHint ( VexMiscInfo* vmi, IRTemp new_rsp, HChar* who ) +void make_redzone_AbiHint ( VexAbiInfo* vbi, IRTemp new_rsp, HChar* who ) { - Int szB = vmi->guest_stack_redzone_size; + Int szB = vbi->guest_stack_redzone_size; vassert(szB >= 0); /* A bit of a kludge. Currently the only AbI we've guested AMD64 @@ -1949,7 +1949,7 @@ void make_redzone_AbiHint ( VexMiscInfo* vmi, IRTemp new_rsp, HChar* who ) vassert(szB == 128); if (0) vex_printf("AbiHint: %s\n", who); - vassert(typeOfIRTemp(irbb->tyenv, new_rsp) == Ity_I64); + vassert(typeOfIRTemp(irsb->tyenv, new_rsp) == Ity_I64); if (szB > 0) stmt( IRStmt_AbiHint( binop(Iop_Sub64, mkexpr(new_rsp), mkU64(szB)), @@ -3642,7 +3642,7 @@ ULong dis_Grp4 ( Prefix pfx, Long delta ) /* Group 5 extended opcodes. */ static -ULong dis_Grp5 ( VexMiscInfo* vmi, +ULong dis_Grp5 ( VexAbiInfo* vbi, Prefix pfx, Int sz, Long delta, DisResult* dres ) { Int len; @@ -3683,7 +3683,7 @@ ULong dis_Grp5 ( VexMiscInfo* vmi, assign(t2, binop(Iop_Sub64, getIReg64(R_RSP), mkU64(8))); putIReg64(R_RSP, mkexpr(t2)); storeLE( mkexpr(t2), mkU64(guest_RIP_bbstart+delta+1)); - make_redzone_AbiHint(vmi, t2, "call-Ev(reg)"); + make_redzone_AbiHint(vbi, t2, "call-Ev(reg)"); jmp_treg(Ijk_Call,t3); dres->whatNext = Dis_StopHere; showSz = False; @@ -3738,7 +3738,7 @@ ULong dis_Grp5 ( VexMiscInfo* vmi, assign(t2, binop(Iop_Sub64, getIReg64(R_RSP), mkU64(8))); putIReg64(R_RSP, mkexpr(t2)); storeLE( mkexpr(t2), mkU64(guest_RIP_bbstart+delta+len)); - make_redzone_AbiHint(vmi, t2, "call-Ev(mem)"); + make_redzone_AbiHint(vbi, t2, "call-Ev(mem)"); jmp_treg(Ijk_Call,t3); dres->whatNext = Dis_StopHere; showSz = False; @@ -4052,7 +4052,7 @@ ULong dis_imul_I_E_G ( Prefix pfx, static void put_emwarn ( IRExpr* e /* :: Ity_I32 */ ) { - vassert(typeOfIRExpr(irbb->tyenv, e) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_I32); stmt( IRStmt_Put( OFFB_EMWARN, e ) ); } @@ -4076,7 +4076,7 @@ static IRExpr* get_ftop ( void ) static void put_ftop ( IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv, e) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_I32); stmt( IRStmt_Put( OFFB_FTOP, e ) ); } @@ -4089,7 +4089,7 @@ static IRExpr* /* :: Ity_I64 */ get_C3210 ( void ) static void put_C3210 ( IRExpr* e /* :: Ity_I64 */ ) { - vassert(typeOfIRExpr(irbb->tyenv, e) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_I64); stmt( IRStmt_Put( OFFB_FC3210, e ) ); } @@ -4101,7 +4101,7 @@ static IRExpr* /* :: Ity_I32 */ get_fpround ( void ) static void put_fpround ( IRExpr* /* :: Ity_I32 */ e ) { - vassert(typeOfIRExpr(irbb->tyenv, e) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_I32); stmt( IRStmt_Put( OFFB_FPROUND, unop(Iop_32Uto64,e) ) ); } @@ -4129,9 +4129,9 @@ static IRExpr* /* :: Ity_I32 */ get_FAKE_roundingmode ( void ) static void put_ST_TAG ( Int i, IRExpr* value ) { - IRArray* descr; - vassert(typeOfIRExpr(irbb->tyenv, value) == Ity_I8); - descr = mkIRArray( OFFB_FPTAGS, Ity_I8, 8 ); + IRRegArray* descr; + vassert(typeOfIRExpr(irsb->tyenv, value) == Ity_I8); + descr = mkIRRegArray( OFFB_FPTAGS, Ity_I8, 8 ); stmt( IRStmt_PutI( descr, get_ftop(), i, value ) ); } @@ -4140,7 +4140,7 @@ static void put_ST_TAG ( Int i, IRExpr* value ) static IRExpr* get_ST_TAG ( Int i ) { - IRArray* descr = mkIRArray( OFFB_FPTAGS, Ity_I8, 8 ); + IRRegArray* descr = mkIRRegArray( OFFB_FPTAGS, Ity_I8, 8 ); return IRExpr_GetI( descr, get_ftop(), i ); } @@ -4153,9 +4153,9 @@ static IRExpr* get_ST_TAG ( Int i ) static void put_ST_UNCHECKED ( Int i, IRExpr* value ) { - IRArray* descr; - vassert(typeOfIRExpr(irbb->tyenv, value) == Ity_F64); - descr = mkIRArray( OFFB_FPREGS, Ity_F64, 8 ); + IRRegArray* descr; + vassert(typeOfIRExpr(irsb->tyenv, value) == Ity_F64); + descr = mkIRRegArray( OFFB_FPREGS, Ity_F64, 8 ); stmt( IRStmt_PutI( descr, get_ftop(), i, value ) ); /* Mark the register as in-use. */ put_ST_TAG(i, mkU8(1)); @@ -4183,7 +4183,7 @@ static void put_ST ( Int i, IRExpr* value ) static IRExpr* get_ST_UNCHECKED ( Int i ) { - IRArray* descr = mkIRArray( OFFB_FPREGS, Ity_F64, 8 ); + IRRegArray* descr = mkIRRegArray( OFFB_FPREGS, Ity_F64, 8 ); return IRExpr_GetI( descr, get_ftop(), i ); } @@ -5599,7 +5599,7 @@ ULong dis_FPU ( /*OUT*/Bool* decode_ok, case 7: { /* FNSTSW m16 */ IRExpr* sw = get_FPU_sw(); - vassert(typeOfIRExpr(irbb->tyenv, sw) == Ity_I16); + vassert(typeOfIRExpr(irsb->tyenv, sw) == Ity_I16); storeLE( mkexpr(addr), sw ); DIP("fnstsw %s\n", dis_buf); break; @@ -5935,10 +5935,10 @@ ULong dis_FPU ( /*OUT*/Bool* decode_ok, static void do_MMX_preamble ( void ) { - Int i; - IRArray* descr = mkIRArray( OFFB_FPTAGS, Ity_I8, 8 ); - IRExpr* zero = mkU32(0); - IRExpr* tag1 = mkU8(1); + Int i; + IRRegArray* descr = mkIRRegArray( OFFB_FPTAGS, Ity_I8, 8 ); + IRExpr* zero = mkU32(0); + IRExpr* tag1 = mkU8(1); put_ftop(zero); for (i = 0; i < 8; i++) stmt( IRStmt_PutI( descr, zero, i, tag1 ) ); @@ -5946,10 +5946,10 @@ static void do_MMX_preamble ( void ) static void do_EMMS_preamble ( void ) { - Int i; - IRArray* descr = mkIRArray( OFFB_FPTAGS, Ity_I8, 8 ); - IRExpr* zero = mkU32(0); - IRExpr* tag0 = mkU8(0); + Int i; + IRRegArray* descr = mkIRRegArray( OFFB_FPTAGS, Ity_I8, 8 ); + IRExpr* zero = mkU32(0); + IRExpr* tag0 = mkU8(0); put_ftop(zero); for (i = 0; i < 8; i++) stmt( IRStmt_PutI( descr, zero, i, tag0 ) ); @@ -5966,7 +5966,7 @@ static IRExpr* getMMXReg ( UInt archreg ) static void putMMXReg ( UInt archreg, IRExpr* e ) { vassert(archreg < 8); - vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_I64); stmt( IRStmt_Put( OFFB_FPREGS + 8 * archreg, e ) ); } @@ -7582,7 +7582,7 @@ ULong dis_xadd_G_E ( /*OUT*/Bool* decode_ok, //.. } static -void dis_ret ( VexMiscInfo* vmi, ULong d64 ) +void dis_ret ( VexAbiInfo* vbi, ULong d64 ) { IRTemp t1 = newTemp(Ity_I64); IRTemp t2 = newTemp(Ity_I64); @@ -7591,7 +7591,7 @@ void dis_ret ( VexMiscInfo* vmi, ULong d64 ) assign(t2, loadLE(Ity_I64,mkexpr(t1))); assign(t3, binop(Iop_Add64, mkexpr(t1), mkU64(8+d64))); putIReg64(R_RSP, mkexpr(t3)); - make_redzone_AbiHint(vmi, t3, "ret"); + make_redzone_AbiHint(vbi, t3, "ret"); jmp_treg(Ijk_Ret,t2); } @@ -8138,7 +8138,7 @@ static IRExpr* /* :: Ity_I32 */ get_sse_roundingmode ( void ) static void put_sse_roundingmode ( IRExpr* sseround ) { - vassert(typeOfIRExpr(irbb->tyenv, sseround) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv, sseround) == Ity_I32); stmt( IRStmt_Put( OFFB_SSEROUND, unop(Iop_32Uto64,sseround) ) ); } @@ -8236,7 +8236,7 @@ DisResult disInstr_AMD64_WRK ( void* callback_opaque, Long delta64, VexArchInfo* archinfo, - VexMiscInfo* vmi + VexAbiInfo* vmi ) { IRType ty; @@ -11909,8 +11909,8 @@ DisResult disInstr_AMD64_WRK ( stmt( IRStmt_Put(OFFB_TILEN, mkU64(lineszB) ) ); - irbb->jumpkind = Ijk_TInval; - irbb->next = mkU64(guest_RIP_bbstart+delta); + irsb->jumpkind = Ijk_TInval; + irsb->next = mkU64(guest_RIP_bbstart+delta); dres.whatNext = Dis_StopHere; DIP("clflush %s\n", dis_buf); @@ -14351,7 +14351,7 @@ DisResult disInstr_AMD64_WRK ( /* Disassemble a single instruction into IR. The instruction is located in host memory at &guest_code[delta]. */ -DisResult disInstr_AMD64 ( IRBB* irbb_IN, +DisResult disInstr_AMD64 ( IRSB* irsb_IN, Bool put_IP, Bool (*resteerOkFn) ( void*, Addr64 ), void* callback_opaque, @@ -14360,7 +14360,7 @@ DisResult disInstr_AMD64 ( IRBB* irbb_IN, Addr64 guest_IP, VexArch guest_arch, VexArchInfo* archinfo, - VexMiscInfo* miscinfo, + VexAbiInfo* abiinfo, Bool host_bigendian_IN ) { DisResult dres; @@ -14368,7 +14368,7 @@ DisResult disInstr_AMD64 ( IRBB* irbb_IN, /* Set globals (see top of this file) */ vassert(guest_arch == VexArchAMD64); guest_code = guest_code_IN; - irbb = irbb_IN; + irsb = irsb_IN; host_is_bigendian = host_bigendian_IN; guest_RIP_curr_instr = guest_IP; guest_RIP_bbstart = guest_IP - delta; @@ -14378,7 +14378,7 @@ DisResult disInstr_AMD64 ( IRBB* irbb_IN, guest_RIP_next_mustcheck = False; dres = disInstr_AMD64_WRK ( put_IP, resteerOkFn, callback_opaque, - delta, archinfo, miscinfo ); + delta, archinfo, abiinfo ); /* If disInstr_AMD64_WRK tried to figure out the next rip, check it got it right. Failure of this assertion is serious and denotes diff --git a/VEX/priv/guest-arm/gdefs.h b/VEX/priv/guest-arm/gdefs.h index 1060163af0..733383636e 100644 --- a/VEX/priv/guest-arm/gdefs.h +++ b/VEX/priv/guest-arm/gdefs.h @@ -55,7 +55,7 @@ /*---------------------------------------------------------*/ extern -IRBB* bbToIR_ARM ( UChar* armCode, +IRSB* bbToIR_ARM ( UChar* armCode, Addr64 eip, VexGuestExtents* vge, Bool (*byte_accessible)(Addr64), diff --git a/VEX/priv/guest-arm/toIR.c b/VEX/priv/guest-arm/toIR.c index 6719a53759..183f05b059 100644 --- a/VEX/priv/guest-arm/toIR.c +++ b/VEX/priv/guest-arm/toIR.c @@ -77,8 +77,8 @@ static UChar* guest_code; /* CONST */ static Addr32 guest_pc_bbstart; -/* The IRBB* into which we're generating code. */ -static IRBB* irbb; +/* The IRSB* into which we're generating code. */ +static IRSB* irsb; /*------------------------------------------------------------*/ @@ -169,10 +169,10 @@ static DisResult disInstr ( /*IN*/ Bool resteerOK, /* This is the main (only, in fact) entry point for this module. */ /* Disassemble a complete basic block, starting at guest_pc_start, and - dumping the IR into global irbb. Returns the size, in bytes, of + dumping the IR into global irsb. Returns the size, in bytes, of the basic block. */ -IRBB* bbToIR_ARM ( UChar* armCode, +IRSB* bbToIR_ARM ( UChar* armCode, Addr64 guest_pc_start, VexGuestExtents* vge, Bool (*byte_accessible)(Addr64), @@ -205,7 +205,7 @@ IRBB* bbToIR_ARM ( UChar* armCode, host_is_bigendian = host_bigendian; guest_code = armCode; guest_pc_bbstart = (Addr32)guest_pc_start; - irbb = emptyIRBB(); + irsb = emptyIRSB(); vassert((guest_pc_start >> 32) == 0); @@ -219,7 +219,7 @@ IRBB* bbToIR_ARM ( UChar* armCode, guest_next = 0; resteerOK = toBool(n_instrs < vex_control.guest_chase_thresh); - first_stmt_idx = irbb->stmts_used; + first_stmt_idx = irsb->stmts_used; if (n_instrs > 0) { /* for the first insn, the dispatch loop will have set @@ -232,21 +232,21 @@ IRBB* bbToIR_ARM ( UChar* armCode, /* Print the resulting IR, if needed. */ if (vex_traceflags & VEX_TRACE_FE) { - for (i = first_stmt_idx; i < irbb->stmts_used; i++) { + for (i = first_stmt_idx; i < irsb->stmts_used; i++) { vex_printf(" "); - ppIRStmt(irbb->stmts[i]); + ppIRStmt(irsb->stmts[i]); vex_printf("\n"); } } if (dres == Dis_StopHere) { - vassert(irbb->next != NULL); + vassert(irsb->next != NULL); if (vex_traceflags & VEX_TRACE_FE) { vex_printf(" "); vex_printf( "goto {"); - ppIRJumpKind(irbb->jumpkind); + ppIRJumpKind(irsb->jumpkind); vex_printf( "} "); - ppIRExpr( irbb->next ); + ppIRExpr( irsb->next ); vex_printf( "\n"); } } @@ -264,21 +264,21 @@ IRBB* bbToIR_ARM ( UChar* armCode, switch (dres) { case Dis_Continue: - vassert(irbb->next == NULL); + vassert(irsb->next == NULL); if (n_instrs < vex_control.guest_max_insns) { /* keep going */ } else { - irbb->next = mkU32(toUInt(guest_pc_start+delta)); - return irbb; + irsb->next = mkU32(toUInt(guest_pc_start+delta)); + return irsb; } break; case Dis_StopHere: - vassert(irbb->next != NULL); - return irbb; + vassert(irsb->next != NULL); + return irsb; case Dis_Resteer: vpanic("bbToIR_ARM: Dis_Resteer: fixme"); /* need to add code here to start a new extent ... */ - vassert(irbb->next == NULL); + vassert(irsb->next == NULL); /* figure out a new delta to continue at. */ vassert(chase_into_ok(guest_next)); delta = guest_next - guest_pc_start; @@ -299,17 +299,17 @@ IRBB* bbToIR_ARM ( UChar* armCode, /*--- ARM insn stream. ---*/ /*------------------------------------------------------------*/ -/* Add a statement to the list held by "irbb". */ +/* Add a statement to the list held by "irsb". */ static void stmt ( IRStmt* st ) { - addStmtToIRBB( irbb, st ); + addStmtToIRSB( irsb, st ); } /* Generate a new temporary of the given type. */ static IRTemp newTemp ( IRType ty ) { vassert(isPlausibleIRType(ty)); - return newIRTemp( irbb->tyenv, ty ); + return newIRTemp( irsb->tyenv, ty ); } #if 0 @@ -490,7 +490,7 @@ static void putIReg ( UInt archreg, IRExpr* e ) static void assign ( IRTemp dst, IRExpr* e ) { - stmt( IRStmt_Tmp(dst, e) ); + stmt( IRStmt_WrTmp(dst, e) ); } static void storeLE ( IRExpr* addr, IRExpr* data ) @@ -510,7 +510,7 @@ static IRExpr* binop ( IROp op, IRExpr* a1, IRExpr* a2 ) static IRExpr* mkexpr ( IRTemp tmp ) { - return IRExpr_Tmp(tmp); + return IRExpr_RdTmp(tmp); } static IRExpr* mkU8 ( UChar i ) @@ -700,7 +700,7 @@ static Bool isLogic ( IROp op8 ) /* U-widen 8/16/32 bit int expr to 32. */ static IRExpr* widenUto32 ( IRExpr* e ) { - switch (typeOfIRExpr(irbb->tyenv,e)) { + switch (typeOfIRExpr(irsb->tyenv,e)) { case Ity_I32: return e; case Ity_I16: return unop(Iop_16Uto32,e); case Ity_I8: return unop(Iop_8Uto32,e); @@ -712,7 +712,7 @@ static IRExpr* widenUto32 ( IRExpr* e ) /* S-widen 8/16/32 bit int expr to 32. */ static IRExpr* widenSto32 ( IRExpr* e ) { - switch (typeOfIRExpr(irbb->tyenv,e)) { + switch (typeOfIRExpr(irsb->tyenv,e)) { case Ity_I32: return e; case Ity_I16: return unop(Iop_16Sto32,e); case Ity_I8: return unop(Iop_8Sto32,e); @@ -725,7 +725,7 @@ static IRExpr* widenSto32 ( IRExpr* e ) of these combinations make sense. */ static IRExpr* narrowTo ( IRType dst_ty, IRExpr* e ) { - IRType src_ty = typeOfIRExpr(irbb->tyenv,e); + IRType src_ty = typeOfIRExpr(irsb->tyenv,e); if (src_ty == dst_ty) return e; if (src_ty == Ity_I32 && dst_ty == Ity_I16) @@ -1344,8 +1344,8 @@ Bool dis_loadstore_w_ub ( UInt theInstr ) putIReg( Rd_addr, binop(Iop_And32, mkexpr(value), mkU32(0xFFFFFFFC)) ); // CAB: Need to tell vex we're doing a jump here? - // irbb->jumpkind = Ijk_Boring; - // irbb->next = mkexpr(value); + // irsb->jumpkind = Ijk_Boring; + // irsb->next = mkexpr(value); } else { putIReg( Rd_addr, mkexpr(value) ); } @@ -1863,8 +1863,8 @@ void dis_branch ( UInt theInstr ) branch_offset = extend_s_24to32( signed_immed_24 ) << 2; assign( dest, binop(Iop_Add32, getIReg(15), mkU32(branch_offset)) ); - irbb->jumpkind = link ? Ijk_Call : Ijk_Boring; - irbb->next = mkexpr(dest); + irsb->jumpkind = link ? Ijk_Call : Ijk_Boring; + irsb->next = mkexpr(dest); // Note: Not actually writing to R15 - let the IR stuff do that. @@ -1964,8 +1964,8 @@ static DisResult disInstr ( /*IN*/ Bool resteerOK, *size = 24; - irbb->next = mkU32(toUInt(guest_pc_bbstart+delta)); - irbb->jumpkind = Ijk_ClientReq; + irsb->next = mkU32(toUInt(guest_pc_bbstart+delta)); + irsb->jumpkind = Ijk_ClientReq; whatNext = Dis_StopHere; goto decode_success; @@ -1995,8 +1995,8 @@ static DisResult disInstr ( /*IN*/ Bool resteerOK, stmt( IRStmt_Exit( mk_armg_calculate_condition(cond), Ijk_Boring, IRConst_U32(toUInt(guest_pc_bbstart+delta+4)) ) ); - //irbb->next = mkU32(guest_pc_bbstart+delta+4); - //irbb->jumpkind = Ijk_Boring; + //irsb->next = mkU32(guest_pc_bbstart+delta+4); + //irsb->jumpkind = Ijk_Boring; } diff --git a/VEX/priv/guest-generic/bb_to_IR.c b/VEX/priv/guest-generic/bb_to_IR.c index e262a551ad..da2ba9c74b 100644 --- a/VEX/priv/guest-generic/bb_to_IR.c +++ b/VEX/priv/guest-generic/bb_to_IR.c @@ -92,7 +92,7 @@ static Bool const_False ( void* callback_opaque, Addr64 a ) { (In fact it's a VgInstrumentClosure.) */ -IRBB* bb_to_IR ( /*OUT*/VexGuestExtents* vge, +IRSB* bb_to_IR ( /*OUT*/VexGuestExtents* vge, /*IN*/ void* callback_opaque, /*IN*/ DisOneInstrFn dis_instr_fn, /*IN*/ UChar* guest_code, @@ -101,10 +101,10 @@ IRBB* bb_to_IR ( /*OUT*/VexGuestExtents* vge, /*IN*/ Bool host_bigendian, /*IN*/ VexArch arch_guest, /*IN*/ VexArchInfo* archinfo_guest, - /*IN*/ VexMiscInfo* miscinfo_both, + /*IN*/ VexAbiInfo* abiinfo_both, /*IN*/ IRType guest_word_type, /*IN*/ Bool do_self_check, - /*IN*/ Bool (*preamble_function)(void*,IRBB*), + /*IN*/ Bool (*preamble_function)(void*,IRSB*), /*IN*/ Int offB_TISTART, /*IN*/ Int offB_TILEN ) { @@ -116,7 +116,7 @@ IRBB* bb_to_IR ( /*OUT*/VexGuestExtents* vge, static Int n_resteers = 0; Int d_resteers = 0; Int selfcheck_idx = 0; - IRBB* irbb; + IRSB* irsb; Addr64 guest_IP_curr_instr; IRConst* guest_IP_bbstart_IRConst = NULL; @@ -142,8 +142,8 @@ IRBB* bb_to_IR ( /*OUT*/VexGuestExtents* vge, vge->base[0] = guest_IP_bbstart; vge->len[0] = 0; - /* And a new IR BB to dump the result into. */ - irbb = emptyIRBB(); + /* And a new IR superblock to dump the result into. */ + irsb = emptyIRSB(); /* Delta keeps track of how far along the guest_code array we have so far gone. */ @@ -163,25 +163,25 @@ IRBB* bb_to_IR ( /*OUT*/VexGuestExtents* vge, in which to put the check statements. We'll fill them in later when we know the length and adler32 of the area to check. */ if (do_self_check) { - selfcheck_idx = irbb->stmts_used; - addStmtToIRBB( irbb, IRStmt_NoOp() ); - addStmtToIRBB( irbb, IRStmt_NoOp() ); - addStmtToIRBB( irbb, IRStmt_NoOp() ); - addStmtToIRBB( irbb, IRStmt_NoOp() ); - addStmtToIRBB( irbb, IRStmt_NoOp() ); + selfcheck_idx = irsb->stmts_used; + addStmtToIRSB( irsb, IRStmt_NoOp() ); + addStmtToIRSB( irsb, IRStmt_NoOp() ); + addStmtToIRSB( irsb, IRStmt_NoOp() ); + addStmtToIRSB( irsb, IRStmt_NoOp() ); + addStmtToIRSB( irsb, IRStmt_NoOp() ); } /* If the caller supplied a function to add its own preamble, use it now. */ if (preamble_function) { - Bool stopNow = preamble_function( callback_opaque, irbb ); + Bool stopNow = preamble_function( callback_opaque, irsb ); if (stopNow) { /* The callback has completed the IR block without any guest insns being disassembled into it, so just return it at this point, even if a self-check was requested - as there is nothing to self-check. The five self-check no-ops will still be in place, but they are harmless. */ - return irbb; + return irsb; } } @@ -211,22 +211,22 @@ IRBB* bb_to_IR ( /*OUT*/VexGuestExtents* vge, with. */ guest_IP_curr_instr = guest_IP_bbstart + delta; - /* This is the irbb statement array index of the first stmt in + /* This is the irsb statement array index of the first stmt in this insn. That will always be the instruction-mark descriptor. */ - first_stmt_idx = irbb->stmts_used; + first_stmt_idx = irsb->stmts_used; /* Add an instruction-mark statement. We won't know until after disassembling the instruction how long it instruction is, so just put in a zero length and we'll fix it up later. */ - addStmtToIRBB( irbb, IRStmt_IMark( guest_IP_curr_instr, 0 )); + addStmtToIRSB( irsb, IRStmt_IMark( guest_IP_curr_instr, 0 )); /* for the first insn, the dispatch loop will have set %IP, but for all the others we have to do it ourselves. */ need_to_put_IP = toBool(n_instrs > 0); /* Finally, actually disassemble an instruction. */ - dres = dis_instr_fn ( irbb, + dres = dis_instr_fn ( irsb, need_to_put_IP, resteerOKfn, callback_opaque, @@ -235,7 +235,7 @@ IRBB* bb_to_IR ( /*OUT*/VexGuestExtents* vge, guest_IP_curr_instr, arch_guest, archinfo_guest, - miscinfo_both, + abiinfo_both, host_bigendian ); /* stay sane ... */ @@ -247,8 +247,8 @@ IRBB* bb_to_IR ( /*OUT*/VexGuestExtents* vge, vassert(dres.continueAt == 0); /* Fill in the insn-mark length field. */ - vassert(first_stmt_idx >= 0 && first_stmt_idx < irbb->stmts_used); - imark = irbb->stmts[first_stmt_idx]; + vassert(first_stmt_idx >= 0 && first_stmt_idx < irsb->stmts_used); + imark = irsb->stmts[first_stmt_idx]; vassert(imark); vassert(imark->tag == Ist_IMark); vassert(imark->Ist.IMark.len == 0); @@ -256,23 +256,23 @@ IRBB* bb_to_IR ( /*OUT*/VexGuestExtents* vge, /* Print the resulting IR, if needed. */ if (vex_traceflags & VEX_TRACE_FE) { - for (i = first_stmt_idx; i < irbb->stmts_used; i++) { + for (i = first_stmt_idx; i < irsb->stmts_used; i++) { vex_printf(" "); - ppIRStmt(irbb->stmts[i]); + ppIRStmt(irsb->stmts[i]); vex_printf("\n"); } } /* If dis_instr_fn terminated the BB at this point, check it - also filled in the irbb->next field. */ + also filled in the irsb->next field. */ if (dres.whatNext == Dis_StopHere) { - vassert(irbb->next != NULL); + vassert(irsb->next != NULL); if (debug_print) { vex_printf(" "); vex_printf( "goto {"); - ppIRJumpKind(irbb->jumpkind); + ppIRJumpKind(irsb->jumpkind); vex_printf( "} "); - ppIRExpr( irbb->next ); + ppIRExpr( irsb->next ); vex_printf( "\n"); } } @@ -294,12 +294,12 @@ IRBB* bb_to_IR ( /*OUT*/VexGuestExtents* vge, switch (dres.whatNext) { case Dis_Continue: - vassert(irbb->next == NULL); + vassert(irsb->next == NULL); if (n_instrs < vex_control.guest_max_insns) { /* keep going */ } else { /* We have to stop. */ - irbb->next + irsb->next = IRExpr_Const( guest_word_type == Ity_I32 ? IRConst_U32(toUInt(guest_IP_bbstart+delta)) @@ -309,12 +309,12 @@ IRBB* bb_to_IR ( /*OUT*/VexGuestExtents* vge, } break; case Dis_StopHere: - vassert(irbb->next != NULL); + vassert(irsb->next != NULL); goto done; case Dis_Resteer: /* Check that we actually allowed a resteer .. */ vassert(resteerOK); - vassert(irbb->next == NULL); + vassert(irsb->next == NULL); /* figure out a new delta to continue at. */ vassert(resteerOKfn(callback_opaque,dres.continueAt)); delta = dres.continueAt - guest_IP_bbstart; @@ -357,30 +357,30 @@ IRBB* bb_to_IR ( /*OUT*/VexGuestExtents* vge, the area of guest code to invalidate should we exit with a self-check failure. */ - tistart_tmp = newIRTemp(irbb->tyenv, guest_word_type); - tilen_tmp = newIRTemp(irbb->tyenv, guest_word_type); + tistart_tmp = newIRTemp(irsb->tyenv, guest_word_type); + tilen_tmp = newIRTemp(irsb->tyenv, guest_word_type); - irbb->stmts[selfcheck_idx+0] - = IRStmt_Tmp(tistart_tmp, IRExpr_Const(guest_IP_bbstart_IRConst) ); + irsb->stmts[selfcheck_idx+0] + = IRStmt_WrTmp(tistart_tmp, IRExpr_Const(guest_IP_bbstart_IRConst) ); - irbb->stmts[selfcheck_idx+1] - = IRStmt_Tmp(tilen_tmp, - guest_word_type==Ity_I32 - ? IRExpr_Const(IRConst_U32(len2check)) - : IRExpr_Const(IRConst_U64(len2check)) + irsb->stmts[selfcheck_idx+1] + = IRStmt_WrTmp(tilen_tmp, + guest_word_type==Ity_I32 + ? IRExpr_Const(IRConst_U32(len2check)) + : IRExpr_Const(IRConst_U64(len2check)) ); - irbb->stmts[selfcheck_idx+2] - = IRStmt_Put( offB_TISTART, IRExpr_Tmp(tistart_tmp) ); + irsb->stmts[selfcheck_idx+2] + = IRStmt_Put( offB_TISTART, IRExpr_RdTmp(tistart_tmp) ); - irbb->stmts[selfcheck_idx+3] - = IRStmt_Put( offB_TILEN, IRExpr_Tmp(tilen_tmp) ); + irsb->stmts[selfcheck_idx+3] + = IRStmt_Put( offB_TILEN, IRExpr_RdTmp(tilen_tmp) ); - p_adler_helper = miscinfo_both->host_ppc_calls_use_fndescrs + p_adler_helper = abiinfo_both->host_ppc_calls_use_fndescrs ? ((HWord*)(&genericg_compute_adler32))[0] : (HWord)&genericg_compute_adler32; - irbb->stmts[selfcheck_idx+4] + irsb->stmts[selfcheck_idx+4] = IRStmt_Exit( IRExpr_Binop( Iop_CmpNE32, @@ -401,7 +401,7 @@ IRBB* bb_to_IR ( /*OUT*/VexGuestExtents* vge, ); } - return irbb; + return irsb; } diff --git a/VEX/priv/guest-generic/bb_to_IR.h b/VEX/priv/guest-generic/bb_to_IR.h index e1fab3b93c..4a28a809b6 100644 --- a/VEX/priv/guest-generic/bb_to_IR.h +++ b/VEX/priv/guest-generic/bb_to_IR.h @@ -116,8 +116,8 @@ typedef DisResult (*DisOneInstrFn) ( - /* This is the IRBB to which the resulting IR is to be appended. */ - /*OUT*/ IRBB* irbb, + /* This is the IRSB to which the resulting IR is to be appended. */ + /*OUT*/ IRSB* irbb, /* Do we need to generate IR to set the guest IP for this insn, or not? */ @@ -143,8 +143,8 @@ typedef /*IN*/ VexArch guest_arch, /*IN*/ VexArchInfo* archinfo, - /* Misc info about guest and host */ - /*IN*/ VexMiscInfo* miscinfo, + /* ABI info for both guest and host */ + /*IN*/ VexAbiInfo* abiinfo, /* Is the host bigendian? */ /*IN*/ Bool host_bigendian @@ -158,7 +158,7 @@ typedef /* See detailed comment in bb_to_IR.c. */ extern -IRBB* bb_to_IR ( /*OUT*/VexGuestExtents* vge, +IRSB* bb_to_IR ( /*OUT*/VexGuestExtents* vge, /*IN*/ void* closure_opaque, /*IN*/ DisOneInstrFn dis_instr_fn, /*IN*/ UChar* guest_code, @@ -167,10 +167,10 @@ IRBB* bb_to_IR ( /*OUT*/VexGuestExtents* vge, /*IN*/ Bool host_bigendian, /*IN*/ VexArch arch_guest, /*IN*/ VexArchInfo* archinfo_guest, - /*IN*/ VexMiscInfo* miscinfo_both, + /*IN*/ VexAbiInfo* abiinfo_both, /*IN*/ IRType guest_word_type, /*IN*/ Bool do_self_check, - /*IN*/ Bool (*preamble_function)(void*,IRBB*), + /*IN*/ Bool (*preamble_function)(void*,IRSB*), /*IN*/ Int offB_TISTART, /*IN*/ Int offB_TILEN ); diff --git a/VEX/priv/guest-ppc/gdefs.h b/VEX/priv/guest-ppc/gdefs.h index 1c9aaa9ab4..1fc1681a25 100644 --- a/VEX/priv/guest-ppc/gdefs.h +++ b/VEX/priv/guest-ppc/gdefs.h @@ -58,7 +58,7 @@ /* Convert one ppc insn to IR. See the type DisOneInstrFn in bb_to_IR.h. */ extern -DisResult disInstr_PPC ( IRBB* irbb, +DisResult disInstr_PPC ( IRSB* irbb, Bool put_IP, Bool (*resteerOkFn) ( void*, Addr64 ), void* callback_opaque, @@ -67,7 +67,7 @@ DisResult disInstr_PPC ( IRBB* irbb, Addr64 guest_IP, VexArch guest_arch, VexArchInfo* archinfo, - VexMiscInfo* miscinfo, + VexAbiInfo* abiinfo, Bool host_bigendian ); /* Used by the optimiser to specialise calls to helpers. */ diff --git a/VEX/priv/guest-ppc/toIR.c b/VEX/priv/guest-ppc/toIR.c index 5808a63ac2..eb1eba5de1 100644 --- a/VEX/priv/guest-ppc/toIR.c +++ b/VEX/priv/guest-ppc/toIR.c @@ -168,8 +168,8 @@ static Addr64 guest_CIA_bbstart; translated. */ static Addr64 guest_CIA_curr_instr; -/* The IRBB* into which we're generating code. */ -static IRBB* irbb; +/* The IRSB* into which we're generating code. */ +static IRSB* irsb; /* Is our guest binary 32 or 64bit? Set at each call to disInstr_PPC below. */ @@ -180,9 +180,9 @@ static Bool mode64 = False; // most platforms it's the identity function. Unfortunately, on // ppc64-linux it isn't (sigh) and ditto for ppc32-aix5 and // ppc64-aix5. -static void* fnptr_to_fnentry( VexMiscInfo* vmi, void* f ) +static void* fnptr_to_fnentry( VexAbiInfo* vbi, void* f ) { - if (vmi->host_ppc_calls_use_fndescrs) { + if (vbi->host_ppc_calls_use_fndescrs) { /* f is a pointer to a 3-word function descriptor, of which the first word is the entry address. */ /* note, this is correct even with cross-jitting, since this is @@ -397,17 +397,17 @@ static Addr64 nextInsnAddr( void ) /*--- ppc32/64 insn stream. ---*/ /*------------------------------------------------------------*/ -/* Add a statement to the list held by "irbb". */ +/* Add a statement to the list held by "irsb". */ static void stmt ( IRStmt* st ) { - addStmtToIRBB( irbb, st ); + addStmtToIRSB( irsb, st ); } /* Generate a new temporary of the given type. */ static IRTemp newTemp ( IRType ty ) { vassert(isPlausibleIRType(ty)); - return newIRTemp( irbb->tyenv, ty ); + return newIRTemp( irsb->tyenv, ty ); } /* Various simple conversions */ @@ -461,13 +461,13 @@ static UInt getUIntBigendianly ( UChar* p ) static void assign ( IRTemp dst, IRExpr* e ) { - stmt( IRStmt_Tmp(dst, e) ); + stmt( IRStmt_WrTmp(dst, e) ); } static void storeBE ( IRExpr* addr, IRExpr* data ) { - vassert(typeOfIRExpr(irbb->tyenv, addr) == Ity_I32 || - typeOfIRExpr(irbb->tyenv, addr) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv, addr) == Ity_I32 || + typeOfIRExpr(irsb->tyenv, addr) == Ity_I64); stmt( IRStmt_Store(Iend_BE,addr,data) ); } @@ -494,7 +494,7 @@ static IRExpr* qop ( IROp op, IRExpr* a1, IRExpr* a2, static IRExpr* mkexpr ( IRTemp tmp ) { - return IRExpr_Tmp(tmp); + return IRExpr_RdTmp(tmp); } static IRExpr* mkU8 ( UChar i ) @@ -524,16 +524,16 @@ static IRExpr* loadBE ( IRType ty, IRExpr* data ) static IRExpr* mkOR1 ( IRExpr* arg1, IRExpr* arg2 ) { - vassert(typeOfIRExpr(irbb->tyenv, arg1) == Ity_I1); - vassert(typeOfIRExpr(irbb->tyenv, arg2) == Ity_I1); + vassert(typeOfIRExpr(irsb->tyenv, arg1) == Ity_I1); + vassert(typeOfIRExpr(irsb->tyenv, arg2) == Ity_I1); return unop(Iop_32to1, binop(Iop_Or32, unop(Iop_1Uto32, arg1), unop(Iop_1Uto32, arg2))); } static IRExpr* mkAND1 ( IRExpr* arg1, IRExpr* arg2 ) { - vassert(typeOfIRExpr(irbb->tyenv, arg1) == Ity_I1); - vassert(typeOfIRExpr(irbb->tyenv, arg2) == Ity_I1); + vassert(typeOfIRExpr(irsb->tyenv, arg1) == Ity_I1); + vassert(typeOfIRExpr(irsb->tyenv, arg2) == Ity_I1); return unop(Iop_32to1, binop(Iop_And32, unop(Iop_1Uto32, arg1), unop(Iop_1Uto32, arg2))); } @@ -544,7 +544,7 @@ static void expand8Ux16( IRExpr* vIn, { IRTemp ones8x16 = newTemp(Ity_V128); - vassert(typeOfIRExpr(irbb->tyenv, vIn) == Ity_V128); + vassert(typeOfIRExpr(irsb->tyenv, vIn) == Ity_V128); vassert(vEvn && *vEvn == IRTemp_INVALID); vassert(vOdd && *vOdd == IRTemp_INVALID); *vEvn = newTemp(Ity_V128); @@ -562,7 +562,7 @@ static void expand8Sx16( IRExpr* vIn, { IRTemp ones8x16 = newTemp(Ity_V128); - vassert(typeOfIRExpr(irbb->tyenv, vIn) == Ity_V128); + vassert(typeOfIRExpr(irsb->tyenv, vIn) == Ity_V128); vassert(vEvn && *vEvn == IRTemp_INVALID); vassert(vOdd && *vOdd == IRTemp_INVALID); *vEvn = newTemp(Ity_V128); @@ -580,7 +580,7 @@ static void expand16Ux8( IRExpr* vIn, { IRTemp ones16x8 = newTemp(Ity_V128); - vassert(typeOfIRExpr(irbb->tyenv, vIn) == Ity_V128); + vassert(typeOfIRExpr(irsb->tyenv, vIn) == Ity_V128); vassert(vEvn && *vEvn == IRTemp_INVALID); vassert(vOdd && *vOdd == IRTemp_INVALID); *vEvn = newTemp(Ity_V128); @@ -598,7 +598,7 @@ static void expand16Sx8( IRExpr* vIn, { IRTemp ones16x8 = newTemp(Ity_V128); - vassert(typeOfIRExpr(irbb->tyenv, vIn) == Ity_V128); + vassert(typeOfIRExpr(irsb->tyenv, vIn) == Ity_V128); vassert(vEvn && *vEvn == IRTemp_INVALID); vassert(vOdd && *vOdd == IRTemp_INVALID); *vEvn = newTemp(Ity_V128); @@ -619,7 +619,7 @@ static void breakV128to4x64S( IRExpr* t128, IRTemp hi64 = newTemp(Ity_I64); IRTemp lo64 = newTemp(Ity_I64); - vassert(typeOfIRExpr(irbb->tyenv, t128) == Ity_V128); + vassert(typeOfIRExpr(irsb->tyenv, t128) == Ity_V128); vassert(t0 && *t0 == IRTemp_INVALID); vassert(t1 && *t1 == IRTemp_INVALID); vassert(t2 && *t2 == IRTemp_INVALID); @@ -646,7 +646,7 @@ static void breakV128to4x64U ( IRExpr* t128, IRTemp hi64 = newTemp(Ity_I64); IRTemp lo64 = newTemp(Ity_I64); - vassert(typeOfIRExpr(irbb->tyenv, t128) == Ity_V128); + vassert(typeOfIRExpr(irsb->tyenv, t128) == Ity_V128); vassert(t0 && *t0 == IRTemp_INVALID); vassert(t1 && *t1 == IRTemp_INVALID); vassert(t2 && *t2 == IRTemp_INVALID); @@ -670,7 +670,7 @@ static IRExpr* mkQNarrow64Sto32 ( IRExpr* t64 ) IRTemp hi32 = newTemp(Ity_I32); IRTemp lo32 = newTemp(Ity_I32); - vassert(typeOfIRExpr(irbb->tyenv, t64) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv, t64) == Ity_I64); assign( hi32, unop(Iop_64HIto32, t64)); assign( lo32, unop(Iop_64to32, t64)); @@ -693,7 +693,7 @@ static IRExpr* mkQNarrow64Uto32 ( IRExpr* t64 ) IRTemp hi32 = newTemp(Ity_I32); IRTemp lo32 = newTemp(Ity_I32); - vassert(typeOfIRExpr(irbb->tyenv, t64) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv, t64) == Ity_I64); assign( hi32, unop(Iop_64HIto32, t64)); assign( lo32, unop(Iop_64to32, t64)); @@ -711,10 +711,10 @@ static IRExpr* mkQNarrow64Uto32 ( IRExpr* t64 ) static IRExpr* mkV128from4x64S ( IRExpr* t3, IRExpr* t2, IRExpr* t1, IRExpr* t0 ) { - vassert(typeOfIRExpr(irbb->tyenv, t3) == Ity_I64); - vassert(typeOfIRExpr(irbb->tyenv, t2) == Ity_I64); - vassert(typeOfIRExpr(irbb->tyenv, t1) == Ity_I64); - vassert(typeOfIRExpr(irbb->tyenv, t0) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv, t3) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv, t2) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv, t1) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv, t0) == Ity_I64); return binop(Iop_64HLtoV128, binop(Iop_32HLto64, mkQNarrow64Sto32( t3 ), @@ -728,10 +728,10 @@ static IRExpr* mkV128from4x64S ( IRExpr* t3, IRExpr* t2, static IRExpr* mkV128from4x64U ( IRExpr* t3, IRExpr* t2, IRExpr* t1, IRExpr* t0 ) { - vassert(typeOfIRExpr(irbb->tyenv, t3) == Ity_I64); - vassert(typeOfIRExpr(irbb->tyenv, t2) == Ity_I64); - vassert(typeOfIRExpr(irbb->tyenv, t1) == Ity_I64); - vassert(typeOfIRExpr(irbb->tyenv, t0) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv, t3) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv, t2) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv, t1) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv, t0) == Ity_I64); return binop(Iop_64HLtoV128, binop(Iop_32HLto64, mkQNarrow64Uto32( t3 ), @@ -764,13 +764,13 @@ static IRExpr* mkV128from4x64U ( IRExpr* t3, IRExpr* t2, static IRExpr* /* :: Ity_I64 */ mk64lo32Sto64 ( IRExpr* src ) { - vassert(typeOfIRExpr(irbb->tyenv, src) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv, src) == Ity_I64); return unop(Iop_32Sto64, unop(Iop_64to32, src)); } static IRExpr* /* :: Ity_I64 */ mk64lo32Uto64 ( IRExpr* src ) { - vassert(typeOfIRExpr(irbb->tyenv, src) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv, src) == Ity_I64); return unop(Iop_32Uto64, unop(Iop_64to32, src)); } @@ -937,7 +937,7 @@ static void putIReg ( UInt archreg, IRExpr* e ) { IRType ty = mode64 ? Ity_I64 : Ity_I32; vassert(archreg < 32); - vassert(typeOfIRExpr(irbb->tyenv, e) == ty ); + vassert(typeOfIRExpr(irsb->tyenv, e) == ty ); stmt( IRStmt_Put(integerGuestRegOffset(archreg), e) ); } @@ -994,7 +994,7 @@ static IRExpr* getFReg ( UInt archreg ) static void putFReg ( UInt archreg, IRExpr* e ) { vassert(archreg < 32); - vassert(typeOfIRExpr(irbb->tyenv, e) == Ity_F64); + vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_F64); stmt( IRStmt_Put(floatGuestRegOffset(archreg), e) ); } @@ -1051,7 +1051,7 @@ static IRExpr* getVReg ( UInt archreg ) static void putVReg ( UInt archreg, IRExpr* e ) { vassert(archreg < 32); - vassert(typeOfIRExpr(irbb->tyenv, e) == Ity_V128); + vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_V128); stmt( IRStmt_Put(vectorGuestRegOffset(archreg), e) ); } @@ -1090,9 +1090,9 @@ static IRExpr* /* :: Ity_I32/64 */ ROTL ( IRExpr* src, IRExpr* rot_amt ) { IRExpr *mask, *rot; - vassert(typeOfIRExpr(irbb->tyenv,rot_amt) == Ity_I8); + vassert(typeOfIRExpr(irsb->tyenv,rot_amt) == Ity_I8); - if (typeOfIRExpr(irbb->tyenv,src) == Ity_I64) { + if (typeOfIRExpr(irsb->tyenv,src) == Ity_I64) { // rot = (src << rot_amt) | (src >> (64-rot_amt)) mask = binop(Iop_And8, rot_amt, mkU8(63)); rot = binop(Iop_Or64, @@ -1124,8 +1124,8 @@ static IRExpr* /* :: Ity_I64 */ ROTL32_64 ( IRExpr* src64, { IRExpr *mask, *rot32; vassert(mode64); // used only in 64bit mode - vassert(typeOfIRExpr(irbb->tyenv,src64) == Ity_I64); - vassert(typeOfIRExpr(irbb->tyenv,rot_amt) == Ity_I8); + vassert(typeOfIRExpr(irsb->tyenv,src64) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv,rot_amt) == Ity_I8); mask = binop(Iop_And8, rot_amt, mkU8(31)); rot32 = ROTL( unop(Iop_64to32, src64), rot_amt ); @@ -1203,7 +1203,7 @@ static IRExpr* addr_align( IRExpr* addr, UChar align ) vpanic("addr_align(ppc)"); } - vassert(typeOfIRExpr(irbb->tyenv,addr) == ty); + vassert(typeOfIRExpr(irsb->tyenv,addr) == ty); return binop( mkSzOp(ty, Iop_And8), addr, mkSzImm(ty, mask) ); } @@ -1213,9 +1213,9 @@ static IRExpr* addr_align( IRExpr* addr, UChar align ) N) becomes undefined. That is at function calls and returns. ELF ppc32 doesn't have this "feature" (how fortunate for it). */ -static void make_redzone_AbiHint ( VexMiscInfo* vmi, HChar* who ) +static void make_redzone_AbiHint ( VexAbiInfo* vbi, HChar* who ) { - Int szB = vmi->guest_stack_redzone_size; + Int szB = vbi->guest_stack_redzone_size; if (0) vex_printf("AbiHint: %s\n", who); vassert(szB >= 0); if (szB > 0) { @@ -1270,14 +1270,14 @@ static void make_redzone_AbiHint ( VexMiscInfo* vmi, HChar* who ) static void putCR321 ( UInt cr, IRExpr* e ) { vassert(cr < 8); - vassert(typeOfIRExpr(irbb->tyenv, e) == Ity_I8); + vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_I8); stmt( IRStmt_Put(guestCR321offset(cr), e) ); } static void putCR0 ( UInt cr, IRExpr* e ) { vassert(cr < 8); - vassert(typeOfIRExpr(irbb->tyenv, e) == Ity_I8); + vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_I8); stmt( IRStmt_Put(guestCR0offset(cr), e) ); } @@ -1322,7 +1322,7 @@ static void putCRbit ( UInt bi, IRExpr* bit ) { UInt n, off; IRExpr* safe; - vassert(typeOfIRExpr(irbb->tyenv,bit) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv,bit) == Ity_I32); safe = binop(Iop_And32, bit, mkU32(1)); n = bi / 4; off = bi % 4; @@ -1382,8 +1382,8 @@ IRExpr* /* :: Ity_I32 */ getCRbit_anywhere ( UInt bi, Int* where ) static IRExpr* getXER_SO ( void ); static void set_CR0 ( IRExpr* result ) { - vassert(typeOfIRExpr(irbb->tyenv,result) == Ity_I32 || - typeOfIRExpr(irbb->tyenv,result) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv,result) == Ity_I32 || + typeOfIRExpr(irsb->tyenv,result) == Ity_I64); if (mode64) { putCR321( 0, unop(Iop_64to8, binop(Iop_CmpORD64S, result, mkU64(0))) ); @@ -1409,7 +1409,7 @@ static void set_AV_CR6 ( IRExpr* result, Bool test_all_ones ) IRTemp rOnes = newTemp(Ity_I8); IRTemp rZeros = newTemp(Ity_I8); - vassert(typeOfIRExpr(irbb->tyenv,result) == Ity_V128); + vassert(typeOfIRExpr(irsb->tyenv,result) == Ity_V128); assign( v0, result ); assign( v1, binop(Iop_ShrV128, result, mkU8(32)) ); @@ -1451,7 +1451,7 @@ static void set_AV_CR6 ( IRExpr* result, Bool test_all_ones ) static void putXER_SO ( IRExpr* e ) { IRExpr* so; - vassert(typeOfIRExpr(irbb->tyenv, e) == Ity_I8); + vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_I8); so = binop(Iop_And8, e, mkU8(1)); stmt( IRStmt_Put( OFFB_XER_SO, so ) ); } @@ -1459,7 +1459,7 @@ static void putXER_SO ( IRExpr* e ) static void putXER_OV ( IRExpr* e ) { IRExpr* ov; - vassert(typeOfIRExpr(irbb->tyenv, e) == Ity_I8); + vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_I8); ov = binop(Iop_And8, e, mkU8(1)); stmt( IRStmt_Put( OFFB_XER_OV, ov ) ); } @@ -1467,7 +1467,7 @@ static void putXER_OV ( IRExpr* e ) static void putXER_CA ( IRExpr* e ) { IRExpr* ca; - vassert(typeOfIRExpr(irbb->tyenv, e) == Ity_I8); + vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_I8); ca = binop(Iop_And8, e, mkU8(1)); stmt( IRStmt_Put( OFFB_XER_CA, ca ) ); } @@ -1475,7 +1475,7 @@ static void putXER_CA ( IRExpr* e ) static void putXER_BC ( IRExpr* e ) { IRExpr* bc; - vassert(typeOfIRExpr(irbb->tyenv, e) == Ity_I8); + vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_I8); bc = binop(Iop_And8, e, mkU8(0x7F)); stmt( IRStmt_Put( OFFB_XER_BC, bc ) ); } @@ -1527,9 +1527,9 @@ static void set_XER_OV_32( UInt op, IRExpr* res, IRTemp t64; IRExpr* xer_ov; vassert(op < PPCG_FLAG_OP_NUMBER); - vassert(typeOfIRExpr(irbb->tyenv,res) == Ity_I32); - vassert(typeOfIRExpr(irbb->tyenv,argL) == Ity_I32); - vassert(typeOfIRExpr(irbb->tyenv,argR) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv,res) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv,argL) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv,argR) == Ity_I32); # define INT32_MIN 0x80000000 @@ -1638,9 +1638,9 @@ static void set_XER_OV_64( UInt op, IRExpr* res, { IRExpr* xer_ov; vassert(op < PPCG_FLAG_OP_NUMBER); - vassert(typeOfIRExpr(irbb->tyenv,res) == Ity_I64); - vassert(typeOfIRExpr(irbb->tyenv,argL) == Ity_I64); - vassert(typeOfIRExpr(irbb->tyenv,argR) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv,res) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv,argL) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv,argR) == Ity_I64); # define INT64_MIN 0x8000000000000000ULL @@ -1757,10 +1757,10 @@ static void set_XER_CA_32 ( UInt op, IRExpr* res, { IRExpr* xer_ca; vassert(op < PPCG_FLAG_OP_NUMBER); - vassert(typeOfIRExpr(irbb->tyenv,res) == Ity_I32); - vassert(typeOfIRExpr(irbb->tyenv,argL) == Ity_I32); - vassert(typeOfIRExpr(irbb->tyenv,argR) == Ity_I32); - vassert(typeOfIRExpr(irbb->tyenv,oldca) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv,res) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv,argL) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv,argR) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv,oldca) == Ity_I32); /* Incoming oldca is assumed to hold the values 0 or 1 only. This seems reasonable given that it's always generated by @@ -1875,10 +1875,10 @@ static void set_XER_CA_64 ( UInt op, IRExpr* res, { IRExpr* xer_ca; vassert(op < PPCG_FLAG_OP_NUMBER); - vassert(typeOfIRExpr(irbb->tyenv,res) == Ity_I64); - vassert(typeOfIRExpr(irbb->tyenv,argL) == Ity_I64); - vassert(typeOfIRExpr(irbb->tyenv,argR) == Ity_I64); - vassert(typeOfIRExpr(irbb->tyenv,oldca) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv,res) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv,argL) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv,argR) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv,oldca) == Ity_I64); /* Incoming oldca is assumed to hold the values 0 or 1 only. This seems reasonable given that it's always generated by @@ -2198,7 +2198,7 @@ static IRExpr* /* ::Ity_I32 */ getGST_field ( PPC_GST reg, UInt fld ) static void putGST ( PPC_GST reg, IRExpr* src ) { IRType ty = mode64 ? Ity_I64 : Ity_I32; - IRType ty_src = typeOfIRExpr(irbb->tyenv,src ); + IRType ty_src = typeOfIRExpr(irsb->tyenv,src ); vassert( reg < PPC_GST_MAX ); switch (reg) { case PPC_GST_CIA_AT_SC: @@ -2266,7 +2266,7 @@ static void putGST_masked ( PPC_GST reg, IRExpr* src, UInt mask ) { IRType ty = mode64 ? Ity_I64 : Ity_I32; vassert( reg < PPC_GST_MAX ); - vassert( typeOfIRExpr(irbb->tyenv,src ) == Ity_I32 ); + vassert( typeOfIRExpr(irsb->tyenv,src ) == Ity_I32 ); switch (reg) { case PPC_GST_FPSCR: { @@ -2324,7 +2324,7 @@ static void putGST_field ( PPC_GST reg, IRExpr* src, UInt fld ) { UInt shft, mask; - vassert( typeOfIRExpr(irbb->tyenv,src ) == Ity_I32 ); + vassert( typeOfIRExpr(irsb->tyenv,src ) == Ity_I32 ); vassert( fld < 8 ); vassert( reg < PPC_GST_MAX ); @@ -2965,7 +2965,7 @@ static Bool dis_int_cmp ( UInt theInstr ) remove the false dependency, which has been known to cause memcheck to produce false errors. */ if (rA_addr == rB_addr) - a = b = typeOfIRExpr(irbb->tyenv,a) == Ity_I64 + a = b = typeOfIRExpr(irsb->tyenv,a) == Ity_I64 ? mkU64(0) : mkU32(0); if (flag_L == 1) { putCR321(crfD, unop(Iop_64to8, binop(Iop_CmpORD64S, a, b))); @@ -2984,7 +2984,7 @@ static Bool dis_int_cmp ( UInt theInstr ) remove the false dependency, which has been known to cause memcheck to produce false errors. */ if (rA_addr == rB_addr) - a = b = typeOfIRExpr(irbb->tyenv,a) == Ity_I64 + a = b = typeOfIRExpr(irsb->tyenv,a) == Ity_I64 ? mkU64(0) : mkU32(0); if (flag_L == 1) { putCR321(crfD, unop(Iop_64to8, binop(Iop_CmpORD64U, a, b))); @@ -3754,7 +3754,7 @@ static Bool dis_int_load ( UInt theInstr ) /* Integer Store Instructions */ -static Bool dis_int_store ( UInt theInstr, VexMiscInfo* vmi ) +static Bool dis_int_store ( UInt theInstr, VexAbiInfo* vbi ) { /* D-Form, X-Form, DS-Form */ UChar opc1 = ifieldOPC(theInstr); @@ -4251,7 +4251,7 @@ static IRExpr* /* :: Ity_I32 */ branch_cond_ok( UInt BO, UInt BI ) Integer Branch Instructions */ static Bool dis_branch ( UInt theInstr, - VexMiscInfo* vmi, + VexAbiInfo* vbi, /*OUT*/DisResult* dres, Bool (*resteerOkFn)(void*,Addr64), void* callback_opaque ) @@ -4304,9 +4304,9 @@ static Bool dis_branch ( UInt theInstr, if (flag_LK) { putGST( PPC_GST_LR, e_nia ); - if (vmi->guest_ppc_zap_RZ_at_bl - && vmi->guest_ppc_zap_RZ_at_bl( (ULong)tgt) ) - make_redzone_AbiHint( vmi, + if (vbi->guest_ppc_zap_RZ_at_bl + && vbi->guest_ppc_zap_RZ_at_bl( (ULong)tgt) ) + make_redzone_AbiHint( vbi, "branch-and-link (unconditional call)" ); } @@ -4314,8 +4314,8 @@ static Bool dis_branch ( UInt theInstr, dres->whatNext = Dis_Resteer; dres->continueAt = tgt; } else { - irbb->jumpkind = flag_LK ? Ijk_Call : Ijk_Boring; - irbb->next = mkSzImm(ty, tgt); + irsb->jumpkind = flag_LK ? Ijk_Call : Ijk_Boring; + irsb->next = mkSzImm(ty, tgt); } break; @@ -4353,8 +4353,8 @@ static Bool dis_branch ( UInt theInstr, flag_LK ? Ijk_Call : Ijk_Boring, mkSzConst(ty, tgt) ) ); - irbb->jumpkind = Ijk_Boring; - irbb->next = e_nia; + irsb->jumpkind = Ijk_Boring; + irsb->next = e_nia; break; case 0x13: @@ -4386,8 +4386,8 @@ static Bool dis_branch ( UInt theInstr, Ijk_Boring, c_nia )); - irbb->jumpkind = flag_LK ? Ijk_Call : Ijk_Boring; - irbb->next = mkexpr(lr_old); + irsb->jumpkind = flag_LK ? Ijk_Call : Ijk_Boring; + irsb->next = mkexpr(lr_old); break; case 0x010: { // bclr (Branch Cond. to Link Register, PPC32 p365) @@ -4421,14 +4421,14 @@ static Bool dis_branch ( UInt theInstr, Ijk_Boring, c_nia )); - if (vanilla_return && vmi->guest_ppc_zap_RZ_at_blr) - make_redzone_AbiHint( vmi, "branch-to-lr (unconditional return)" ); + if (vanilla_return && vbi->guest_ppc_zap_RZ_at_blr) + make_redzone_AbiHint( vbi, "branch-to-lr (unconditional return)" ); /* blrl is pretty strange; it's like a return that sets the return address of its caller to the insn following this one. Mark it as a return. */ - irbb->jumpkind = Ijk_Ret; /* was flag_LK ? Ijk_Call : Ijk_Ret; */ - irbb->next = mkexpr(lr_old); + irsb->jumpkind = Ijk_Ret; /* was flag_LK ? Ijk_Call : Ijk_Ret; */ + irsb->next = mkexpr(lr_old); break; } default: @@ -4658,8 +4658,8 @@ static Bool dis_trapi ( UInt theInstr, if (uncond) { /* If the trap shows signs of being unconditional, don't continue decoding past it. */ - irbb->next = mkSzImm( ty, nextInsnAddr() ); - irbb->jumpkind = Ijk_Boring; + irsb->next = mkSzImm( ty, nextInsnAddr() ); + irsb->jumpkind = Ijk_Boring; dres->whatNext = Dis_StopHere; } @@ -4671,7 +4671,7 @@ static Bool dis_trapi ( UInt theInstr, System Linkage Instructions */ static Bool dis_syslink ( UInt theInstr, - VexMiscInfo* miscinfo, DisResult* dres ) + VexAbiInfo* abiinfo, DisResult* dres ) { IRType ty = mode64 ? Ity_I64 : Ity_I32; @@ -4691,14 +4691,10 @@ static Bool dis_syslink ( UInt theInstr, /* It's important that all ArchRegs carry their up-to-date value at this point. So we declare an end-of-block here, which forces any TempRegs caching ArchRegs to be flushed. */ - /* At this point, AIX's behaviour differs from Linux's: AIX resumes - after the syscall at %lr, whereas Linux does the obvious thing - and resumes at the next instruction. Hence we need to encode - that into the generated IR. */ - irbb->next = miscinfo->guest_ppc_sc_continues_at_LR - ? /*AIXishly*/getGST( PPC_GST_LR ) - : /*Linuxfully*/mkSzImm( ty, nextInsnAddr() ); - irbb->jumpkind = Ijk_Sys_syscall; + irsb->next = abiinfo->guest_ppc_sc_continues_at_LR + ? getGST( PPC_GST_LR ) + : mkSzImm( ty, nextInsnAddr() ); + irsb->jumpkind = Ijk_Sys_syscall; dres->whatNext = Dis_StopHere; return True; @@ -5154,7 +5150,7 @@ static Bool dis_int_shift ( UInt theInstr ) /* Generates code to swap the byte order in an Ity_I32. */ static IRExpr* /* :: Ity_I32 */ gen_byterev32 ( IRTemp t ) { - vassert(typeOfIRTemp(irbb->tyenv, t) == Ity_I32); + vassert(typeOfIRTemp(irsb->tyenv, t) == Ity_I32); return binop(Iop_Or32, binop(Iop_Shl32, mkexpr(t), mkU8(24)), @@ -5173,7 +5169,7 @@ static IRExpr* /* :: Ity_I32 */ gen_byterev32 ( IRTemp t ) and zeroes the upper half. */ static IRExpr* /* :: Ity_I32 */ gen_byterev16 ( IRTemp t ) { - vassert(typeOfIRTemp(irbb->tyenv, t) == Ity_I32); + vassert(typeOfIRTemp(irsb->tyenv, t) == Ity_I32); return binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(t), mkU8(8)), @@ -5248,7 +5244,7 @@ static Bool dis_int_ldst_rev ( UInt theInstr ) /* Processor Control Instructions */ -static Bool dis_proc_ctl ( VexMiscInfo* vmi, UInt theInstr ) +static Bool dis_proc_ctl ( VexAbiInfo* vbi, UInt theInstr ) { UChar opc1 = ifieldOPC(theInstr); @@ -5364,7 +5360,7 @@ static Bool dis_proc_ctl ( VexMiscInfo* vmi, UInt theInstr ) val, 0/*regparms*/, "ppcg_dirtyhelper_MFTB", - fnptr_to_fnentry(vmi, &ppcg_dirtyhelper_MFTB), + fnptr_to_fnentry(vbi, &ppcg_dirtyhelper_MFTB), args ); /* execute the dirty call, dumping the result in val. */ stmt( IRStmt_Dirty(d) ); @@ -5572,8 +5568,8 @@ static Bool dis_cache_manage ( UInt theInstr, /* be paranoid ... */ stmt( IRStmt_MFence() ); - irbb->jumpkind = Ijk_TInval; - irbb->next = mkSzImm(ty, nextInsnAddr()); + irsb->jumpkind = Ijk_TInval; + irsb->next = mkSzImm(ty, nextInsnAddr()); dres->whatNext = Dis_StopHere; break; } @@ -6768,7 +6764,7 @@ static Bool dis_av_procctl ( UInt theInstr ) /* AltiVec Load Instructions */ -static Bool dis_av_load ( VexMiscInfo* vmi, UInt theInstr ) +static Bool dis_av_load ( VexAbiInfo* vbi, UInt theInstr ) { /* X-Form */ UChar opc1 = ifieldOPC(theInstr); @@ -6804,13 +6800,13 @@ static Bool dis_av_load ( VexMiscInfo* vmi, UInt theInstr ) d = unsafeIRDirty_0_N ( 0/*regparms*/, "ppc32g_dirtyhelper_LVS", - fnptr_to_fnentry(vmi, &ppc32g_dirtyhelper_LVS), + fnptr_to_fnentry(vbi, &ppc32g_dirtyhelper_LVS), args ); } else { d = unsafeIRDirty_0_N ( 0/*regparms*/, "ppc64g_dirtyhelper_LVS", - fnptr_to_fnentry(vmi, &ppc64g_dirtyhelper_LVS), + fnptr_to_fnentry(vbi, &ppc64g_dirtyhelper_LVS), args ); } DIP("lvsl v%d,r%u,r%u\n", vD_addr, rA_addr, rB_addr); @@ -6837,13 +6833,13 @@ static Bool dis_av_load ( VexMiscInfo* vmi, UInt theInstr ) d = unsafeIRDirty_0_N ( 0/*regparms*/, "ppc32g_dirtyhelper_LVS", - fnptr_to_fnentry(vmi, &ppc32g_dirtyhelper_LVS), + fnptr_to_fnentry(vbi, &ppc32g_dirtyhelper_LVS), args ); } else { d = unsafeIRDirty_0_N ( 0/*regparms*/, "ppc64g_dirtyhelper_LVS", - fnptr_to_fnentry(vmi, &ppc64g_dirtyhelper_LVS), + fnptr_to_fnentry(vbi, &ppc64g_dirtyhelper_LVS), args ); } DIP("lvsr v%d,r%u,r%u\n", vD_addr, rA_addr, rB_addr); @@ -8755,7 +8751,7 @@ DisResult disInstr_PPC_WRK ( void* callback_opaque, Long delta64, VexArchInfo* archinfo, - VexMiscInfo* miscinfo + VexAbiInfo* abiinfo ) { UChar opc1; @@ -8832,8 +8828,8 @@ DisResult disInstr_PPC_WRK ( /* %R3 = client_request ( %R4 ) */ DIP("r3 = client_request ( %%r4 )\n"); delta += 20; - irbb->next = mkSzImm( ty, guest_CIA_bbstart + delta ); - irbb->jumpkind = Ijk_ClientReq; + irsb->next = mkSzImm( ty, guest_CIA_bbstart + delta ); + irsb->jumpkind = Ijk_ClientReq; dres.whatNext = Dis_StopHere; goto decode_success; } @@ -8852,8 +8848,8 @@ DisResult disInstr_PPC_WRK ( DIP("branch-and-link-to-noredir r11\n"); delta += 20; putGST( PPC_GST_LR, mkSzImm(ty, guest_CIA_bbstart + (Long)delta) ); - irbb->next = getIReg(11); - irbb->jumpkind = Ijk_NoRedir; + irsb->next = getIReg(11); + irsb->jumpkind = Ijk_NoRedir; dres.whatNext = Dis_StopHere; goto decode_success; } @@ -8919,7 +8915,7 @@ DisResult disInstr_PPC_WRK ( /* Integer Store Instructions */ case 0x26: case 0x27: case 0x2C: // stb, stbu, sth case 0x2D: case 0x24: case 0x25: // sthu, stw, stwu - if (dis_int_store( theInstr, miscinfo )) goto decode_success; + if (dis_int_store( theInstr, abiinfo )) goto decode_success; goto decode_failure; /* Integer Load and Store Multiple Instructions */ @@ -8929,14 +8925,14 @@ DisResult disInstr_PPC_WRK ( /* Branch Instructions */ case 0x12: case 0x10: // b, bc - if (dis_branch(theInstr, miscinfo, &dres, + if (dis_branch(theInstr, abiinfo, &dres, resteerOkFn, callback_opaque)) goto decode_success; goto decode_failure; /* System Linkage Instructions */ case 0x11: // sc - if (dis_syslink(theInstr, miscinfo, &dres)) goto decode_success; + if (dis_syslink(theInstr, abiinfo, &dres)) goto decode_success; goto decode_failure; /* Trap Instructions */ @@ -9001,7 +8997,7 @@ DisResult disInstr_PPC_WRK ( /* 64bit Integer Stores */ case 0x3E: // std, stdu if (!mode64) goto decode_failure; - if (dis_int_store( theInstr, miscinfo )) goto decode_success; + if (dis_int_store( theInstr, abiinfo )) goto decode_success; goto decode_failure; case 0x3F: @@ -9093,7 +9089,7 @@ DisResult disInstr_PPC_WRK ( /* Branch Instructions */ case 0x210: case 0x010: // bcctr, bclr - if (dis_branch(theInstr, miscinfo, &dres, + if (dis_branch(theInstr, abiinfo, &dres, resteerOkFn, callback_opaque)) goto decode_success; goto decode_failure; @@ -9190,13 +9186,13 @@ DisResult disInstr_PPC_WRK ( /* Integer Store Instructions */ case 0x0F7: case 0x0D7: case 0x1B7: // stbux, stbx, sthux case 0x197: case 0x0B7: case 0x097: // sthx, stwux, stwx - if (dis_int_store( theInstr, miscinfo )) goto decode_success; + if (dis_int_store( theInstr, abiinfo )) goto decode_success; goto decode_failure; /* 64bit Integer Store Instructions */ case 0x0B5: case 0x095: // stdux, stdx if (!mode64) goto decode_failure; - if (dis_int_store( theInstr, miscinfo )) goto decode_success; + if (dis_int_store( theInstr, abiinfo )) goto decode_success; goto decode_failure; /* Integer Load and Store with Byte Reverse Instructions */ @@ -9212,8 +9208,8 @@ DisResult disInstr_PPC_WRK ( Bool ok = dis_int_ldst_str( theInstr, &stopHere ); if (!ok) goto decode_failure; if (stopHere) { - irbb->next = mkSzImm(ty, nextInsnAddr()); - irbb->jumpkind = Ijk_Boring; + irsb->next = mkSzImm(ty, nextInsnAddr()); + irsb->jumpkind = Ijk_Boring; dres.whatNext = Dis_StopHere; } goto decode_success; @@ -9234,7 +9230,7 @@ DisResult disInstr_PPC_WRK ( /* Processor Control Instructions */ case 0x200: case 0x013: case 0x153: // mcrxr, mfcr, mfspr case 0x173: case 0x090: case 0x1D3: // mftb, mtcrf, mtspr - if (dis_proc_ctl( miscinfo, theInstr )) goto decode_success; + if (dis_proc_ctl( abiinfo, theInstr )) goto decode_success; goto decode_failure; /* Cache Management Instructions */ @@ -9290,7 +9286,7 @@ DisResult disInstr_PPC_WRK ( case 0x007: case 0x027: case 0x047: // lvebx, lvehx, lvewx case 0x067: case 0x167: // lvx, lvxl if (!allow_V) goto decode_noV; - if (dis_av_load( miscinfo, theInstr )) goto decode_success; + if (dis_av_load( abiinfo, theInstr )) goto decode_success; goto decode_failure; /* AV Store */ @@ -9490,8 +9486,8 @@ DisResult disInstr_PPC_WRK ( insn, but nevertheless be paranoid and update it again right now. */ putGST( PPC_GST_CIA, mkSzImm(ty, guest_CIA_curr_instr) ); - irbb->next = mkSzImm(ty, guest_CIA_curr_instr); - irbb->jumpkind = Ijk_NoDecode; + irsb->next = mkSzImm(ty, guest_CIA_curr_instr); + irsb->jumpkind = Ijk_NoDecode; dres.whatNext = Dis_StopHere; dres.len = 0; return dres; @@ -9521,7 +9517,7 @@ DisResult disInstr_PPC_WRK ( /* Disassemble a single instruction into IR. The instruction is located in host memory at &guest_code[delta]. */ -DisResult disInstr_PPC ( IRBB* irbb_IN, +DisResult disInstr_PPC ( IRSB* irsb_IN, Bool put_IP, Bool (*resteerOkFn) ( void*, Addr64 ), void* callback_opaque, @@ -9530,7 +9526,7 @@ DisResult disInstr_PPC ( IRBB* irbb_IN, Addr64 guest_IP, VexArch guest_arch, VexArchInfo* archinfo, - VexMiscInfo* miscinfo, + VexAbiInfo* abiinfo, Bool host_bigendian_IN ) { IRType ty; @@ -9559,14 +9555,14 @@ DisResult disInstr_PPC ( IRBB* irbb_IN, /* Set globals (see top of this file) */ guest_code = guest_code_IN; - irbb = irbb_IN; + irsb = irsb_IN; host_is_bigendian = host_bigendian_IN; guest_CIA_curr_instr = mkSzAddr(ty, guest_IP); guest_CIA_bbstart = mkSzAddr(ty, guest_IP - delta); dres = disInstr_PPC_WRK ( put_IP, resteerOkFn, callback_opaque, - delta, archinfo, miscinfo ); + delta, archinfo, abiinfo ); return dres; } diff --git a/VEX/priv/guest-x86/gdefs.h b/VEX/priv/guest-x86/gdefs.h index 1a53a480d4..4cf9beab5c 100644 --- a/VEX/priv/guest-x86/gdefs.h +++ b/VEX/priv/guest-x86/gdefs.h @@ -57,7 +57,7 @@ /* Convert one x86 insn to IR. See the type DisOneInstrFn in bb_to_IR.h. */ extern -DisResult disInstr_X86 ( IRBB* irbb, +DisResult disInstr_X86 ( IRSB* irbb, Bool put_IP, Bool (*resteerOkFn) ( void*, Addr64 ), void* callback_opaque, @@ -66,7 +66,7 @@ DisResult disInstr_X86 ( IRBB* irbb, Addr64 guest_IP, VexArch guest_arch, VexArchInfo* archinfo, - VexMiscInfo* miscinfo, + VexAbiInfo* abiinfo, Bool host_bigendian ); /* Used by the optimiser to specialise calls to helpers. */ diff --git a/VEX/priv/guest-x86/toIR.c b/VEX/priv/guest-x86/toIR.c index 80a8c6e34b..84f783cf48 100644 --- a/VEX/priv/guest-x86/toIR.c +++ b/VEX/priv/guest-x86/toIR.c @@ -183,8 +183,8 @@ static Addr32 guest_EIP_bbstart; translated. */ static Addr32 guest_EIP_curr_instr; -/* The IRBB* into which we're generating code. */ -static IRBB* irbb; +/* The IRSB* into which we're generating code. */ +static IRSB* irsb; /*------------------------------------------------------------*/ @@ -285,14 +285,14 @@ static IRBB* irbb; /* Add a statement to the list held by "irbb". */ static void stmt ( IRStmt* st ) { - addStmtToIRBB( irbb, st ); + addStmtToIRSB( irsb, st ); } /* Generate a new temporary of the given type. */ static IRTemp newTemp ( IRType ty ) { vassert(isPlausibleIRType(ty)); - return newIRTemp( irbb->tyenv, ty ); + return newIRTemp( irsb->tyenv, ty ); } /* Bomb out if we can't handle something. */ @@ -528,7 +528,7 @@ static IRExpr* getIReg ( Int sz, UInt archreg ) /* Ditto, but write to a reg instead. */ static void putIReg ( Int sz, UInt archreg, IRExpr* e ) { - IRType ty = typeOfIRExpr(irbb->tyenv, e); + IRType ty = typeOfIRExpr(irsb->tyenv, e); switch (sz) { case 1: vassert(ty == Ity_I8); break; case 2: vassert(ty == Ity_I16); break; @@ -546,7 +546,7 @@ static IRExpr* getSReg ( UInt sreg ) static void putSReg ( UInt sreg, IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_I16); + vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_I16); stmt( IRStmt_Put( segmentGuestRegOffset(sreg), e ) ); } @@ -577,43 +577,43 @@ static IRExpr* getXMMRegLane32F ( UInt xmmreg, Int laneno ) static void putXMMReg ( UInt xmmreg, IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_V128); + vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_V128); stmt( IRStmt_Put( xmmGuestRegOffset(xmmreg), e ) ); } static void putXMMRegLane64 ( UInt xmmreg, Int laneno, IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_I64); stmt( IRStmt_Put( xmmGuestRegLane64offset(xmmreg,laneno), e ) ); } static void putXMMRegLane64F ( UInt xmmreg, Int laneno, IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_F64); + vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_F64); stmt( IRStmt_Put( xmmGuestRegLane64offset(xmmreg,laneno), e ) ); } static void putXMMRegLane32F ( UInt xmmreg, Int laneno, IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_F32); + vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_F32); stmt( IRStmt_Put( xmmGuestRegLane32offset(xmmreg,laneno), e ) ); } static void putXMMRegLane32 ( UInt xmmreg, Int laneno, IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_I32); stmt( IRStmt_Put( xmmGuestRegLane32offset(xmmreg,laneno), e ) ); } static void putXMMRegLane16 ( UInt xmmreg, Int laneno, IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_I16); + vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_I16); stmt( IRStmt_Put( xmmGuestRegLane16offset(xmmreg,laneno), e ) ); } static void assign ( IRTemp dst, IRExpr* e ) { - stmt( IRStmt_Tmp(dst, e) ); + stmt( IRStmt_WrTmp(dst, e) ); } static void storeLE ( IRExpr* addr, IRExpr* data ) @@ -638,7 +638,7 @@ static IRExpr* triop ( IROp op, IRExpr* a1, IRExpr* a2, IRExpr* a3 ) static IRExpr* mkexpr ( IRTemp tmp ) { - return IRExpr_Tmp(tmp); + return IRExpr_RdTmp(tmp); } static IRExpr* mkU8 ( UInt i ) @@ -713,8 +713,8 @@ static IROp mkWidenOp ( Int szSmall, Int szBig, Bool signd ) static IRExpr* mkAnd1 ( IRExpr* x, IRExpr* y ) { - vassert(typeOfIRExpr(irbb->tyenv,x) == Ity_I1); - vassert(typeOfIRExpr(irbb->tyenv,y) == Ity_I1); + vassert(typeOfIRExpr(irsb->tyenv,x) == Ity_I1); + vassert(typeOfIRExpr(irsb->tyenv,y) == Ity_I1); return unop(Iop_32to1, binop(Iop_And32, unop(Iop_1Uto32,x), @@ -817,7 +817,7 @@ static Bool isLogic ( IROp op8 ) /* U-widen 8/16/32 bit int expr to 32. */ static IRExpr* widenUto32 ( IRExpr* e ) { - switch (typeOfIRExpr(irbb->tyenv,e)) { + switch (typeOfIRExpr(irsb->tyenv,e)) { case Ity_I32: return e; case Ity_I16: return unop(Iop_16Uto32,e); case Ity_I8: return unop(Iop_8Uto32,e); @@ -828,7 +828,7 @@ static IRExpr* widenUto32 ( IRExpr* e ) /* S-widen 8/16/32 bit int expr to 32. */ static IRExpr* widenSto32 ( IRExpr* e ) { - switch (typeOfIRExpr(irbb->tyenv,e)) { + switch (typeOfIRExpr(irsb->tyenv,e)) { case Ity_I32: return e; case Ity_I16: return unop(Iop_16Sto32,e); case Ity_I8: return unop(Iop_8Sto32,e); @@ -840,7 +840,7 @@ static IRExpr* widenSto32 ( IRExpr* e ) of these combinations make sense. */ static IRExpr* narrowTo ( IRType dst_ty, IRExpr* e ) { - IRType src_ty = typeOfIRExpr(irbb->tyenv,e); + IRType src_ty = typeOfIRExpr(irsb->tyenv,e); if (src_ty == dst_ty) return e; if (src_ty == Ity_I32 && dst_ty == Ity_I16) @@ -1236,14 +1236,14 @@ static HChar nameISize ( Int size ) static void jmp_lit( IRJumpKind kind, Addr32 d32 ) { - irbb->next = mkU32(d32); - irbb->jumpkind = kind; + irsb->next = mkU32(d32); + irsb->jumpkind = kind; } static void jmp_treg( IRJumpKind kind, IRTemp t ) { - irbb->next = mkexpr(t); - irbb->jumpkind = kind; + irsb->next = mkexpr(t); + irsb->jumpkind = kind; } static @@ -1256,14 +1256,14 @@ void jcc_01( X86Condcode cond, Addr32 d32_false, Addr32 d32_true ) stmt( IRStmt_Exit( mk_x86g_calculate_condition(condPos), Ijk_Boring, IRConst_U32(d32_false) ) ); - irbb->next = mkU32(d32_true); - irbb->jumpkind = Ijk_Boring; + irsb->next = mkU32(d32_true); + irsb->jumpkind = Ijk_Boring; } else { stmt( IRStmt_Exit( mk_x86g_calculate_condition(condPos), Ijk_Boring, IRConst_U32(d32_true) ) ); - irbb->next = mkU32(d32_false); - irbb->jumpkind = Ijk_Boring; + irsb->next = mkU32(d32_false); + irsb->jumpkind = Ijk_Boring; } } @@ -3131,7 +3131,7 @@ UInt dis_imul_I_E_G ( UChar sorb, static void put_emwarn ( IRExpr* e /* :: Ity_I32 */ ) { - vassert(typeOfIRExpr(irbb->tyenv, e) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_I32); stmt( IRStmt_Put( OFFB_EMWARN, e ) ); } @@ -3155,7 +3155,7 @@ static IRExpr* get_ftop ( void ) static void put_ftop ( IRExpr* e ) { - vassert(typeOfIRExpr(irbb->tyenv, e) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_I32); stmt( IRStmt_Put( OFFB_FTOP, e ) ); } @@ -3206,9 +3206,9 @@ static IRExpr* /* :: Ity_I32 */ get_FAKE_roundingmode ( void ) static void put_ST_TAG ( Int i, IRExpr* value ) { - IRArray* descr; - vassert(typeOfIRExpr(irbb->tyenv, value) == Ity_I8); - descr = mkIRArray( OFFB_FPTAGS, Ity_I8, 8 ); + IRRegArray* descr; + vassert(typeOfIRExpr(irsb->tyenv, value) == Ity_I8); + descr = mkIRRegArray( OFFB_FPTAGS, Ity_I8, 8 ); stmt( IRStmt_PutI( descr, get_ftop(), i, value ) ); } @@ -3217,7 +3217,7 @@ static void put_ST_TAG ( Int i, IRExpr* value ) static IRExpr* get_ST_TAG ( Int i ) { - IRArray* descr = mkIRArray( OFFB_FPTAGS, Ity_I8, 8 ); + IRRegArray* descr = mkIRRegArray( OFFB_FPTAGS, Ity_I8, 8 ); return IRExpr_GetI( descr, get_ftop(), i ); } @@ -3230,9 +3230,9 @@ static IRExpr* get_ST_TAG ( Int i ) static void put_ST_UNCHECKED ( Int i, IRExpr* value ) { - IRArray* descr; - vassert(typeOfIRExpr(irbb->tyenv, value) == Ity_F64); - descr = mkIRArray( OFFB_FPREGS, Ity_F64, 8 ); + IRRegArray* descr; + vassert(typeOfIRExpr(irsb->tyenv, value) == Ity_F64); + descr = mkIRRegArray( OFFB_FPREGS, Ity_F64, 8 ); stmt( IRStmt_PutI( descr, get_ftop(), i, value ) ); /* Mark the register as in-use. */ put_ST_TAG(i, mkU8(1)); @@ -3260,7 +3260,7 @@ static void put_ST ( Int i, IRExpr* value ) static IRExpr* get_ST_UNCHECKED ( Int i ) { - IRArray* descr = mkIRArray( OFFB_FPREGS, Ity_F64, 8 ); + IRRegArray* descr = mkIRRegArray( OFFB_FPREGS, Ity_F64, 8 ); return IRExpr_GetI( descr, get_ftop(), i ); } @@ -4713,7 +4713,7 @@ UInt dis_FPU ( Bool* decode_ok, UChar sorb, Int delta ) case 7: { /* FNSTSW m16 */ IRExpr* sw = get_FPU_sw(); - vassert(typeOfIRExpr(irbb->tyenv, sw) == Ity_I16); + vassert(typeOfIRExpr(irsb->tyenv, sw) == Ity_I16); storeLE( mkexpr(addr), sw ); DIP("fnstsw %s\n", dis_buf); break; @@ -5066,10 +5066,10 @@ UInt dis_FPU ( Bool* decode_ok, UChar sorb, Int delta ) static void do_MMX_preamble ( void ) { - Int i; - IRArray* descr = mkIRArray( OFFB_FPTAGS, Ity_I8, 8 ); - IRExpr* zero = mkU32(0); - IRExpr* tag1 = mkU8(1); + Int i; + IRRegArray* descr = mkIRRegArray( OFFB_FPTAGS, Ity_I8, 8 ); + IRExpr* zero = mkU32(0); + IRExpr* tag1 = mkU8(1); put_ftop(zero); for (i = 0; i < 8; i++) stmt( IRStmt_PutI( descr, zero, i, tag1 ) ); @@ -5077,10 +5077,10 @@ static void do_MMX_preamble ( void ) static void do_EMMS_preamble ( void ) { - Int i; - IRArray* descr = mkIRArray( OFFB_FPTAGS, Ity_I8, 8 ); - IRExpr* zero = mkU32(0); - IRExpr* tag0 = mkU8(0); + Int i; + IRRegArray* descr = mkIRRegArray( OFFB_FPTAGS, Ity_I8, 8 ); + IRExpr* zero = mkU32(0); + IRExpr* tag0 = mkU8(0); put_ftop(zero); for (i = 0; i < 8; i++) stmt( IRStmt_PutI( descr, zero, i, tag0 ) ); @@ -5097,7 +5097,7 @@ static IRExpr* getMMXReg ( UInt archreg ) static void putMMXReg ( UInt archreg, IRExpr* e ) { vassert(archreg < 8); - vassert(typeOfIRExpr(irbb->tyenv,e) == Ity_I64); + vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_I64); stmt( IRStmt_Put( OFFB_FPREGS + 8 * archreg, e ) ); } @@ -7008,7 +7008,7 @@ static IRExpr* /* :: Ity_I32 */ get_sse_roundingmode ( void ) static void put_sse_roundingmode ( IRExpr* sseround ) { - vassert(typeOfIRExpr(irbb->tyenv, sseround) == Ity_I32); + vassert(typeOfIRExpr(irsb->tyenv, sseround) == Ity_I32); stmt( IRStmt_Put( OFFB_SSEROUND, sseround ) ); } @@ -10570,8 +10570,8 @@ DisResult disInstr_X86_WRK ( stmt( IRStmt_Put(OFFB_TILEN, mkU32(lineszB) ) ); - irbb->jumpkind = Ijk_TInval; - irbb->next = mkU32(guest_EIP_bbstart+delta); + irsb->jumpkind = Ijk_TInval; + irsb->next = mkU32(guest_EIP_bbstart+delta); dres.whatNext = Dis_StopHere; DIP("clflush %s\n", dis_buf); @@ -12922,7 +12922,7 @@ DisResult disInstr_X86_WRK ( /* Disassemble a single instruction into IR. The instruction is located in host memory at &guest_code[delta]. */ -DisResult disInstr_X86 ( IRBB* irbb_IN, +DisResult disInstr_X86 ( IRSB* irsb_IN, Bool put_IP, Bool (*resteerOkFn) ( void*, Addr64 ), void* callback_opaque, @@ -12931,7 +12931,7 @@ DisResult disInstr_X86 ( IRBB* irbb_IN, Addr64 guest_IP, VexArch guest_arch, VexArchInfo* archinfo, - VexMiscInfo* miscinfo, + VexAbiInfo* abiinfo, Bool host_bigendian_IN ) { DisResult dres; @@ -12939,7 +12939,7 @@ DisResult disInstr_X86 ( IRBB* irbb_IN, /* Set globals (see top of this file) */ vassert(guest_arch == VexArchX86); guest_code = guest_code_IN; - irbb = irbb_IN; + irsb = irsb_IN; host_is_bigendian = host_bigendian_IN; guest_EIP_curr_instr = (Addr32)guest_IP; guest_EIP_bbstart = (Addr32)toUInt(guest_IP - delta); diff --git a/VEX/priv/host-amd64/hdefs.h b/VEX/priv/host-amd64/hdefs.h index 9fd5ee64f4..08c1d5b32f 100644 --- a/VEX/priv/host-amd64/hdefs.h +++ b/VEX/priv/host-amd64/hdefs.h @@ -725,9 +725,9 @@ extern Int emit_AMD64Instr ( UChar* buf, Int nbuf, AMD64Instr*, extern AMD64Instr* genSpill_AMD64 ( HReg rreg, Int offset, Bool ); extern AMD64Instr* genReload_AMD64 ( HReg rreg, Int offset, Bool ); extern void getAllocableRegs_AMD64 ( Int*, HReg** ); -extern HInstrArray* iselBB_AMD64 ( IRBB*, VexArch, +extern HInstrArray* iselSB_AMD64 ( IRSB*, VexArch, VexArchInfo*, - VexMiscInfo* ); + VexAbiInfo* ); #endif /* ndef __LIBVEX_HOST_AMD64_HDEFS_H */ diff --git a/VEX/priv/host-amd64/isel.c b/VEX/priv/host-amd64/isel.c index 07b159d1ad..11cae8c1b8 100644 --- a/VEX/priv/host-amd64/isel.c +++ b/VEX/priv/host-amd64/isel.c @@ -374,7 +374,7 @@ static Bool mightRequireFixedRegs ( IRExpr* e ) { switch (e->tag) { - case Iex_Tmp: case Iex_Const: case Iex_Get: + case Iex_RdTmp: case Iex_Const: case Iex_Get: return False; default: return True; @@ -576,7 +576,7 @@ void doHelperCall ( ISelEnv* env, offset. */ static -AMD64AMode* genGuestArrayOffset ( ISelEnv* env, IRArray* descr, +AMD64AMode* genGuestArrayOffset ( ISelEnv* env, IRRegArray* descr, IRExpr* off, Int bias ) { HReg tmp, roff; @@ -804,8 +804,8 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e ) switch (e->tag) { /* --------- TEMP --------- */ - case Iex_Tmp: { - return lookupIRTemp(env, e->Iex.Tmp.tmp); + case Iex_RdTmp: { + return lookupIRTemp(env, e->Iex.RdTmp.tmp); } /* --------- LOAD --------- */ @@ -1974,8 +1974,8 @@ static AMD64CondCode iselCondCode_wrk ( ISelEnv* env, IRExpr* e ) vassert(typeOfIRExpr(env->type_env,e) == Ity_I1); /* var */ - if (e->tag == Iex_Tmp) { - HReg r64 = lookupIRTemp(env, e->Iex.Tmp.tmp); + if (e->tag == Iex_RdTmp) { + HReg r64 = lookupIRTemp(env, e->Iex.RdTmp.tmp); HReg dst = newVRegI(env); addInstr(env, mk_iMOVsd_RR(r64,dst)); addInstr(env, AMD64Instr_Alu64R(Aalu_AND,AMD64RMI_Imm(1),dst)); @@ -2266,8 +2266,8 @@ static void iselInt128Expr_wrk ( HReg* rHi, HReg* rLo, //.. } /* read 128-bit IRTemp */ - if (e->tag == Iex_Tmp) { - lookupIRTemp128( rHi, rLo, env, e->Iex.Tmp.tmp); + if (e->tag == Iex_RdTmp) { + lookupIRTemp128( rHi, rLo, env, e->Iex.RdTmp.tmp); return; } @@ -2685,8 +2685,8 @@ static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e ) IRType ty = typeOfIRExpr(env->type_env,e); vassert(ty == Ity_F32); - if (e->tag == Iex_Tmp) { - return lookupIRTemp(env, e->Iex.Tmp.tmp); + if (e->tag == Iex_RdTmp) { + return lookupIRTemp(env, e->Iex.RdTmp.tmp); } if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { @@ -2782,8 +2782,8 @@ static HReg iselDblExpr_wrk ( ISelEnv* env, IRExpr* e ) vassert(e); vassert(ty == Ity_F64); - if (e->tag == Iex_Tmp) { - return lookupIRTemp(env, e->Iex.Tmp.tmp); + if (e->tag == Iex_RdTmp) { + return lookupIRTemp(env, e->Iex.RdTmp.tmp); } if (e->tag == Iex_Const) { @@ -3097,8 +3097,8 @@ static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e ) vassert(e); vassert(ty == Ity_V128); - if (e->tag == Iex_Tmp) { - return lookupIRTemp(env, e->Iex.Tmp.tmp); + if (e->tag == Iex_RdTmp) { + return lookupIRTemp(env, e->Iex.RdTmp.tmp); } if (e->tag == Iex_Get) { @@ -3660,45 +3660,45 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt ) } /* --------- TMP --------- */ - case Ist_Tmp: { - IRTemp tmp = stmt->Ist.Tmp.tmp; + case Ist_WrTmp: { + IRTemp tmp = stmt->Ist.WrTmp.tmp; IRType ty = typeOfIRTemp(env->type_env, tmp); if (ty == Ity_I64 || ty == Ity_I32 || ty == Ity_I16 || ty == Ity_I8) { - AMD64RMI* rmi = iselIntExpr_RMI(env, stmt->Ist.Tmp.data); + AMD64RMI* rmi = iselIntExpr_RMI(env, stmt->Ist.WrTmp.data); HReg dst = lookupIRTemp(env, tmp); addInstr(env, AMD64Instr_Alu64R(Aalu_MOV,rmi,dst)); return; } if (ty == Ity_I128) { HReg rHi, rLo, dstHi, dstLo; - iselInt128Expr(&rHi,&rLo, env, stmt->Ist.Tmp.data); + iselInt128Expr(&rHi,&rLo, env, stmt->Ist.WrTmp.data); lookupIRTemp128( &dstHi, &dstLo, env, tmp); addInstr(env, mk_iMOVsd_RR(rHi,dstHi) ); addInstr(env, mk_iMOVsd_RR(rLo,dstLo) ); return; } if (ty == Ity_I1) { - AMD64CondCode cond = iselCondCode(env, stmt->Ist.Tmp.data); + AMD64CondCode cond = iselCondCode(env, stmt->Ist.WrTmp.data); HReg dst = lookupIRTemp(env, tmp); addInstr(env, AMD64Instr_Set64(cond, dst)); return; } if (ty == Ity_F64) { HReg dst = lookupIRTemp(env, tmp); - HReg src = iselDblExpr(env, stmt->Ist.Tmp.data); + HReg src = iselDblExpr(env, stmt->Ist.WrTmp.data); addInstr(env, mk_vMOVsd_RR(src, dst)); return; } if (ty == Ity_F32) { HReg dst = lookupIRTemp(env, tmp); - HReg src = iselFltExpr(env, stmt->Ist.Tmp.data); + HReg src = iselFltExpr(env, stmt->Ist.WrTmp.data); addInstr(env, mk_vMOVsd_RR(src, dst)); return; } if (ty == Ity_V128) { HReg dst = lookupIRTemp(env, tmp); - HReg src = iselVecExpr(env, stmt->Ist.Tmp.data); + HReg src = iselVecExpr(env, stmt->Ist.WrTmp.data); addInstr(env, mk_vMOVsd_RR(src, dst)); return; } @@ -3799,11 +3799,11 @@ static void iselNext ( ISelEnv* env, IRExpr* next, IRJumpKind jk ) /*--- Insn selector top-level ---*/ /*---------------------------------------------------------*/ -/* Translate an entire BB to amd64 code. */ +/* Translate an entire SB to amd64 code. */ -HInstrArray* iselBB_AMD64 ( IRBB* bb, VexArch arch_host, +HInstrArray* iselSB_AMD64 ( IRSB* bb, VexArch arch_host, VexArchInfo* archinfo_host, - VexMiscInfo* vmi/*UNUSED*/ ) + VexAbiInfo* vbi/*UNUSED*/ ) { Int i, j; HReg hreg, hregHI; diff --git a/VEX/priv/host-arm/hdefs.h b/VEX/priv/host-arm/hdefs.h index ad4e25b07b..57f6681f72 100644 --- a/VEX/priv/host-arm/hdefs.h +++ b/VEX/priv/host-arm/hdefs.h @@ -451,7 +451,7 @@ extern Int emit_ARMInstr ( UChar* buf, Int nbuf, ARMInstr* ); extern ARMInstr* genSpill_ARM ( HReg rreg, Int offset ); extern ARMInstr* genReload_ARM ( HReg rreg, Int offset ); extern void getAllocableRegs_ARM ( Int*, HReg** ); -extern HInstrArray* iselBB_ARM ( IRBB* ); +extern HInstrArray* iselSB_ARM ( IRSB* ); #endif /* ndef __LIBVEX_ARMH_DEFS_H */ diff --git a/VEX/priv/host-arm/isel.c b/VEX/priv/host-arm/isel.c index 2edc55d89b..478b668503 100644 --- a/VEX/priv/host-arm/isel.c +++ b/VEX/priv/host-arm/isel.c @@ -487,7 +487,7 @@ void doHelperCall ( ISelEnv* env, offset. */ static -ARMAMode2* genGuestArrayOffset ( ISelEnv* env, IRArray* descr, +ARMAMode2* genGuestArrayOffset ( ISelEnv* env, IRRegArray* descr, IRExpr* off, Int bias ) { HReg tmp, tmp2, roff; @@ -824,12 +824,12 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt ) /* --------- TMP --------- */ /* assign value to temporary */ - case Ist_Tmp: { - IRTemp tmp = stmt->Ist.Tmp.tmp; + case Ist_WrTmp: { + IRTemp tmp = stmt->Ist.WrTmp.tmp; IRType ty = typeOfIRTemp(env->type_env, tmp); if (ty == Ity_I32 || ty == Ity_I16 || ty == Ity_I8) { - ARMAMode1* am = iselIntExpr_AMode1(env, stmt->Ist.Tmp.data); + ARMAMode1* am = iselIntExpr_AMode1(env, stmt->Ist.WrTmp.data); HReg dst = lookupIRTemp(env, tmp); addInstr(env, ARMInstr_DPInstr1(ARMalu_MOV,dst,am)); return; @@ -927,9 +927,9 @@ static void iselNext ( ISelEnv* env, IRExpr* next, IRJumpKind jk ) /*--- Insn selector top-level ---*/ /*---------------------------------------------------------*/ -/* Translate an entire BB to arm code. */ +/* Translate an entire SB to arm code. */ -HInstrArray* iselBB_ARM ( IRBB* bb ) +HInstrArray* iselSB_ARM ( IRSB* bb ) { Int i, j; diff --git a/VEX/priv/host-ppc/hdefs.h b/VEX/priv/host-ppc/hdefs.h index ca71731aa1..b0608edc6d 100644 --- a/VEX/priv/host-ppc/hdefs.h +++ b/VEX/priv/host-ppc/hdefs.h @@ -838,9 +838,9 @@ extern Int emit_PPCInstr ( UChar* buf, Int nbuf, PPCInstr*, extern PPCInstr* genSpill_PPC ( HReg rreg, UShort offsetB, Bool mode64 ); extern PPCInstr* genReload_PPC ( HReg rreg, UShort offsetB, Bool mode64 ); extern void getAllocableRegs_PPC ( Int*, HReg**, Bool mode64 ); -extern HInstrArray* iselBB_PPC ( IRBB*, VexArch, +extern HInstrArray* iselSB_PPC ( IRSB*, VexArch, VexArchInfo*, - VexMiscInfo* ); + VexAbiInfo* ); #endif /* ndef __LIBVEX_HOST_PPC_HDEFS_H */ diff --git a/VEX/priv/host-ppc/isel.c b/VEX/priv/host-ppc/isel.c index 4dda13da66..17c34065cf 100644 --- a/VEX/priv/host-ppc/isel.c +++ b/VEX/priv/host-ppc/isel.c @@ -279,7 +279,7 @@ typedef IRExpr* previous_rm; - VexMiscInfo* vmi; + VexAbiInfo* vbi; } ISelEnv; @@ -539,7 +539,7 @@ static PPCAMode* advance4 ( ISelEnv* env, PPCAMode* am ) bias, generate a PPCAMode pointing at the relevant piece of guest state. */ static -PPCAMode* genGuestArrayOffset ( ISelEnv* env, IRArray* descr, +PPCAMode* genGuestArrayOffset ( ISelEnv* env, IRRegArray* descr, IRExpr* off, Int bias ) { HReg rtmp, roff; @@ -609,7 +609,7 @@ static Bool mightRequireFixedRegs ( IRExpr* e ) { switch (e->tag) { - case Iex_Tmp: case Iex_Const: case Iex_Get: + case Iex_RdTmp: case Iex_Const: case Iex_Get: return False; default: return True; @@ -638,7 +638,7 @@ void doHelperCall ( ISelEnv* env, /* Do we need to force use of an odd-even reg pair for 64-bit args? */ Bool regalign_int64s - = (!mode64) && env->vmi->host_ppc32_regalign_int64_args; + = (!mode64) && env->vbi->host_ppc32_regalign_int64_args; /* Marshal args for a call and do the call. @@ -955,9 +955,9 @@ void set_FPU_rounding_mode ( ISelEnv* env, IRExpr* mode ) /* Do we need to do anything? */ if (env->previous_rm - && env->previous_rm->tag == Iex_Tmp - && mode->tag == Iex_Tmp - && env->previous_rm->Iex.Tmp.tmp == mode->Iex.Tmp.tmp) { + && env->previous_rm->tag == Iex_RdTmp + && mode->tag == Iex_RdTmp + && env->previous_rm->Iex.RdTmp.tmp == mode->Iex.RdTmp.tmp) { /* no - setting it to what it was before. */ vassert(typeOfIRExpr(env->type_env, env->previous_rm) == Ity_I32); return; @@ -1155,8 +1155,8 @@ static HReg iselWordExpr_R_wrk ( ISelEnv* env, IRExpr* e ) switch (e->tag) { /* --------- TEMP --------- */ - case Iex_Tmp: - return lookupIRTemp(env, e->Iex.Tmp.tmp); + case Iex_RdTmp: + return lookupIRTemp(env, e->Iex.RdTmp.tmp); /* --------- LOAD --------- */ case Iex_Load: { @@ -2360,8 +2360,8 @@ static PPCCondCode iselCondCode_wrk ( ISelEnv* env, IRExpr* e ) } /* var */ - if (e->tag == Iex_Tmp) { - HReg r_src = lookupIRTemp(env, e->Iex.Tmp.tmp); + if (e->tag == Iex_RdTmp) { + HReg r_src = lookupIRTemp(env, e->Iex.RdTmp.tmp); HReg src_masked = newVRegI(env); addInstr(env, PPCInstr_Alu(Palu_AND, src_masked, @@ -2410,8 +2410,8 @@ static void iselInt128Expr_wrk ( HReg* rHi, HReg* rLo, vassert(typeOfIRExpr(env->type_env,e) == Ity_I128); /* read 128-bit IRTemp */ - if (e->tag == Iex_Tmp) { - lookupIRTempPair( rHi, rLo, env, e->Iex.Tmp.tmp); + if (e->tag == Iex_RdTmp) { + lookupIRTempPair( rHi, rLo, env, e->Iex.RdTmp.tmp); return; } @@ -2510,8 +2510,8 @@ static void iselInt64Expr_wrk ( HReg* rHi, HReg* rLo, } /* read 64-bit IRTemp */ - if (e->tag == Iex_Tmp) { - lookupIRTempPair( rHi, rLo, env, e->Iex.Tmp.tmp); + if (e->tag == Iex_RdTmp) { + lookupIRTempPair( rHi, rLo, env, e->Iex.RdTmp.tmp); return; } @@ -2808,8 +2808,8 @@ static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e ) IRType ty = typeOfIRExpr(env->type_env,e); vassert(ty == Ity_F32); - if (e->tag == Iex_Tmp) { - return lookupIRTemp(env, e->Iex.Tmp.tmp); + if (e->tag == Iex_RdTmp) { + return lookupIRTemp(env, e->Iex.RdTmp.tmp); } if (e->tag == Iex_Load && e->Iex.Load.end == Iend_BE) { @@ -2925,8 +2925,8 @@ static HReg iselDblExpr_wrk ( ISelEnv* env, IRExpr* e ) vassert(e); vassert(ty == Ity_F64); - if (e->tag == Iex_Tmp) { - return lookupIRTemp(env, e->Iex.Tmp.tmp); + if (e->tag == Iex_RdTmp) { + return lookupIRTemp(env, e->Iex.RdTmp.tmp); } /* --------- LITERAL --------- */ @@ -3192,8 +3192,8 @@ static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e ) vassert(e); vassert(ty == Ity_V128); - if (e->tag == Iex_Tmp) { - return lookupIRTemp(env, e->Iex.Tmp.tmp); + if (e->tag == Iex_RdTmp) { + return lookupIRTemp(env, e->Iex.RdTmp.tmp); } if (e->tag == Iex_Get) { @@ -3713,19 +3713,19 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt ) } /* --------- TMP --------- */ - case Ist_Tmp: { - IRTemp tmp = stmt->Ist.Tmp.tmp; + case Ist_WrTmp: { + IRTemp tmp = stmt->Ist.WrTmp.tmp; IRType ty = typeOfIRTemp(env->type_env, tmp); if (ty == Ity_I8 || ty == Ity_I16 || ty == Ity_I32 || ((ty == Ity_I64) && mode64)) { HReg r_dst = lookupIRTemp(env, tmp); - HReg r_src = iselWordExpr_R(env, stmt->Ist.Tmp.data); + HReg r_src = iselWordExpr_R(env, stmt->Ist.WrTmp.data); addInstr(env, mk_iMOVds_RR( r_dst, r_src )); return; } if (!mode64 && ty == Ity_I64) { HReg r_srcHi, r_srcLo, r_dstHi, r_dstLo; - iselInt64Expr(&r_srcHi,&r_srcLo, env, stmt->Ist.Tmp.data); + iselInt64Expr(&r_srcHi,&r_srcLo, env, stmt->Ist.WrTmp.data); lookupIRTempPair( &r_dstHi, &r_dstLo, env, tmp); addInstr(env, mk_iMOVds_RR(r_dstHi, r_srcHi) ); addInstr(env, mk_iMOVds_RR(r_dstLo, r_srcLo) ); @@ -3733,33 +3733,33 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt ) } if (mode64 && ty == Ity_I128) { HReg r_srcHi, r_srcLo, r_dstHi, r_dstLo; - iselInt128Expr(&r_srcHi,&r_srcLo, env, stmt->Ist.Tmp.data); + iselInt128Expr(&r_srcHi,&r_srcLo, env, stmt->Ist.WrTmp.data); lookupIRTempPair( &r_dstHi, &r_dstLo, env, tmp); addInstr(env, mk_iMOVds_RR(r_dstHi, r_srcHi) ); addInstr(env, mk_iMOVds_RR(r_dstLo, r_srcLo) ); return; } if (ty == Ity_I1) { - PPCCondCode cond = iselCondCode(env, stmt->Ist.Tmp.data); + PPCCondCode cond = iselCondCode(env, stmt->Ist.WrTmp.data); HReg r_dst = lookupIRTemp(env, tmp); addInstr(env, PPCInstr_Set(cond, r_dst)); return; } if (ty == Ity_F64) { HReg fr_dst = lookupIRTemp(env, tmp); - HReg fr_src = iselDblExpr(env, stmt->Ist.Tmp.data); + HReg fr_src = iselDblExpr(env, stmt->Ist.WrTmp.data); addInstr(env, PPCInstr_FpUnary(Pfp_MOV, fr_dst, fr_src)); return; } if (ty == Ity_F32) { HReg fr_dst = lookupIRTemp(env, tmp); - HReg fr_src = iselFltExpr(env, stmt->Ist.Tmp.data); + HReg fr_src = iselFltExpr(env, stmt->Ist.WrTmp.data); addInstr(env, PPCInstr_FpUnary(Pfp_MOV, fr_dst, fr_src)); return; } if (ty == Ity_V128) { HReg v_dst = lookupIRTemp(env, tmp); - HReg v_src = iselVecExpr(env, stmt->Ist.Tmp.data); + HReg v_src = iselVecExpr(env, stmt->Ist.WrTmp.data); addInstr(env, PPCInstr_AvUnary(Pav_MOV, v_dst, v_src)); return; } @@ -3876,11 +3876,11 @@ static void iselNext ( ISelEnv* env, IRExpr* next, IRJumpKind jk ) /*--- Insn selector top-level ---*/ /*---------------------------------------------------------*/ -/* Translate an entire BB to ppc code. */ +/* Translate an entire BS to ppc code. */ -HInstrArray* iselBB_PPC ( IRBB* bb, VexArch arch_host, +HInstrArray* iselSB_PPC ( IRSB* bb, VexArch arch_host, VexArchInfo* archinfo_host, - VexMiscInfo* vmi ) + VexAbiInfo* vbi ) { Int i, j; HReg hreg, hregHI; @@ -3927,7 +3927,7 @@ HInstrArray* iselBB_PPC ( IRBB* bb, VexArch arch_host, /* and finally ... */ env->hwcaps = hwcaps_host; env->previous_rm = NULL; - env->vmi = vmi; + env->vbi = vbi; /* For each IR temporary, allocate a suitably-kinded virtual register. */ diff --git a/VEX/priv/host-x86/hdefs.h b/VEX/priv/host-x86/hdefs.h index 29581905b9..ceca4a77e3 100644 --- a/VEX/priv/host-x86/hdefs.h +++ b/VEX/priv/host-x86/hdefs.h @@ -665,9 +665,9 @@ extern Int emit_X86Instr ( UChar* buf, Int nbuf, X86Instr*, extern X86Instr* genSpill_X86 ( HReg rreg, Int offset, Bool ); extern X86Instr* genReload_X86 ( HReg rreg, Int offset, Bool ); extern void getAllocableRegs_X86 ( Int*, HReg** ); -extern HInstrArray* iselBB_X86 ( IRBB*, VexArch, +extern HInstrArray* iselSB_X86 ( IRSB*, VexArch, VexArchInfo*, - VexMiscInfo* ); + VexAbiInfo* ); #endif /* ndef __LIBVEX_HOST_X86_HDEFS_H */ diff --git a/VEX/priv/host-x86/isel.c b/VEX/priv/host-x86/isel.c index d22b6565e5..4e3c9e41de 100644 --- a/VEX/priv/host-x86/isel.c +++ b/VEX/priv/host-x86/isel.c @@ -362,7 +362,7 @@ static Bool mightRequireFixedRegs ( IRExpr* e ) { switch (e->tag) { - case Iex_Tmp: case Iex_Const: case Iex_Get: + case Iex_RdTmp: case Iex_Const: case Iex_Get: return False; default: return True; @@ -565,7 +565,7 @@ void doHelperCall ( ISelEnv* env, offset. */ static -X86AMode* genGuestArrayOffset ( ISelEnv* env, IRArray* descr, +X86AMode* genGuestArrayOffset ( ISelEnv* env, IRRegArray* descr, IRExpr* off, Int bias ) { HReg tmp, roff; @@ -732,8 +732,8 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e ) switch (e->tag) { /* --------- TEMP --------- */ - case Iex_Tmp: { - return lookupIRTemp(env, e->Iex.Tmp.tmp); + case Iex_RdTmp: { + return lookupIRTemp(env, e->Iex.RdTmp.tmp); } /* --------- LOAD --------- */ @@ -1502,8 +1502,8 @@ static X86CondCode iselCondCode_wrk ( ISelEnv* env, IRExpr* e ) vassert(typeOfIRExpr(env->type_env,e) == Ity_I1); /* var */ - if (e->tag == Iex_Tmp) { - HReg r32 = lookupIRTemp(env, e->Iex.Tmp.tmp); + if (e->tag == Iex_RdTmp) { + HReg r32 = lookupIRTemp(env, e->Iex.RdTmp.tmp); /* Test32 doesn't modify r32; so this is OK. */ addInstr(env, X86Instr_Test32(1,r32)); return Xcc_NZ; @@ -1803,8 +1803,8 @@ static void iselInt64Expr_wrk ( HReg* rHi, HReg* rLo, ISelEnv* env, IRExpr* e ) } /* read 64-bit IRTemp */ - if (e->tag == Iex_Tmp) { - lookupIRTemp64( rHi, rLo, env, e->Iex.Tmp.tmp); + if (e->tag == Iex_RdTmp) { + lookupIRTemp64( rHi, rLo, env, e->Iex.RdTmp.tmp); return; } @@ -2456,8 +2456,8 @@ static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e ) IRType ty = typeOfIRExpr(env->type_env,e); vassert(ty == Ity_F32); - if (e->tag == Iex_Tmp) { - return lookupIRTemp(env, e->Iex.Tmp.tmp); + if (e->tag == Iex_RdTmp) { + return lookupIRTemp(env, e->Iex.RdTmp.tmp); } if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { @@ -2555,8 +2555,8 @@ static HReg iselDblExpr_wrk ( ISelEnv* env, IRExpr* e ) vassert(e); vassert(ty == Ity_F64); - if (e->tag == Iex_Tmp) { - return lookupIRTemp(env, e->Iex.Tmp.tmp); + if (e->tag == Iex_RdTmp) { + return lookupIRTemp(env, e->Iex.RdTmp.tmp); } if (e->tag == Iex_Const) { @@ -2821,8 +2821,8 @@ static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e ) REQUIRE_SSE1; - if (e->tag == Iex_Tmp) { - return lookupIRTemp(env, e->Iex.Tmp.tmp); + if (e->tag == Iex_RdTmp) { + return lookupIRTemp(env, e->Iex.RdTmp.tmp); } if (e->tag == Iex_Get) { @@ -3461,44 +3461,44 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt ) } /* --------- TMP --------- */ - case Ist_Tmp: { - IRTemp tmp = stmt->Ist.Tmp.tmp; + case Ist_WrTmp: { + IRTemp tmp = stmt->Ist.WrTmp.tmp; IRType ty = typeOfIRTemp(env->type_env, tmp); if (ty == Ity_I32 || ty == Ity_I16 || ty == Ity_I8) { - X86RMI* rmi = iselIntExpr_RMI(env, stmt->Ist.Tmp.data); + X86RMI* rmi = iselIntExpr_RMI(env, stmt->Ist.WrTmp.data); HReg dst = lookupIRTemp(env, tmp); addInstr(env, X86Instr_Alu32R(Xalu_MOV,rmi,dst)); return; } if (ty == Ity_I64) { HReg rHi, rLo, dstHi, dstLo; - iselInt64Expr(&rHi,&rLo, env, stmt->Ist.Tmp.data); + iselInt64Expr(&rHi,&rLo, env, stmt->Ist.WrTmp.data); lookupIRTemp64( &dstHi, &dstLo, env, tmp); addInstr(env, mk_iMOVsd_RR(rHi,dstHi) ); addInstr(env, mk_iMOVsd_RR(rLo,dstLo) ); return; } if (ty == Ity_I1) { - X86CondCode cond = iselCondCode(env, stmt->Ist.Tmp.data); + X86CondCode cond = iselCondCode(env, stmt->Ist.WrTmp.data); HReg dst = lookupIRTemp(env, tmp); addInstr(env, X86Instr_Set32(cond, dst)); return; } if (ty == Ity_F64) { HReg dst = lookupIRTemp(env, tmp); - HReg src = iselDblExpr(env, stmt->Ist.Tmp.data); + HReg src = iselDblExpr(env, stmt->Ist.WrTmp.data); addInstr(env, X86Instr_FpUnary(Xfp_MOV,src,dst)); return; } if (ty == Ity_F32) { HReg dst = lookupIRTemp(env, tmp); - HReg src = iselFltExpr(env, stmt->Ist.Tmp.data); + HReg src = iselFltExpr(env, stmt->Ist.WrTmp.data); addInstr(env, X86Instr_FpUnary(Xfp_MOV,src,dst)); return; } if (ty == Ity_V128) { HReg dst = lookupIRTemp(env, tmp); - HReg src = iselVecExpr(env, stmt->Ist.Tmp.data); + HReg src = iselVecExpr(env, stmt->Ist.WrTmp.data); addInstr(env, mk_vMOVsd_RR(src,dst)); return; } @@ -3602,11 +3602,11 @@ static void iselNext ( ISelEnv* env, IRExpr* next, IRJumpKind jk ) /*--- Insn selector top-level ---*/ /*---------------------------------------------------------*/ -/* Translate an entire BB to x86 code. */ +/* Translate an entire SB to x86 code. */ -HInstrArray* iselBB_X86 ( IRBB* bb, VexArch arch_host, +HInstrArray* iselSB_X86 ( IRSB* bb, VexArch arch_host, VexArchInfo* archinfo_host, - VexMiscInfo* vmi/*UNUSED*/ ) + VexAbiInfo* vbi/*UNUSED*/ ) { Int i, j; HReg hreg, hregHI; diff --git a/VEX/priv/ir/irdefs.c b/VEX/priv/ir/irdefs.c index 28d9d2c040..64d83f24e7 100644 --- a/VEX/priv/ir/irdefs.c +++ b/VEX/priv/ir/irdefs.c @@ -102,7 +102,7 @@ void ppIRCallee ( IRCallee* ce ) vex_printf("{%p}", (void*)ce->addr); } -void ppIRArray ( IRArray* arr ) +void ppIRRegArray ( IRRegArray* arr ) { vex_printf("(%d:%dx", arr->base, arr->nElems); ppIRType(arr->elemTy); @@ -582,13 +582,13 @@ void ppIRExpr ( IRExpr* e ) break; case Iex_GetI: vex_printf( "GETI" ); - ppIRArray(e->Iex.GetI.descr); + ppIRRegArray(e->Iex.GetI.descr); vex_printf("["); ppIRExpr(e->Iex.GetI.ix); vex_printf(",%d]", e->Iex.GetI.bias); break; - case Iex_Tmp: - ppIRTemp(e->Iex.Tmp.tmp); + case Iex_RdTmp: + ppIRTemp(e->Iex.RdTmp.tmp); break; case Iex_Qop: ppIROp(e->Iex.Qop.op); @@ -755,16 +755,16 @@ void ppIRStmt ( IRStmt* s ) break; case Ist_PutI: vex_printf( "PUTI" ); - ppIRArray(s->Ist.PutI.descr); + ppIRRegArray(s->Ist.PutI.descr); vex_printf("["); ppIRExpr(s->Ist.PutI.ix); vex_printf(",%d] = ", s->Ist.PutI.bias); ppIRExpr(s->Ist.PutI.data); break; - case Ist_Tmp: - ppIRTemp(s->Ist.Tmp.tmp); + case Ist_WrTmp: + ppIRTemp(s->Ist.WrTmp.tmp); vex_printf( " = " ); - ppIRExpr(s->Ist.Tmp.data); + ppIRExpr(s->Ist.WrTmp.data); break; case Ist_Store: vex_printf( "ST%s(", s->Ist.Store.end==Iend_LE ? "le" : "be" ); @@ -808,10 +808,10 @@ void ppIRTypeEnv ( IRTypeEnv* env ) { vex_printf( "\n"); } -void ppIRBB ( IRBB* bb ) +void ppIRSB ( IRSB* bb ) { Int i; - vex_printf("IRBB {\n"); + vex_printf("IRSB {\n"); ppIRTypeEnv(bb->tyenv); vex_printf("\n"); for (i = 0; i < bb->stmts_used; i++) { @@ -909,14 +909,14 @@ IRCallee* mkIRCallee ( Int regparms, HChar* name, void* addr ) } -/* Constructors -- IRArray */ +/* Constructors -- IRRegArray */ -IRArray* mkIRArray ( Int base, IRType elemTy, Int nElems ) +IRRegArray* mkIRRegArray ( Int base, IRType elemTy, Int nElems ) { - IRArray* arr = LibVEX_Alloc(sizeof(IRArray)); - arr->base = base; - arr->elemTy = elemTy; - arr->nElems = nElems; + IRRegArray* arr = LibVEX_Alloc(sizeof(IRRegArray)); + arr->base = base; + arr->elemTy = elemTy; + arr->nElems = nElems; vassert(!(arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */)); vassert(!(arr->elemTy == Ity_I1)); vassert(!(arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */)); @@ -939,7 +939,7 @@ IRExpr* IRExpr_Get ( Int off, IRType ty ) { e->Iex.Get.ty = ty; return e; } -IRExpr* IRExpr_GetI ( IRArray* descr, IRExpr* ix, Int bias ) { +IRExpr* IRExpr_GetI ( IRRegArray* descr, IRExpr* ix, Int bias ) { IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); e->tag = Iex_GetI; e->Iex.GetI.descr = descr; @@ -947,10 +947,10 @@ IRExpr* IRExpr_GetI ( IRArray* descr, IRExpr* ix, Int bias ) { e->Iex.GetI.bias = bias; return e; } -IRExpr* IRExpr_Tmp ( IRTemp tmp ) { - IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); - e->tag = Iex_Tmp; - e->Iex.Tmp.tmp = tmp; +IRExpr* IRExpr_RdTmp ( IRTemp tmp ) { + IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); + e->tag = Iex_RdTmp; + e->Iex.RdTmp.tmp = tmp; return e; } IRExpr* IRExpr_Qop ( IROp op, IRExpr* arg1, IRExpr* arg2, @@ -1121,7 +1121,7 @@ IRStmt* IRStmt_Put ( Int off, IRExpr* data ) { s->Ist.Put.data = data; return s; } -IRStmt* IRStmt_PutI ( IRArray* descr, IRExpr* ix, +IRStmt* IRStmt_PutI ( IRRegArray* descr, IRExpr* ix, Int bias, IRExpr* data ) { IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); s->tag = Ist_PutI; @@ -1131,11 +1131,11 @@ IRStmt* IRStmt_PutI ( IRArray* descr, IRExpr* ix, s->Ist.PutI.data = data; return s; } -IRStmt* IRStmt_Tmp ( IRTemp tmp, IRExpr* data ) { - IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); - s->tag = Ist_Tmp; - s->Ist.Tmp.tmp = tmp; - s->Ist.Tmp.data = data; +IRStmt* IRStmt_WrTmp ( IRTemp tmp, IRExpr* data ) { + IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); + s->tag = Ist_WrTmp; + s->Ist.WrTmp.tmp = tmp; + s->Ist.WrTmp.data = data; return s; } IRStmt* IRStmt_Store ( IREndness end, IRExpr* addr, IRExpr* data ) { @@ -1183,11 +1183,11 @@ IRTypeEnv* emptyIRTypeEnv ( void ) } -/* Constructors -- IRBB */ +/* Constructors -- IRSB */ -IRBB* emptyIRBB ( void ) +IRSB* emptyIRSB ( void ) { - IRBB* bb = LibVEX_Alloc(sizeof(IRBB)); + IRSB* bb = LibVEX_Alloc(sizeof(IRSB)); bb->tyenv = emptyIRTypeEnv(); bb->stmts_used = 0; bb->stmts_size = 8; @@ -1208,7 +1208,7 @@ IRBB* emptyIRBB ( void ) /* Shallow copy of an IRExpr vector */ -IRExpr** sopyIRExprVec ( IRExpr** vec ) +IRExpr** shallowCopyIRExprVec ( IRExpr** vec ) { Int i; IRExpr** newvec; @@ -1223,18 +1223,18 @@ IRExpr** sopyIRExprVec ( IRExpr** vec ) /* Deep copy of an IRExpr vector */ -IRExpr** dopyIRExprVec ( IRExpr** vec ) +IRExpr** deepCopyIRExprVec ( IRExpr** vec ) { Int i; - IRExpr** newvec = sopyIRExprVec( vec ); + IRExpr** newvec = shallowCopyIRExprVec( vec ); for (i = 0; newvec[i]; i++) - newvec[i] = dopyIRExpr(newvec[i]); + newvec[i] = deepCopyIRExpr(newvec[i]); return newvec; } /* Deep copy constructors for all heap-allocated IR types follow. */ -IRConst* dopyIRConst ( IRConst* c ) +IRConst* deepCopyIRConst ( IRConst* c ) { switch (c->tag) { case Ico_U1: return IRConst_U1(c->Ico.U1); @@ -1245,81 +1245,81 @@ IRConst* dopyIRConst ( IRConst* c ) case Ico_F64: return IRConst_F64(c->Ico.F64); case Ico_F64i: return IRConst_F64i(c->Ico.F64i); case Ico_V128: return IRConst_V128(c->Ico.V128); - default: vpanic("dopyIRConst"); + default: vpanic("deepCopyIRConst"); } } -IRCallee* dopyIRCallee ( IRCallee* ce ) +IRCallee* deepCopyIRCallee ( IRCallee* ce ) { IRCallee* ce2 = mkIRCallee(ce->regparms, ce->name, ce->addr); ce2->mcx_mask = ce->mcx_mask; return ce2; } -IRArray* dopyIRArray ( IRArray* d ) +IRRegArray* deepCopyIRRegArray ( IRRegArray* d ) { - return mkIRArray(d->base, d->elemTy, d->nElems); + return mkIRRegArray(d->base, d->elemTy, d->nElems); } -IRExpr* dopyIRExpr ( IRExpr* e ) +IRExpr* deepCopyIRExpr ( IRExpr* e ) { switch (e->tag) { case Iex_Get: return IRExpr_Get(e->Iex.Get.offset, e->Iex.Get.ty); case Iex_GetI: - return IRExpr_GetI(dopyIRArray(e->Iex.GetI.descr), - dopyIRExpr(e->Iex.GetI.ix), + return IRExpr_GetI(deepCopyIRRegArray(e->Iex.GetI.descr), + deepCopyIRExpr(e->Iex.GetI.ix), e->Iex.GetI.bias); - case Iex_Tmp: - return IRExpr_Tmp(e->Iex.Tmp.tmp); + case Iex_RdTmp: + return IRExpr_RdTmp(e->Iex.RdTmp.tmp); case Iex_Qop: return IRExpr_Qop(e->Iex.Qop.op, - dopyIRExpr(e->Iex.Qop.arg1), - dopyIRExpr(e->Iex.Qop.arg2), - dopyIRExpr(e->Iex.Qop.arg3), - dopyIRExpr(e->Iex.Qop.arg4)); + deepCopyIRExpr(e->Iex.Qop.arg1), + deepCopyIRExpr(e->Iex.Qop.arg2), + deepCopyIRExpr(e->Iex.Qop.arg3), + deepCopyIRExpr(e->Iex.Qop.arg4)); case Iex_Triop: return IRExpr_Triop(e->Iex.Triop.op, - dopyIRExpr(e->Iex.Triop.arg1), - dopyIRExpr(e->Iex.Triop.arg2), - dopyIRExpr(e->Iex.Triop.arg3)); + deepCopyIRExpr(e->Iex.Triop.arg1), + deepCopyIRExpr(e->Iex.Triop.arg2), + deepCopyIRExpr(e->Iex.Triop.arg3)); case Iex_Binop: return IRExpr_Binop(e->Iex.Binop.op, - dopyIRExpr(e->Iex.Binop.arg1), - dopyIRExpr(e->Iex.Binop.arg2)); + deepCopyIRExpr(e->Iex.Binop.arg1), + deepCopyIRExpr(e->Iex.Binop.arg2)); case Iex_Unop: return IRExpr_Unop(e->Iex.Unop.op, - dopyIRExpr(e->Iex.Unop.arg)); + deepCopyIRExpr(e->Iex.Unop.arg)); case Iex_Load: return IRExpr_Load(e->Iex.Load.end, e->Iex.Load.ty, - dopyIRExpr(e->Iex.Load.addr)); + deepCopyIRExpr(e->Iex.Load.addr)); case Iex_Const: - return IRExpr_Const(dopyIRConst(e->Iex.Const.con)); + return IRExpr_Const(deepCopyIRConst(e->Iex.Const.con)); case Iex_CCall: - return IRExpr_CCall(dopyIRCallee(e->Iex.CCall.cee), + return IRExpr_CCall(deepCopyIRCallee(e->Iex.CCall.cee), e->Iex.CCall.retty, - dopyIRExprVec(e->Iex.CCall.args)); + deepCopyIRExprVec(e->Iex.CCall.args)); case Iex_Mux0X: - return IRExpr_Mux0X(dopyIRExpr(e->Iex.Mux0X.cond), - dopyIRExpr(e->Iex.Mux0X.expr0), - dopyIRExpr(e->Iex.Mux0X.exprX)); + return IRExpr_Mux0X(deepCopyIRExpr(e->Iex.Mux0X.cond), + deepCopyIRExpr(e->Iex.Mux0X.expr0), + deepCopyIRExpr(e->Iex.Mux0X.exprX)); default: - vpanic("dopyIRExpr"); + vpanic("deepCopyIRExpr"); } } -IRDirty* dopyIRDirty ( IRDirty* d ) +IRDirty* deepCopyIRDirty ( IRDirty* d ) { Int i; IRDirty* d2 = emptyIRDirty(); - d2->cee = dopyIRCallee(d->cee); - d2->guard = dopyIRExpr(d->guard); - d2->args = dopyIRExprVec(d->args); + d2->cee = deepCopyIRCallee(d->cee); + d2->guard = deepCopyIRExpr(d->guard); + d2->args = deepCopyIRExprVec(d->args); d2->tmp = d->tmp; d2->mFx = d->mFx; - d2->mAddr = d->mAddr==NULL ? NULL : dopyIRExpr(d->mAddr); + d2->mAddr = d->mAddr==NULL ? NULL : deepCopyIRExpr(d->mAddr); d2->mSize = d->mSize; d2->needsBBP = d->needsBBP; d2->nFxState = d->nFxState; @@ -1328,45 +1328,45 @@ IRDirty* dopyIRDirty ( IRDirty* d ) return d2; } -IRStmt* dopyIRStmt ( IRStmt* s ) +IRStmt* deepCopyIRStmt ( IRStmt* s ) { switch (s->tag) { case Ist_NoOp: return IRStmt_NoOp(); case Ist_AbiHint: - return IRStmt_AbiHint(dopyIRExpr(s->Ist.AbiHint.base), + return IRStmt_AbiHint(deepCopyIRExpr(s->Ist.AbiHint.base), s->Ist.AbiHint.len); case Ist_IMark: return IRStmt_IMark(s->Ist.IMark.addr, s->Ist.IMark.len); case Ist_Put: return IRStmt_Put(s->Ist.Put.offset, - dopyIRExpr(s->Ist.Put.data)); + deepCopyIRExpr(s->Ist.Put.data)); case Ist_PutI: - return IRStmt_PutI(dopyIRArray(s->Ist.PutI.descr), - dopyIRExpr(s->Ist.PutI.ix), + return IRStmt_PutI(deepCopyIRRegArray(s->Ist.PutI.descr), + deepCopyIRExpr(s->Ist.PutI.ix), s->Ist.PutI.bias, - dopyIRExpr(s->Ist.PutI.data)); - case Ist_Tmp: - return IRStmt_Tmp(s->Ist.Tmp.tmp, - dopyIRExpr(s->Ist.Tmp.data)); + deepCopyIRExpr(s->Ist.PutI.data)); + case Ist_WrTmp: + return IRStmt_WrTmp(s->Ist.WrTmp.tmp, + deepCopyIRExpr(s->Ist.WrTmp.data)); case Ist_Store: return IRStmt_Store(s->Ist.Store.end, - dopyIRExpr(s->Ist.Store.addr), - dopyIRExpr(s->Ist.Store.data)); + deepCopyIRExpr(s->Ist.Store.addr), + deepCopyIRExpr(s->Ist.Store.data)); case Ist_Dirty: - return IRStmt_Dirty(dopyIRDirty(s->Ist.Dirty.details)); + return IRStmt_Dirty(deepCopyIRDirty(s->Ist.Dirty.details)); case Ist_MFence: return IRStmt_MFence(); case Ist_Exit: - return IRStmt_Exit(dopyIRExpr(s->Ist.Exit.guard), + return IRStmt_Exit(deepCopyIRExpr(s->Ist.Exit.guard), s->Ist.Exit.jk, - dopyIRConst(s->Ist.Exit.dst)); + deepCopyIRConst(s->Ist.Exit.dst)); default: - vpanic("dopyIRStmt"); + vpanic("deepCopyIRStmt"); } } -IRTypeEnv* dopyIRTypeEnv ( IRTypeEnv* src ) +IRTypeEnv* deepCopyIRTypeEnv ( IRTypeEnv* src ) { Int i; IRTypeEnv* dst = LibVEX_Alloc(sizeof(IRTypeEnv)); @@ -1378,24 +1378,24 @@ IRTypeEnv* dopyIRTypeEnv ( IRTypeEnv* src ) return dst; } -IRBB* dopyIRBB ( IRBB* bb ) +IRSB* deepCopyIRSB ( IRSB* bb ) { Int i; IRStmt** sts2; - IRBB* bb2 = dopyIRBBExceptStmts(bb); + IRSB* bb2 = deepCopyIRSBExceptStmts(bb); bb2->stmts_used = bb2->stmts_size = bb->stmts_used; sts2 = LibVEX_Alloc(bb2->stmts_used * sizeof(IRStmt*)); for (i = 0; i < bb2->stmts_used; i++) - sts2[i] = dopyIRStmt(bb->stmts[i]); + sts2[i] = deepCopyIRStmt(bb->stmts[i]); bb2->stmts = sts2; return bb2; } -IRBB* dopyIRBBExceptStmts ( IRBB* bb ) +IRSB* deepCopyIRSBExceptStmts ( IRSB* bb ) { - IRBB* bb2 = emptyIRBB(); - bb2->tyenv = dopyIRTypeEnv(bb->tyenv); - bb2->next = dopyIRExpr(bb->next); + IRSB* bb2 = emptyIRSB(); + bb2->tyenv = deepCopyIRTypeEnv(bb->tyenv); + bb2->next = deepCopyIRExpr(bb->next); bb2->jumpkind = bb->jumpkind; return bb2; } @@ -1770,7 +1770,7 @@ void typeOfPrimop ( IROp op, /*--- Helper functions for the IR -- IR Basic Blocks ---*/ /*---------------------------------------------------------------*/ -void addStmtToIRBB ( IRBB* bb, IRStmt* st ) +void addStmtToIRSB ( IRSB* bb, IRStmt* st ) { Int i; if (bb->stmts_used == bb->stmts_size) { @@ -1854,8 +1854,8 @@ IRType typeOfIRExpr ( IRTypeEnv* tyenv, IRExpr* e ) return e->Iex.Get.ty; case Iex_GetI: return e->Iex.GetI.descr->elemTy; - case Iex_Tmp: - return typeOfIRTemp(tyenv, e->Iex.Tmp.tmp); + case Iex_RdTmp: + return typeOfIRTemp(tyenv, e->Iex.RdTmp.tmp); case Iex_Const: return typeOfIRConst(e->Iex.Const.con); case Iex_Qop: @@ -1914,7 +1914,7 @@ Bool isPlausibleIRType ( IRType ty ) /* Relies on: inline static Bool isAtom ( IRExpr* e ) { - return e->tag == Iex_Tmp || e->tag == Iex_Const; + return e->tag == Iex_RdTmp || e->tag == Iex_Const; } */ @@ -1932,16 +1932,16 @@ Bool isFlatIRStmt ( IRStmt* st ) case Ist_PutI: return toBool( isIRAtom(st->Ist.PutI.ix) && isIRAtom(st->Ist.PutI.data) ); - case Ist_Tmp: + case Ist_WrTmp: /* This is the only interesting case. The RHS can be any expression, *but* all its subexpressions *must* be atoms. */ - e = st->Ist.Tmp.data; + e = st->Ist.WrTmp.data; switch (e->tag) { case Iex_Binder: return True; case Iex_Get: return True; case Iex_GetI: return isIRAtom(e->Iex.GetI.ix); - case Iex_Tmp: return True; + case Iex_RdTmp: return True; case Iex_Qop: return toBool( isIRAtom(e->Iex.Qop.arg1) && isIRAtom(e->Iex.Qop.arg2) @@ -2017,10 +2017,10 @@ static inline Int countArgs ( IRExpr** args ) static __attribute((noreturn)) -void sanityCheckFail ( IRBB* bb, IRStmt* stmt, HChar* what ) +void sanityCheckFail ( IRSB* bb, IRStmt* stmt, HChar* what ) { vex_printf("\nIR SANITY CHECK FAILURE\n\n"); - ppIRBB(bb); + ppIRSB(bb); if (stmt) { vex_printf("\nIN STATEMENT:\n\n"); ppIRStmt(stmt); @@ -2029,7 +2029,7 @@ void sanityCheckFail ( IRBB* bb, IRStmt* stmt, HChar* what ) vpanic("sanityCheckFail: exiting due to bad IR"); } -static Bool saneIRArray ( IRArray* arr ) +static Bool saneIRRegArray ( IRRegArray* arr ) { if (arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */) return False; @@ -2068,7 +2068,7 @@ static Bool saneIRConst ( IRConst* con ) def_count is zero. */ static -void useBeforeDef_Temp ( IRBB* bb, IRStmt* stmt, IRTemp tmp, Int* def_counts ) +void useBeforeDef_Temp ( IRSB* bb, IRStmt* stmt, IRTemp tmp, Int* def_counts ) { if (tmp < 0 || tmp >= bb->tyenv->types_used) sanityCheckFail(bb,stmt, "out of range Temp in IRExpr"); @@ -2077,7 +2077,7 @@ void useBeforeDef_Temp ( IRBB* bb, IRStmt* stmt, IRTemp tmp, Int* def_counts ) } static -void useBeforeDef_Expr ( IRBB* bb, IRStmt* stmt, IRExpr* expr, Int* def_counts ) +void useBeforeDef_Expr ( IRSB* bb, IRStmt* stmt, IRExpr* expr, Int* def_counts ) { Int i; switch (expr->tag) { @@ -2086,8 +2086,8 @@ void useBeforeDef_Expr ( IRBB* bb, IRStmt* stmt, IRExpr* expr, Int* def_counts ) case Iex_GetI: useBeforeDef_Expr(bb,stmt,expr->Iex.GetI.ix,def_counts); break; - case Iex_Tmp: - useBeforeDef_Temp(bb,stmt,expr->Iex.Tmp.tmp,def_counts); + case Iex_RdTmp: + useBeforeDef_Temp(bb,stmt,expr->Iex.RdTmp.tmp,def_counts); break; case Iex_Qop: useBeforeDef_Expr(bb,stmt,expr->Iex.Qop.arg1,def_counts); @@ -2127,7 +2127,7 @@ void useBeforeDef_Expr ( IRBB* bb, IRStmt* stmt, IRExpr* expr, Int* def_counts ) } static -void useBeforeDef_Stmt ( IRBB* bb, IRStmt* stmt, Int* def_counts ) +void useBeforeDef_Stmt ( IRSB* bb, IRStmt* stmt, Int* def_counts ) { Int i; IRDirty* d; @@ -2144,8 +2144,8 @@ void useBeforeDef_Stmt ( IRBB* bb, IRStmt* stmt, Int* def_counts ) useBeforeDef_Expr(bb,stmt,stmt->Ist.PutI.ix,def_counts); useBeforeDef_Expr(bb,stmt,stmt->Ist.PutI.data,def_counts); break; - case Ist_Tmp: - useBeforeDef_Expr(bb,stmt,stmt->Ist.Tmp.data,def_counts); + case Ist_WrTmp: + useBeforeDef_Expr(bb,stmt,stmt->Ist.WrTmp.data,def_counts); break; case Ist_Store: useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.addr,def_counts); @@ -2170,20 +2170,20 @@ void useBeforeDef_Stmt ( IRBB* bb, IRStmt* stmt, Int* def_counts ) } static -void tcExpr ( IRBB* bb, IRStmt* stmt, IRExpr* expr, IRType gWordTy ) +void tcExpr ( IRSB* bb, IRStmt* stmt, IRExpr* expr, IRType gWordTy ) { Int i; IRType t_dst, t_arg1, t_arg2, t_arg3, t_arg4; IRTypeEnv* tyenv = bb->tyenv; switch (expr->tag) { case Iex_Get: - case Iex_Tmp: + case Iex_RdTmp: break; case Iex_GetI: tcExpr(bb,stmt, expr->Iex.GetI.ix, gWordTy ); if (typeOfIRExpr(tyenv,expr->Iex.GetI.ix) != Ity_I32) sanityCheckFail(bb,stmt,"IRExpr.GetI.ix: not :: Ity_I32"); - if (!saneIRArray(expr->Iex.GetI.descr)) + if (!saneIRRegArray(expr->Iex.GetI.descr)) sanityCheckFail(bb,stmt,"IRExpr.GetI.descr: invalid descr"); break; case Iex_Qop: { @@ -2373,7 +2373,7 @@ void tcExpr ( IRBB* bb, IRStmt* stmt, IRExpr* expr, IRType gWordTy ) static -void tcStmt ( IRBB* bb, IRStmt* stmt, IRType gWordTy ) +void tcStmt ( IRSB* bb, IRStmt* stmt, IRType gWordTy ) { Int i; IRDirty* d; @@ -2405,13 +2405,13 @@ void tcStmt ( IRBB* bb, IRStmt* stmt, IRType gWordTy ) sanityCheckFail(bb,stmt,"IRStmt.PutI.data: data ty != elem ty"); if (typeOfIRExpr(tyenv,stmt->Ist.PutI.ix) != Ity_I32) sanityCheckFail(bb,stmt,"IRStmt.PutI.ix: not :: Ity_I32"); - if (!saneIRArray(stmt->Ist.PutI.descr)) + if (!saneIRRegArray(stmt->Ist.PutI.descr)) sanityCheckFail(bb,stmt,"IRStmt.PutI.descr: invalid descr"); break; - case Ist_Tmp: - tcExpr( bb, stmt, stmt->Ist.Tmp.data, gWordTy ); - if (typeOfIRTemp(tyenv, stmt->Ist.Tmp.tmp) - != typeOfIRExpr(tyenv, stmt->Ist.Tmp.data)) + case Ist_WrTmp: + tcExpr( bb, stmt, stmt->Ist.WrTmp.data, gWordTy ); + if (typeOfIRTemp(tyenv, stmt->Ist.WrTmp.tmp) + != typeOfIRExpr(tyenv, stmt->Ist.WrTmp.data)) sanityCheckFail(bb,stmt,"IRStmt.Put.Tmp: tmp and expr do not match"); break; case Ist_Store: @@ -2479,7 +2479,7 @@ void tcStmt ( IRBB* bb, IRStmt* stmt, IRType gWordTy ) } } -void sanityCheckIRBB ( IRBB* bb, HChar* caller, +void sanityCheckIRSB ( IRSB* bb, HChar* caller, Bool require_flat, IRType guest_word_size ) { Int i; @@ -2496,7 +2496,7 @@ void sanityCheckIRBB ( IRBB* bb, HChar* caller, if (bb->stmts_used < 0 || bb->stmts_size < 8 || bb->stmts_used > bb->stmts_size) /* this BB is so strange we can't even print it */ - vpanic("sanityCheckIRBB: stmts array limits wierd"); + vpanic("sanityCheckIRSB: stmts array limits wierd"); /* Ensure each temp has a plausible type. */ for (i = 0; i < n_temps; i++) { @@ -2531,12 +2531,12 @@ void sanityCheckIRBB ( IRBB* bb, HChar* caller, stmt = bb->stmts[i]; useBeforeDef_Stmt(bb,stmt,def_counts); - if (stmt->tag == Ist_Tmp) { - if (stmt->Ist.Tmp.tmp < 0 || stmt->Ist.Tmp.tmp >= n_temps) + if (stmt->tag == Ist_WrTmp) { + if (stmt->Ist.WrTmp.tmp < 0 || stmt->Ist.WrTmp.tmp >= n_temps) sanityCheckFail(bb, stmt, "IRStmt.Tmp: destination tmp is out of range"); - def_counts[stmt->Ist.Tmp.tmp]++; - if (def_counts[stmt->Ist.Tmp.tmp] > 1) + def_counts[stmt->Ist.WrTmp.tmp]++; + if (def_counts[stmt->Ist.WrTmp.tmp] > 1) sanityCheckFail(bb, stmt, "IRStmt.Tmp: destination tmp is assigned more than once"); } @@ -2582,7 +2582,7 @@ Bool eqIRConst ( IRConst* c1, IRConst* c2 ) } } -Bool eqIRArray ( IRArray* descr1, IRArray* descr2 ) +Bool eqIRRegArray ( IRRegArray* descr1, IRRegArray* descr2 ) { return toBool( descr1->base == descr2->base && descr1->elemTy == descr2->elemTy @@ -2648,8 +2648,8 @@ Bool eqIRAtom ( IRExpr* a1, IRExpr* a2 ) { vassert(isIRAtom(a1)); vassert(isIRAtom(a2)); - if (a1->tag == Iex_Tmp && a2->tag == Iex_Tmp) - return toBool(a1->Iex.Tmp.tmp == a2->Iex.Tmp.tmp); + if (a1->tag == Iex_RdTmp && a2->tag == Iex_RdTmp) + return toBool(a1->Iex.RdTmp.tmp == a2->Iex.RdTmp.tmp); if (a1->tag == Iex_Const && a2->tag == Iex_Const) return eqIRConst(a1->Iex.Const.con, a2->Iex.Const.con); return False; diff --git a/VEX/priv/ir/iropt.c b/VEX/priv/ir/iropt.c index 993bfeb407..4389e6c109 100644 --- a/VEX/priv/ir/iropt.c +++ b/VEX/priv/ir/iropt.c @@ -274,7 +274,7 @@ static Bool isFlat ( IRExpr* e ) the same value, after having appended extra IRTemp assignments to the end of 'bb'. */ -static IRExpr* flatten_Expr ( IRBB* bb, IRExpr* ex ) +static IRExpr* flatten_Expr ( IRSB* bb, IRExpr* ex ) { Int i; IRExpr** newargs; @@ -285,93 +285,93 @@ static IRExpr* flatten_Expr ( IRBB* bb, IRExpr* ex ) case Iex_GetI: t1 = newIRTemp(bb->tyenv, ty); - addStmtToIRBB(bb, IRStmt_Tmp(t1, + addStmtToIRSB(bb, IRStmt_WrTmp(t1, IRExpr_GetI(ex->Iex.GetI.descr, flatten_Expr(bb, ex->Iex.GetI.ix), ex->Iex.GetI.bias))); - return IRExpr_Tmp(t1); + return IRExpr_RdTmp(t1); case Iex_Get: t1 = newIRTemp(bb->tyenv, ty); - addStmtToIRBB(bb, - IRStmt_Tmp(t1, ex)); - return IRExpr_Tmp(t1); + addStmtToIRSB(bb, + IRStmt_WrTmp(t1, ex)); + return IRExpr_RdTmp(t1); case Iex_Qop: t1 = newIRTemp(bb->tyenv, ty); - addStmtToIRBB(bb, IRStmt_Tmp(t1, + addStmtToIRSB(bb, IRStmt_WrTmp(t1, IRExpr_Qop(ex->Iex.Qop.op, flatten_Expr(bb, ex->Iex.Qop.arg1), flatten_Expr(bb, ex->Iex.Qop.arg2), flatten_Expr(bb, ex->Iex.Qop.arg3), flatten_Expr(bb, ex->Iex.Qop.arg4)))); - return IRExpr_Tmp(t1); + return IRExpr_RdTmp(t1); case Iex_Triop: t1 = newIRTemp(bb->tyenv, ty); - addStmtToIRBB(bb, IRStmt_Tmp(t1, + addStmtToIRSB(bb, IRStmt_WrTmp(t1, IRExpr_Triop(ex->Iex.Triop.op, flatten_Expr(bb, ex->Iex.Triop.arg1), flatten_Expr(bb, ex->Iex.Triop.arg2), flatten_Expr(bb, ex->Iex.Triop.arg3)))); - return IRExpr_Tmp(t1); + return IRExpr_RdTmp(t1); case Iex_Binop: t1 = newIRTemp(bb->tyenv, ty); - addStmtToIRBB(bb, IRStmt_Tmp(t1, + addStmtToIRSB(bb, IRStmt_WrTmp(t1, IRExpr_Binop(ex->Iex.Binop.op, flatten_Expr(bb, ex->Iex.Binop.arg1), flatten_Expr(bb, ex->Iex.Binop.arg2)))); - return IRExpr_Tmp(t1); + return IRExpr_RdTmp(t1); case Iex_Unop: t1 = newIRTemp(bb->tyenv, ty); - addStmtToIRBB(bb, IRStmt_Tmp(t1, + addStmtToIRSB(bb, IRStmt_WrTmp(t1, IRExpr_Unop(ex->Iex.Unop.op, flatten_Expr(bb, ex->Iex.Unop.arg)))); - return IRExpr_Tmp(t1); + return IRExpr_RdTmp(t1); case Iex_Load: t1 = newIRTemp(bb->tyenv, ty); - addStmtToIRBB(bb, IRStmt_Tmp(t1, + addStmtToIRSB(bb, IRStmt_WrTmp(t1, IRExpr_Load(ex->Iex.Load.end, ex->Iex.Load.ty, flatten_Expr(bb, ex->Iex.Load.addr)))); - return IRExpr_Tmp(t1); + return IRExpr_RdTmp(t1); case Iex_CCall: - newargs = sopyIRExprVec(ex->Iex.CCall.args); + newargs = shallowCopyIRExprVec(ex->Iex.CCall.args); for (i = 0; newargs[i]; i++) newargs[i] = flatten_Expr(bb, newargs[i]); t1 = newIRTemp(bb->tyenv, ty); - addStmtToIRBB(bb, IRStmt_Tmp(t1, + addStmtToIRSB(bb, IRStmt_WrTmp(t1, IRExpr_CCall(ex->Iex.CCall.cee, ex->Iex.CCall.retty, newargs))); - return IRExpr_Tmp(t1); + return IRExpr_RdTmp(t1); case Iex_Mux0X: t1 = newIRTemp(bb->tyenv, ty); - addStmtToIRBB(bb, IRStmt_Tmp(t1, + addStmtToIRSB(bb, IRStmt_WrTmp(t1, IRExpr_Mux0X(flatten_Expr(bb, ex->Iex.Mux0X.cond), flatten_Expr(bb, ex->Iex.Mux0X.expr0), flatten_Expr(bb, ex->Iex.Mux0X.exprX)))); - return IRExpr_Tmp(t1); + return IRExpr_RdTmp(t1); case Iex_Const: /* Lift F64i constants out onto temps so they can be CSEd later. */ if (ex->Iex.Const.con->tag == Ico_F64i) { t1 = newIRTemp(bb->tyenv, ty); - addStmtToIRBB(bb, IRStmt_Tmp(t1, + addStmtToIRSB(bb, IRStmt_WrTmp(t1, IRExpr_Const(ex->Iex.Const.con))); - return IRExpr_Tmp(t1); + return IRExpr_RdTmp(t1); } else { /* Leave all other constants alone. */ return ex; } - case Iex_Tmp: + case Iex_RdTmp: return ex; default: @@ -385,7 +385,7 @@ static IRExpr* flatten_Expr ( IRBB* bb, IRExpr* ex ) /* Append a completely flattened form of 'st' to the end of 'bb'. */ -static void flatten_Stmt ( IRBB* bb, IRStmt* st ) +static void flatten_Stmt ( IRSB* bb, IRStmt* st ) { Int i; IRExpr *e1, *e2; @@ -395,42 +395,42 @@ static void flatten_Stmt ( IRBB* bb, IRStmt* st ) if (isIRAtom(st->Ist.Put.data)) { /* optimisation to reduce the amount of heap wasted by the flattener */ - addStmtToIRBB(bb, st); + addStmtToIRSB(bb, st); } else { /* general case, always correct */ e1 = flatten_Expr(bb, st->Ist.Put.data); - addStmtToIRBB(bb, IRStmt_Put(st->Ist.Put.offset, e1)); + addStmtToIRSB(bb, IRStmt_Put(st->Ist.Put.offset, e1)); } break; case Ist_PutI: e1 = flatten_Expr(bb, st->Ist.PutI.ix); e2 = flatten_Expr(bb, st->Ist.PutI.data); - addStmtToIRBB(bb, IRStmt_PutI(st->Ist.PutI.descr, + addStmtToIRSB(bb, IRStmt_PutI(st->Ist.PutI.descr, e1, st->Ist.PutI.bias, e2)); break; - case Ist_Tmp: - if (isFlat(st->Ist.Tmp.data)) { + case Ist_WrTmp: + if (isFlat(st->Ist.WrTmp.data)) { /* optimisation, to reduce the number of tmp-tmp copies generated */ - addStmtToIRBB(bb, st); + addStmtToIRSB(bb, st); } else { /* general case, always correct */ - e1 = flatten_Expr(bb, st->Ist.Tmp.data); - addStmtToIRBB(bb, IRStmt_Tmp(st->Ist.Tmp.tmp, e1)); + e1 = flatten_Expr(bb, st->Ist.WrTmp.data); + addStmtToIRSB(bb, IRStmt_WrTmp(st->Ist.WrTmp.tmp, e1)); } break; case Ist_Store: e1 = flatten_Expr(bb, st->Ist.Store.addr); e2 = flatten_Expr(bb, st->Ist.Store.data); - addStmtToIRBB(bb, IRStmt_Store(st->Ist.Store.end, e1,e2)); + addStmtToIRSB(bb, IRStmt_Store(st->Ist.Store.end, e1,e2)); break; case Ist_Dirty: d = st->Ist.Dirty.details; d2 = emptyIRDirty(); *d2 = *d; - d2->args = sopyIRExprVec(d2->args); + d2->args = shallowCopyIRExprVec(d2->args); if (d2->mFx != Ifx_None) { d2->mAddr = flatten_Expr(bb, d2->mAddr); } else { @@ -439,20 +439,20 @@ static void flatten_Stmt ( IRBB* bb, IRStmt* st ) d2->guard = flatten_Expr(bb, d2->guard); for (i = 0; d2->args[i]; i++) d2->args[i] = flatten_Expr(bb, d2->args[i]); - addStmtToIRBB(bb, IRStmt_Dirty(d2)); + addStmtToIRSB(bb, IRStmt_Dirty(d2)); break; case Ist_NoOp: case Ist_MFence: case Ist_IMark: - addStmtToIRBB(bb, st); + addStmtToIRSB(bb, st); break; case Ist_AbiHint: e1 = flatten_Expr(bb, st->Ist.AbiHint.base); - addStmtToIRBB(bb, IRStmt_AbiHint(e1, st->Ist.AbiHint.len)); + addStmtToIRSB(bb, IRStmt_AbiHint(e1, st->Ist.AbiHint.len)); break; case Ist_Exit: e1 = flatten_Expr(bb, st->Ist.Exit.guard); - addStmtToIRBB(bb, IRStmt_Exit(e1, st->Ist.Exit.jk, + addStmtToIRSB(bb, IRStmt_Exit(e1, st->Ist.Exit.jk, st->Ist.Exit.dst)); break; default: @@ -464,12 +464,12 @@ static void flatten_Stmt ( IRBB* bb, IRStmt* st ) } -static IRBB* flatten_BB ( IRBB* in ) +static IRSB* flatten_BB ( IRSB* in ) { Int i; - IRBB* out; - out = emptyIRBB(); - out->tyenv = dopyIRTypeEnv( in->tyenv ); + IRSB* out; + out = emptyIRSB(); + out->tyenv = deepCopyIRTypeEnv( in->tyenv ); for (i = 0; i < in->stmts_used; i++) if (in->stmts[i]) flatten_Stmt( out, in->stmts[i] ); @@ -497,7 +497,8 @@ static IRBB* flatten_BB ( IRBB* in ) /* Extract the min/max offsets from a guest state array descriptor. */ inline -static void getArrayBounds ( IRArray* descr, UInt* minoff, UInt* maxoff ) +static void getArrayBounds ( IRRegArray* descr, + UInt* minoff, UInt* maxoff ) { *minoff = descr->base; *maxoff = *minoff + descr->nElems*sizeofIRType(descr->elemTy) - 1; @@ -518,7 +519,7 @@ static UInt mk_key_GetPut ( Int offset, IRType ty ) return (minoff << 16) | maxoff; } -static UInt mk_key_GetIPutI ( IRArray* descr ) +static UInt mk_key_GetIPutI ( IRRegArray* descr ) { UInt minoff, maxoff; getArrayBounds( descr, &minoff, &maxoff ); @@ -555,7 +556,7 @@ static void invalidateOverlaps ( HashHW* h, UInt k_lo, UInt k_hi ) } -static void redundant_get_removal_BB ( IRBB* bb ) +static void redundant_get_removal_BB ( IRSB* bb ) { HashHW* env = newHHW(); UInt key = 0; /* keep gcc -O happy */ @@ -569,11 +570,11 @@ static void redundant_get_removal_BB ( IRBB* bb ) continue; /* Deal with Gets */ - if (st->tag == Ist_Tmp - && st->Ist.Tmp.data->tag == Iex_Get) { + if (st->tag == Ist_WrTmp + && st->Ist.WrTmp.data->tag == Iex_Get) { /* st is 't = Get(...)'. Look up in the environment and see if the Get can be replaced. */ - IRExpr* get = st->Ist.Tmp.data; + IRExpr* get = st->Ist.WrTmp.data; key = (HWord)mk_key_GetPut( get->Iex.Get.offset, get->Iex.Get.ty ); if (lookupHHW(env, &val, (HWord)key)) { @@ -585,20 +586,20 @@ static void redundant_get_removal_BB ( IRBB* bb ) would make maintaining flatness more difficult. */ IRExpr* valE = (IRExpr*)val; Bool typesOK = toBool( typeOfIRExpr(bb->tyenv,valE) - == st->Ist.Tmp.data->Iex.Get.ty ); + == st->Ist.WrTmp.data->Iex.Get.ty ); if (typesOK && DEBUG_IROPT) { vex_printf("rGET: "); ppIRExpr(get); vex_printf(" -> "); ppIRExpr(valE); vex_printf("\n"); } if (typesOK) - bb->stmts[i] = IRStmt_Tmp(st->Ist.Tmp.tmp, valE); + bb->stmts[i] = IRStmt_WrTmp(st->Ist.WrTmp.tmp, valE); } else { /* Not found, but at least we know that t and the Get(...) are now associated. So add a binding to reflect that fact. */ addToHHW( env, (HWord)key, - (HWord)(void*)(IRExpr_Tmp(st->Ist.Tmp.tmp)) ); + (HWord)(void*)(IRExpr_RdTmp(st->Ist.WrTmp.tmp)) ); } } @@ -655,7 +656,7 @@ static void redundant_get_removal_BB ( IRBB* bb ) /* Find any Get uses in st and invalidate any partially or fully overlapping ranges listed in env. Due to the flattening phase, the - only stmt kind we expect to find a Get on is IRStmt_Tmp. */ + only stmt kind we expect to find a Get on is IRStmt_WrTmp. */ static void handle_gets_Stmt ( HashHW* env, @@ -673,8 +674,8 @@ static void handle_gets_Stmt ( /* This is the only interesting case. Deal with Gets in the RHS expression. */ - case Ist_Tmp: - e = st->Ist.Tmp.data; + case Ist_WrTmp: + e = st->Ist.WrTmp.data; switch (e->tag) { case Iex_Get: isGet = True; @@ -786,7 +787,7 @@ static void handle_gets_Stmt ( */ static void redundant_put_removal_BB ( - IRBB* bb, + IRSB* bb, Bool (*preciseMemExnsFn)(Int,Int) ) { @@ -873,9 +874,9 @@ static void redundant_put_removal_BB ( /* Are both expressions simply the same IRTemp ? */ static Bool sameIRTemps ( IRExpr* e1, IRExpr* e2 ) { - return toBool( e1->tag == Iex_Tmp - && e2->tag == Iex_Tmp - && e1->Iex.Tmp.tmp == e2->Iex.Tmp.tmp ); + return toBool( e1->tag == Iex_RdTmp + && e2->tag == Iex_RdTmp + && e1->Iex.RdTmp.tmp == e2->Iex.RdTmp.tmp ); } static Bool notBool ( Bool b ) @@ -1410,10 +1411,10 @@ static IRExpr* fold_Expr ( IRExpr* e ) simplest just to get rid of the problem by rewriting it out, since the opportunity to do so exists. */ if (e->Iex.Binop.op == Iop_Add32 - && e->Iex.Binop.arg1->tag == Iex_Tmp - && e->Iex.Binop.arg2->tag == Iex_Tmp - && e->Iex.Binop.arg1->Iex.Tmp.tmp - == e->Iex.Binop.arg2->Iex.Tmp.tmp) { + && e->Iex.Binop.arg1->tag == Iex_RdTmp + && e->Iex.Binop.arg2->tag == Iex_RdTmp + && e->Iex.Binop.arg1->Iex.RdTmp.tmp + == e->Iex.Binop.arg2->Iex.RdTmp.tmp) { e2 = IRExpr_Binop(Iop_Shl32, e->Iex.Binop.arg1, IRExpr_Const(IRConst_U8(1))); @@ -1421,10 +1422,10 @@ static IRExpr* fold_Expr ( IRExpr* e ) /* Add64(t,t) ==> t << 1; rationale as for Add32(t,t) above. */ if (e->Iex.Binop.op == Iop_Add64 - && e->Iex.Binop.arg1->tag == Iex_Tmp - && e->Iex.Binop.arg2->tag == Iex_Tmp - && e->Iex.Binop.arg1->Iex.Tmp.tmp - == e->Iex.Binop.arg2->Iex.Tmp.tmp) { + && e->Iex.Binop.arg1->tag == Iex_RdTmp + && e->Iex.Binop.arg2->tag == Iex_RdTmp + && e->Iex.Binop.arg1->Iex.RdTmp.tmp + == e->Iex.Binop.arg2->Iex.RdTmp.tmp) { e2 = IRExpr_Binop(Iop_Shl64, e->Iex.Binop.arg1, IRExpr_Const(IRConst_U8(1))); @@ -1539,9 +1540,9 @@ static IRExpr* fold_Expr ( IRExpr* e ) static IRExpr* subst_Expr ( IRExpr** env, IRExpr* ex ) { switch (ex->tag) { - case Iex_Tmp: - if (env[(Int)ex->Iex.Tmp.tmp] != NULL) { - return env[(Int)ex->Iex.Tmp.tmp]; + case Iex_RdTmp: + if (env[(Int)ex->Iex.RdTmp.tmp] != NULL) { + return env[(Int)ex->Iex.RdTmp.tmp]; } else { /* not bound in env */ return ex; @@ -1609,7 +1610,7 @@ static IRExpr* subst_Expr ( IRExpr** env, IRExpr* ex ) case Iex_CCall: { Int i; - IRExpr** args2 = sopyIRExprVec(ex->Iex.CCall.args); + IRExpr** args2 = shallowCopyIRExprVec(ex->Iex.CCall.args); for (i = 0; args2[i]; i++) { vassert(isIRAtom(args2[i])); args2[i] = subst_Expr(env, args2[i]); @@ -1675,12 +1676,12 @@ static IRStmt* subst_and_fold_Stmt ( IRExpr** env, IRStmt* st ) fold_Expr(subst_Expr(env, st->Ist.PutI.data)) ); - case Ist_Tmp: - /* This is the one place where an expr (st->Ist.Tmp.data) is + case Ist_WrTmp: + /* This is the one place where an expr (st->Ist.WrTmp.data) is allowed to be more than just a constant or a tmp. */ - return IRStmt_Tmp( - st->Ist.Tmp.tmp, - fold_Expr(subst_Expr(env, st->Ist.Tmp.data)) + return IRStmt_WrTmp( + st->Ist.WrTmp.tmp, + fold_Expr(subst_Expr(env, st->Ist.WrTmp.data)) ); case Ist_Store: @@ -1698,7 +1699,7 @@ static IRStmt* subst_and_fold_Stmt ( IRExpr** env, IRStmt* st ) d = st->Ist.Dirty.details; d2 = emptyIRDirty(); *d2 = *d; - d2->args = sopyIRExprVec(d2->args); + d2->args = shallowCopyIRExprVec(d2->args); if (d2->mFx != Ifx_None) { vassert(isIRAtom(d2->mAddr)); d2->mAddr = fold_Expr(subst_Expr(env, d2->mAddr)); @@ -1756,16 +1757,16 @@ static IRStmt* subst_and_fold_Stmt ( IRExpr** env, IRStmt* st ) } -IRBB* cprop_BB ( IRBB* in ) +IRSB* cprop_BB ( IRSB* in ) { Int i; - IRBB* out; + IRSB* out; IRStmt* st2; Int n_tmps = in->tyenv->types_used; IRExpr** env = LibVEX_Alloc(n_tmps * sizeof(IRExpr*)); - out = emptyIRBB(); - out->tyenv = dopyIRTypeEnv( in->tyenv ); + out = emptyIRSB(); + out->tyenv = deepCopyIRTypeEnv( in->tyenv ); /* Set up the env with which travels forward. This holds a substitution, mapping IRTemps to atoms, that is, IRExprs which @@ -1801,22 +1802,22 @@ IRBB* cprop_BB ( IRBB* in ) F64i, so that F64i literals can be CSE'd later. This helps x86 floating point code generation. */ - if (st2->tag == Ist_Tmp - && st2->Ist.Tmp.data->tag == Iex_Const - && st2->Ist.Tmp.data->Iex.Const.con->tag != Ico_F64i) { + if (st2->tag == Ist_WrTmp + && st2->Ist.WrTmp.data->tag == Iex_Const + && st2->Ist.WrTmp.data->Iex.Const.con->tag != Ico_F64i) { /* 't = const' -- add to env. The pair (IRTemp, IRExpr*) is added. */ - env[(Int)(st2->Ist.Tmp.tmp)] = st2->Ist.Tmp.data; + env[(Int)(st2->Ist.WrTmp.tmp)] = st2->Ist.WrTmp.data; } else - if (st2->tag == Ist_Tmp && st2->Ist.Tmp.data->tag == Iex_Tmp) { + if (st2->tag == Ist_WrTmp && st2->Ist.WrTmp.data->tag == Iex_RdTmp) { /* 't1 = t2' -- add to env. The pair (IRTemp, IRExpr*) is added. */ - env[(Int)(st2->Ist.Tmp.tmp)] = st2->Ist.Tmp.data; + env[(Int)(st2->Ist.WrTmp.tmp)] = st2->Ist.WrTmp.data; } else { /* Not interesting, copy st2 into the output block. */ - addStmtToIRBB( out, st2 ); + addStmtToIRSB( out, st2 ); } } @@ -1880,8 +1881,8 @@ static void addUses_Expr ( Bool* set, IRExpr* e ) case Iex_Unop: addUses_Expr(set, e->Iex.Unop.arg); return; - case Iex_Tmp: - addUses_Temp(set, e->Iex.Tmp.tmp); + case Iex_RdTmp: + addUses_Temp(set, e->Iex.RdTmp.tmp); return; case Iex_Const: case Iex_Get: @@ -1905,8 +1906,8 @@ static void addUses_Stmt ( Bool* set, IRStmt* st ) addUses_Expr(set, st->Ist.PutI.ix); addUses_Expr(set, st->Ist.PutI.data); return; - case Ist_Tmp: - addUses_Expr(set, st->Ist.Tmp.data); + case Ist_WrTmp: + addUses_Expr(set, st->Ist.WrTmp.data); return; case Ist_Put: addUses_Expr(set, st->Ist.Put.data); @@ -1955,7 +1956,7 @@ static Bool isOneU1 ( IRExpr* e ) } -/* Note, this destructively modifies the given IRBB. */ +/* Note, this destructively modifies the given IRSB. */ /* Scan backwards through statements, carrying a set of IRTemps which are known to be used after the current point. On encountering 't = @@ -1969,7 +1970,7 @@ static Bool isOneU1 ( IRExpr* e ) all statements following it are turned into no-ops. */ -/* notstatic */ void do_deadcode_BB ( IRBB* bb ) +/* notstatic */ void do_deadcode_BB ( IRSB* bb ) { Int i, i_unconditional_exit; Int n_tmps = bb->tyenv->types_used; @@ -1994,8 +1995,8 @@ static Bool isOneU1 ( IRExpr* e ) if (st->tag == Ist_Exit && isOneU1(st->Ist.Exit.guard)) i_unconditional_exit = i; - if (st->tag == Ist_Tmp - && set[(Int)(st->Ist.Tmp.tmp)] == False) { + if (st->tag == Ist_WrTmp + && set[(Int)(st->Ist.WrTmp.tmp)] == False) { /* it's an IRTemp which never got used. Delete it. */ if (DEBUG_IROPT) { vex_printf("DEAD: "); @@ -2042,7 +2043,7 @@ static Bool isOneU1 ( IRExpr* e ) /*---------------------------------------------------------------*/ static -IRBB* spec_helpers_BB ( IRBB* bb, +IRSB* spec_helpers_BB ( IRSB* bb, IRExpr* (*specHelper) ( HChar*, IRExpr**) ) { Int i; @@ -2053,12 +2054,12 @@ IRBB* spec_helpers_BB ( IRBB* bb, for (i = bb->stmts_used-1; i >= 0; i--) { st = bb->stmts[i]; - if (st->tag != Ist_Tmp - || st->Ist.Tmp.data->tag != Iex_CCall) + if (st->tag != Ist_WrTmp + || st->Ist.WrTmp.data->tag != Iex_CCall) continue; - ex = (*specHelper)( st->Ist.Tmp.data->Iex.CCall.cee->name, - st->Ist.Tmp.data->Iex.CCall.args ); + ex = (*specHelper)( st->Ist.WrTmp.data->Iex.CCall.cee->name, + st->Ist.WrTmp.data->Iex.CCall.args ); if (!ex) /* the front end can't think of a suitable replacement */ continue; @@ -2066,11 +2067,11 @@ IRBB* spec_helpers_BB ( IRBB* bb, /* We got something better. Install it in the bb. */ any = True; bb->stmts[i] - = IRStmt_Tmp(st->Ist.Tmp.tmp, ex); + = IRStmt_WrTmp(st->Ist.WrTmp.tmp, ex); if (0) { vex_printf("SPEC: "); - ppIRExpr(st->Ist.Tmp.data); + ppIRExpr(st->Ist.WrTmp.data); vex_printf(" --> "); ppIRExpr(ex); vex_printf("\n"); @@ -2111,7 +2112,7 @@ typedef state access and a non-indexed access. */ static -GSAliasing getAliasingRelation_IC ( IRArray* descr1, IRExpr* ix1, +GSAliasing getAliasingRelation_IC ( IRRegArray* descr1, IRExpr* ix1, Int offset2, IRType ty2 ) { UInt minoff1, maxoff1, minoff2, maxoff2; @@ -2134,8 +2135,8 @@ GSAliasing getAliasingRelation_IC ( IRArray* descr1, IRExpr* ix1, static GSAliasing getAliasingRelation_II ( - IRArray* descr1, IRExpr* ix1, Int bias1, - IRArray* descr2, IRExpr* ix2, Int bias2 + IRRegArray* descr1, IRExpr* ix1, Int bias1, + IRRegArray* descr2, IRExpr* ix2, Int bias2 ) { UInt minoff1, maxoff1, minoff2, maxoff2; @@ -2150,7 +2151,7 @@ GSAliasing getAliasingRelation_II ( /* So the two arrays at least partially overlap. To get any further we'll have to be sure that the descriptors are identical. */ - if (!eqIRArray(descr1, descr2)) + if (!eqIRRegArray(descr1, descr2)) return UnknownAlias; /* The descriptors are identical. Now the only difference can be @@ -2246,9 +2247,9 @@ typedef } Mttt; /* GetI(descr,tmp,bias)*/ struct { - IRArray* descr; - IRTemp ix; - Int bias; + IRRegArray* descr; + IRTemp ix; + Int bias; } GetIt; } u; } @@ -2285,7 +2286,7 @@ static Bool eq_AvailExpr ( AvailExpr* a1, AvailExpr* a2 ) && a1->u.Mttt.e0 == a2->u.Mttt.e0 && a1->u.Mttt.eX == a2->u.Mttt.eX); case GetIt: - return toBool(eqIRArray(a1->u.GetIt.descr, a2->u.GetIt.descr) + return toBool(eqIRRegArray(a1->u.GetIt.descr, a2->u.GetIt.descr) && a1->u.GetIt.ix == a2->u.GetIt.ix && a1->u.GetIt.bias == a2->u.GetIt.bias); default: vpanic("eq_AvailExpr"); @@ -2297,30 +2298,32 @@ static IRExpr* availExpr_to_IRExpr ( AvailExpr* ae ) IRConst* con; switch (ae->tag) { case Ut: - return IRExpr_Unop( ae->u.Ut.op, IRExpr_Tmp(ae->u.Ut.arg) ); + return IRExpr_Unop( ae->u.Ut.op, IRExpr_RdTmp(ae->u.Ut.arg) ); case Btt: return IRExpr_Binop( ae->u.Btt.op, - IRExpr_Tmp(ae->u.Btt.arg1), - IRExpr_Tmp(ae->u.Btt.arg2) ); + IRExpr_RdTmp(ae->u.Btt.arg1), + IRExpr_RdTmp(ae->u.Btt.arg2) ); case Btc: con = LibVEX_Alloc(sizeof(IRConst)); *con = ae->u.Btc.con2; return IRExpr_Binop( ae->u.Btc.op, - IRExpr_Tmp(ae->u.Btc.arg1), IRExpr_Const(con) ); + IRExpr_RdTmp(ae->u.Btc.arg1), + IRExpr_Const(con) ); case Bct: con = LibVEX_Alloc(sizeof(IRConst)); *con = ae->u.Bct.con1; return IRExpr_Binop( ae->u.Bct.op, - IRExpr_Const(con), IRExpr_Tmp(ae->u.Bct.arg2) ); + IRExpr_Const(con), + IRExpr_RdTmp(ae->u.Bct.arg2) ); case Cf64i: return IRExpr_Const(IRConst_F64i(ae->u.Cf64i.f64i)); case Mttt: - return IRExpr_Mux0X(IRExpr_Tmp(ae->u.Mttt.co), - IRExpr_Tmp(ae->u.Mttt.e0), - IRExpr_Tmp(ae->u.Mttt.eX)); + return IRExpr_Mux0X(IRExpr_RdTmp(ae->u.Mttt.co), + IRExpr_RdTmp(ae->u.Mttt.e0), + IRExpr_RdTmp(ae->u.Mttt.eX)); case GetIt: return IRExpr_GetI(ae->u.GetIt.descr, - IRExpr_Tmp(ae->u.GetIt.ix), + IRExpr_RdTmp(ae->u.GetIt.ix), ae->u.GetIt.bias); default: vpanic("availExpr_to_IRExpr"); @@ -2375,43 +2378,43 @@ static AvailExpr* irExpr_to_AvailExpr ( IRExpr* e ) AvailExpr* ae; if (e->tag == Iex_Unop - && e->Iex.Unop.arg->tag == Iex_Tmp) { + && e->Iex.Unop.arg->tag == Iex_RdTmp) { ae = LibVEX_Alloc(sizeof(AvailExpr)); ae->tag = Ut; ae->u.Ut.op = e->Iex.Unop.op; - ae->u.Ut.arg = e->Iex.Unop.arg->Iex.Tmp.tmp; + ae->u.Ut.arg = e->Iex.Unop.arg->Iex.RdTmp.tmp; return ae; } if (e->tag == Iex_Binop - && e->Iex.Binop.arg1->tag == Iex_Tmp - && e->Iex.Binop.arg2->tag == Iex_Tmp) { + && e->Iex.Binop.arg1->tag == Iex_RdTmp + && e->Iex.Binop.arg2->tag == Iex_RdTmp) { ae = LibVEX_Alloc(sizeof(AvailExpr)); ae->tag = Btt; ae->u.Btt.op = e->Iex.Binop.op; - ae->u.Btt.arg1 = e->Iex.Binop.arg1->Iex.Tmp.tmp; - ae->u.Btt.arg2 = e->Iex.Binop.arg2->Iex.Tmp.tmp; + ae->u.Btt.arg1 = e->Iex.Binop.arg1->Iex.RdTmp.tmp; + ae->u.Btt.arg2 = e->Iex.Binop.arg2->Iex.RdTmp.tmp; return ae; } if (e->tag == Iex_Binop - && e->Iex.Binop.arg1->tag == Iex_Tmp + && e->Iex.Binop.arg1->tag == Iex_RdTmp && e->Iex.Binop.arg2->tag == Iex_Const) { ae = LibVEX_Alloc(sizeof(AvailExpr)); ae->tag = Btc; ae->u.Btc.op = e->Iex.Binop.op; - ae->u.Btc.arg1 = e->Iex.Binop.arg1->Iex.Tmp.tmp; + ae->u.Btc.arg1 = e->Iex.Binop.arg1->Iex.RdTmp.tmp; ae->u.Btc.con2 = *(e->Iex.Binop.arg2->Iex.Const.con); return ae; } if (e->tag == Iex_Binop && e->Iex.Binop.arg1->tag == Iex_Const - && e->Iex.Binop.arg2->tag == Iex_Tmp) { + && e->Iex.Binop.arg2->tag == Iex_RdTmp) { ae = LibVEX_Alloc(sizeof(AvailExpr)); ae->tag = Bct; ae->u.Bct.op = e->Iex.Binop.op; - ae->u.Bct.arg2 = e->Iex.Binop.arg2->Iex.Tmp.tmp; + ae->u.Bct.arg2 = e->Iex.Binop.arg2->Iex.RdTmp.tmp; ae->u.Bct.con1 = *(e->Iex.Binop.arg1->Iex.Const.con); return ae; } @@ -2425,23 +2428,23 @@ static AvailExpr* irExpr_to_AvailExpr ( IRExpr* e ) } if (e->tag == Iex_Mux0X - && e->Iex.Mux0X.cond->tag == Iex_Tmp - && e->Iex.Mux0X.expr0->tag == Iex_Tmp - && e->Iex.Mux0X.exprX->tag == Iex_Tmp) { + && e->Iex.Mux0X.cond->tag == Iex_RdTmp + && e->Iex.Mux0X.expr0->tag == Iex_RdTmp + && e->Iex.Mux0X.exprX->tag == Iex_RdTmp) { ae = LibVEX_Alloc(sizeof(AvailExpr)); ae->tag = Mttt; - ae->u.Mttt.co = e->Iex.Mux0X.cond->Iex.Tmp.tmp; - ae->u.Mttt.e0 = e->Iex.Mux0X.expr0->Iex.Tmp.tmp; - ae->u.Mttt.eX = e->Iex.Mux0X.exprX->Iex.Tmp.tmp; + ae->u.Mttt.co = e->Iex.Mux0X.cond->Iex.RdTmp.tmp; + ae->u.Mttt.e0 = e->Iex.Mux0X.expr0->Iex.RdTmp.tmp; + ae->u.Mttt.eX = e->Iex.Mux0X.exprX->Iex.RdTmp.tmp; return ae; } if (e->tag == Iex_GetI - && e->Iex.GetI.ix->tag == Iex_Tmp) { + && e->Iex.GetI.ix->tag == Iex_RdTmp) { ae = LibVEX_Alloc(sizeof(AvailExpr)); ae->tag = GetIt; ae->u.GetIt.descr = e->Iex.GetI.descr; - ae->u.GetIt.ix = e->Iex.GetI.ix->Iex.Tmp.tmp; + ae->u.GetIt.ix = e->Iex.GetI.ix->Iex.RdTmp.tmp; ae->u.GetIt.bias = e->Iex.GetI.bias; return ae; } @@ -2453,7 +2456,7 @@ static AvailExpr* irExpr_to_AvailExpr ( IRExpr* e ) /* The BB is modified in-place. Returns True if any changes were made. */ -static Bool do_cse_BB ( IRBB* bb ) +static Bool do_cse_BB ( IRSB* bb ) { Int i, j, paranoia; IRTemp t, q; @@ -2468,7 +2471,7 @@ static Bool do_cse_BB ( IRBB* bb ) vassert(sizeof(IRTemp) <= sizeof(HWord)); - if (0) { ppIRBB(bb); vex_printf("\n\n"); } + if (0) { ppIRSB(bb); vex_printf("\n\n"); } /* Iterate forwards over the stmts. On seeing "t = E", where E is one of the 5 AvailExpr forms: @@ -2504,7 +2507,7 @@ static Bool do_cse_BB ( IRBB* bb ) case Ist_Put: case Ist_PutI: paranoia = 1; break; case Ist_NoOp: case Ist_IMark: case Ist_AbiHint: - case Ist_Tmp: case Ist_MFence: case Ist_Exit: + case Ist_WrTmp: case Ist_MFence: case Ist_Exit: paranoia = 0; break; default: vpanic("do_cse_BB(1)"); @@ -2525,7 +2528,7 @@ static Bool do_cse_BB ( IRBB* bb ) if (st->tag == Ist_Put) { if (getAliasingRelation_IC( ae->u.GetIt.descr, - IRExpr_Tmp(ae->u.GetIt.ix), + IRExpr_RdTmp(ae->u.GetIt.ix), st->Ist.Put.offset, typeOfIRExpr(bb->tyenv,st->Ist.Put.data) ) != NoAlias) @@ -2535,7 +2538,7 @@ static Bool do_cse_BB ( IRBB* bb ) if (st->tag == Ist_PutI) { if (getAliasingRelation_II( ae->u.GetIt.descr, - IRExpr_Tmp(ae->u.GetIt.ix), + IRExpr_RdTmp(ae->u.GetIt.ix), ae->u.GetIt.bias, st->Ist.PutI.descr, st->Ist.PutI.ix, @@ -2557,11 +2560,11 @@ static Bool do_cse_BB ( IRBB* bb ) /* ------ ENV invalidate aenv bindings ------ */ /* ignore not-interestings */ - if (st->tag != Ist_Tmp) + if (st->tag != Ist_WrTmp) continue; - t = st->Ist.Tmp.tmp; - eprime = irExpr_to_AvailExpr(st->Ist.Tmp.data); + t = st->Ist.WrTmp.tmp; + eprime = irExpr_to_AvailExpr(st->Ist.WrTmp.data); /* ignore if not of AvailExpr form */ if (!eprime) continue; @@ -2581,21 +2584,21 @@ static Bool do_cse_BB ( IRBB* bb ) note the t->q binding in tenv. */ /* (this is the core of the CSE action) */ q = (IRTemp)aenv->val[j]; - bb->stmts[i] = IRStmt_Tmp( t, IRExpr_Tmp(q) ); + bb->stmts[i] = IRStmt_WrTmp( t, IRExpr_RdTmp(q) ); addToHHW( tenv, (HWord)t, (HWord)q ); anyDone = True; } else { /* No binding was found, so instead we add E' -> t to our collection of available expressions, replace this stmt with "t = E'", and move on. */ - bb->stmts[i] = IRStmt_Tmp( t, availExpr_to_IRExpr(eprime) ); + bb->stmts[i] = IRStmt_WrTmp( t, availExpr_to_IRExpr(eprime) ); addToHHW( aenv, (HWord)eprime, (HWord)t ); } } /* - ppIRBB(bb); - sanityCheckIRBB(bb, Ity_I32); + ppIRSB(bb); + sanityCheckIRSB(bb, Ity_I32); vex_printf("\n\n"); */ return anyDone; @@ -2618,11 +2621,11 @@ static Bool isAdd32OrSub32 ( IRExpr* e, IRTemp* tmp, Int* i32 ) return False; if (e->Iex.Binop.op != Iop_Add32 && e->Iex.Binop.op != Iop_Sub32) return False; - if (e->Iex.Binop.arg1->tag != Iex_Tmp) + if (e->Iex.Binop.arg1->tag != Iex_RdTmp) return False; if (e->Iex.Binop.arg2->tag != Iex_Const) return False; - *tmp = e->Iex.Binop.arg1->Iex.Tmp.tmp; + *tmp = e->Iex.Binop.arg1->Iex.RdTmp.tmp; *i32 = (Int)(e->Iex.Binop.arg2->Iex.Const.con->Ico.U32); if (e->Iex.Binop.op == Iop_Sub32) *i32 = -*i32; @@ -2634,7 +2637,7 @@ static Bool isAdd32OrSub32 ( IRExpr* e, IRTemp* tmp, Int* i32 ) other tmp2. Scan backwards from the specified start point -- an optimisation. */ -static Bool collapseChain ( IRBB* bb, Int startHere, +static Bool collapseChain ( IRSB* bb, Int startHere, IRTemp tmp, IRTemp* tmp2, Int* i32 ) { @@ -2652,11 +2655,11 @@ static Bool collapseChain ( IRBB* bb, Int startHere, +/- a constant. */ for (j = startHere; j >= 0; j--) { st = bb->stmts[j]; - if (st->tag != Ist_Tmp) + if (st->tag != Ist_WrTmp) continue; - if (st->Ist.Tmp.tmp != var) + if (st->Ist.WrTmp.tmp != var) continue; - e = st->Ist.Tmp.data; + e = st->Ist.WrTmp.data; if (!isAdd32OrSub32(e, &vv, &ii)) break; var = vv; @@ -2678,7 +2681,7 @@ static Bool collapseChain ( IRBB* bb, Int startHere, /* ------- Main function for Add32/Sub32 chain collapsing ------ */ -static void collapse_AddSub_chains_BB ( IRBB* bb ) +static void collapse_AddSub_chains_BB ( IRSB* bb ) { IRStmt *st; IRTemp var, var2; @@ -2691,8 +2694,8 @@ static void collapse_AddSub_chains_BB ( IRBB* bb ) /* Try to collapse 't1 = Add32/Sub32(t2, con)'. */ - if (st->tag == Ist_Tmp - && isAdd32OrSub32(st->Ist.Tmp.data, &var, &con)) { + if (st->tag == Ist_WrTmp + && isAdd32OrSub32(st->Ist.WrTmp.data, &var, &con)) { /* So e1 is of the form Add32(var,con) or Sub32(var,-con). Find out if var can be expressed as var2 + con2. */ @@ -2704,14 +2707,14 @@ static void collapse_AddSub_chains_BB ( IRBB* bb ) } con2 += con; bb->stmts[i] - = IRStmt_Tmp( - st->Ist.Tmp.tmp, + = IRStmt_WrTmp( + st->Ist.WrTmp.tmp, (con2 >= 0) ? IRExpr_Binop(Iop_Add32, - IRExpr_Tmp(var2), + IRExpr_RdTmp(var2), IRExpr_Const(IRConst_U32(con2))) : IRExpr_Binop(Iop_Sub32, - IRExpr_Tmp(var2), + IRExpr_RdTmp(var2), IRExpr_Const(IRConst_U32(-con2))) ); if (DEBUG_IROPT) { @@ -2725,22 +2728,22 @@ static void collapse_AddSub_chains_BB ( IRBB* bb ) /* Try to collapse 't1 = GetI[t2, con]'. */ - if (st->tag == Ist_Tmp - && st->Ist.Tmp.data->tag == Iex_GetI - && st->Ist.Tmp.data->Iex.GetI.ix->tag == Iex_Tmp - && collapseChain(bb, i-1, st->Ist.Tmp.data->Iex.GetI.ix - ->Iex.Tmp.tmp, &var2, &con2)) { + if (st->tag == Ist_WrTmp + && st->Ist.WrTmp.data->tag == Iex_GetI + && st->Ist.WrTmp.data->Iex.GetI.ix->tag == Iex_RdTmp + && collapseChain(bb, i-1, st->Ist.WrTmp.data->Iex.GetI.ix + ->Iex.RdTmp.tmp, &var2, &con2)) { if (DEBUG_IROPT) { vex_printf("replacing3 "); ppIRStmt(st); vex_printf(" with "); } - con2 += st->Ist.Tmp.data->Iex.GetI.bias; + con2 += st->Ist.WrTmp.data->Iex.GetI.bias; bb->stmts[i] - = IRStmt_Tmp( - st->Ist.Tmp.tmp, - IRExpr_GetI(st->Ist.Tmp.data->Iex.GetI.descr, - IRExpr_Tmp(var2), + = IRStmt_WrTmp( + st->Ist.WrTmp.tmp, + IRExpr_GetI(st->Ist.WrTmp.data->Iex.GetI.descr, + IRExpr_RdTmp(var2), con2)); if (DEBUG_IROPT) { ppIRStmt(bb->stmts[i]); @@ -2752,8 +2755,8 @@ static void collapse_AddSub_chains_BB ( IRBB* bb ) /* Perhaps st is PutI[t, con] ? */ if (st->tag == Ist_PutI - && st->Ist.PutI.ix->tag == Iex_Tmp - && collapseChain(bb, i-1, st->Ist.PutI.ix->Iex.Tmp.tmp, + && st->Ist.PutI.ix->tag == Iex_RdTmp + && collapseChain(bb, i-1, st->Ist.PutI.ix->Iex.RdTmp.tmp, &var2, &con2)) { if (DEBUG_IROPT) { vex_printf("replacing2 "); @@ -2763,7 +2766,7 @@ static void collapse_AddSub_chains_BB ( IRBB* bb ) con2 += st->Ist.PutI.bias; bb->stmts[i] = IRStmt_PutI(st->Ist.PutI.descr, - IRExpr_Tmp(var2), + IRExpr_RdTmp(var2), con2, st->Ist.PutI.data); if (DEBUG_IROPT) { @@ -2787,8 +2790,8 @@ static void collapse_AddSub_chains_BB ( IRBB* bb ) that the PutI writes. This is the core of PutI-GetI forwarding. */ static -IRExpr* findPutI ( IRBB* bb, Int startHere, - IRArray* descrG, IRExpr* ixG, Int biasG ) +IRExpr* findPutI ( IRSB* bb, Int startHere, + IRRegArray* descrG, IRExpr* ixG, Int biasG ) { Int j; IRStmt* st; @@ -2796,7 +2799,7 @@ IRExpr* findPutI ( IRBB* bb, Int startHere, if (0) { vex_printf("\nfindPutI "); - ppIRArray(descrG); + ppIRRegArray(descrG); vex_printf(" "); ppIRExpr(ixG); vex_printf(" %d\n", biasG); @@ -2951,24 +2954,24 @@ Bool guestAccessWhichMightOverlapPutI ( ); goto have_relation; - case Ist_Tmp: - if (s2->Ist.Tmp.data->tag == Iex_GetI) { + case Ist_WrTmp: + if (s2->Ist.WrTmp.data->tag == Iex_GetI) { relation = getAliasingRelation_II( pi->Ist.PutI.descr, pi->Ist.PutI.ix, pi->Ist.PutI.bias, - s2->Ist.Tmp.data->Iex.GetI.descr, - s2->Ist.Tmp.data->Iex.GetI.ix, - s2->Ist.Tmp.data->Iex.GetI.bias + s2->Ist.WrTmp.data->Iex.GetI.descr, + s2->Ist.WrTmp.data->Iex.GetI.ix, + s2->Ist.WrTmp.data->Iex.GetI.bias ); goto have_relation; } - if (s2->Ist.Tmp.data->tag == Iex_Get) { + if (s2->Ist.WrTmp.data->tag == Iex_Get) { relation = getAliasingRelation_IC( pi->Ist.PutI.descr, pi->Ist.PutI.ix, - s2->Ist.Tmp.data->Iex.Get.offset, - s2->Ist.Tmp.data->Iex.Get.ty + s2->Ist.WrTmp.data->Iex.Get.offset, + s2->Ist.WrTmp.data->Iex.Get.ty ); goto have_relation; } @@ -2999,7 +3002,7 @@ Bool guestAccessWhichMightOverlapPutI ( bb is modified in-place. */ static -void do_redundant_GetI_elimination ( IRBB* bb ) +void do_redundant_GetI_elimination ( IRSB* bb ) { Int i; IRStmt* st; @@ -3009,25 +3012,25 @@ void do_redundant_GetI_elimination ( IRBB* bb ) if (st->tag == Ist_NoOp) continue; - if (st->tag == Ist_Tmp - && st->Ist.Tmp.data->tag == Iex_GetI - && st->Ist.Tmp.data->Iex.GetI.ix->tag == Iex_Tmp) { - IRArray* descr = st->Ist.Tmp.data->Iex.GetI.descr; - IRExpr* ix = st->Ist.Tmp.data->Iex.GetI.ix; - Int bias = st->Ist.Tmp.data->Iex.GetI.bias; - IRExpr* replacement = findPutI(bb, i-1, descr, ix, bias); + if (st->tag == Ist_WrTmp + && st->Ist.WrTmp.data->tag == Iex_GetI + && st->Ist.WrTmp.data->Iex.GetI.ix->tag == Iex_RdTmp) { + IRRegArray* descr = st->Ist.WrTmp.data->Iex.GetI.descr; + IRExpr* ix = st->Ist.WrTmp.data->Iex.GetI.ix; + Int bias = st->Ist.WrTmp.data->Iex.GetI.bias; + IRExpr* replacement = findPutI(bb, i-1, descr, ix, bias); if (replacement && isIRAtom(replacement) /* Make sure we're doing a type-safe transformation! */ && typeOfIRExpr(bb->tyenv, replacement) == descr->elemTy) { if (DEBUG_IROPT) { vex_printf("rGI: "); - ppIRExpr(st->Ist.Tmp.data); + ppIRExpr(st->Ist.WrTmp.data); vex_printf(" -> "); ppIRExpr(replacement); vex_printf("\n"); } - bb->stmts[i] = IRStmt_Tmp(st->Ist.Tmp.tmp, replacement); + bb->stmts[i] = IRStmt_WrTmp(st->Ist.WrTmp.tmp, replacement); } } } @@ -3039,7 +3042,7 @@ void do_redundant_GetI_elimination ( IRBB* bb ) bb is modified in-place. */ static -void do_redundant_PutI_elimination ( IRBB* bb ) +void do_redundant_PutI_elimination ( IRSB* bb ) { Int i, j; Bool delete; @@ -3107,8 +3110,8 @@ static void deltaIRExpr ( IRExpr* e, Int delta ) { Int i; switch (e->tag) { - case Iex_Tmp: - e->Iex.Tmp.tmp += delta; + case Iex_RdTmp: + e->Iex.RdTmp.tmp += delta; break; case Iex_Get: case Iex_Const: @@ -3174,9 +3177,9 @@ static void deltaIRStmt ( IRStmt* st, Int delta ) deltaIRExpr(st->Ist.PutI.ix, delta); deltaIRExpr(st->Ist.PutI.data, delta); break; - case Ist_Tmp: - st->Ist.Tmp.tmp += delta; - deltaIRExpr(st->Ist.Tmp.data, delta); + case Ist_WrTmp: + st->Ist.WrTmp.tmp += delta; + deltaIRExpr(st->Ist.WrTmp.data, delta); break; case Ist_Exit: deltaIRExpr(st->Ist.Exit.guard, delta); @@ -3221,7 +3224,7 @@ static void deltaIRStmt ( IRStmt* st, Int delta ) X and Y must be literal (guest) addresses. */ -static Int calc_unroll_factor( IRBB* bb ) +static Int calc_unroll_factor( IRSB* bb ) { Int n_stmts, i; @@ -3258,7 +3261,7 @@ static Int calc_unroll_factor( IRBB* bb ) } -static IRBB* maybe_loop_unroll_BB ( IRBB* bb0, Addr64 my_addr ) +static IRSB* maybe_loop_unroll_BB ( IRSB* bb0, Addr64 my_addr ) { Int i, j, jmax, n_vars; Bool xxx_known; @@ -3266,7 +3269,7 @@ static IRBB* maybe_loop_unroll_BB ( IRBB* bb0, Addr64 my_addr ) IRExpr* udst; IRStmt* st; IRConst* con; - IRBB *bb1, *bb2; + IRSB *bb1, *bb2; Int unroll_factor; if (vex_control.iropt_unroll_thresh <= 0) @@ -3306,7 +3309,7 @@ static IRBB* maybe_loop_unroll_BB ( IRBB* bb0, Addr64 my_addr ) unroll_factor = calc_unroll_factor( bb0 ); if (unroll_factor < 2) return NULL; - bb1 = dopyIRBB( bb0 ); + bb1 = deepCopyIRSB( bb0 ); bb0 = NULL; udst = NULL; /* is now invalid */ goto do_unroll; @@ -3354,7 +3357,7 @@ static IRBB* maybe_loop_unroll_BB ( IRBB* bb0, Addr64 my_addr ) if (unroll_factor < 2) return NULL; - bb1 = dopyIRBB( bb0 ); + bb1 = deepCopyIRSB( bb0 ); bb0 = NULL; udst = NULL; /* is now invalid */ for (i = bb1->stmts_used-1; i >= 0; i--) @@ -3389,7 +3392,7 @@ static IRBB* maybe_loop_unroll_BB ( IRBB* bb0, Addr64 my_addr ) /* negate the test condition */ st->Ist.Exit.guard - = IRExpr_Unop(Iop_Not1,dopyIRExpr(st->Ist.Exit.guard)); + = IRExpr_Unop(Iop_Not1,deepCopyIRExpr(st->Ist.Exit.guard)); /* --- The unroller proper. Both idioms are by now --- */ /* --- now converted to idiom 1. --- */ @@ -3405,7 +3408,7 @@ static IRBB* maybe_loop_unroll_BB ( IRBB* bb0, Addr64 my_addr ) n_vars = bb1->tyenv->types_used; - bb2 = dopyIRBB(bb1); + bb2 = deepCopyIRSB(bb1); for (i = 0; i < n_vars; i++) (void)newIRTemp(bb1->tyenv, bb2->tyenv->types[i]); @@ -3413,13 +3416,13 @@ static IRBB* maybe_loop_unroll_BB ( IRBB* bb0, Addr64 my_addr ) /* deltaIRStmt destructively modifies the stmt, but that's OK since bb2 is a complete fresh copy of bb1. */ deltaIRStmt(bb2->stmts[i], n_vars); - addStmtToIRBB(bb1, bb2->stmts[i]); + addStmtToIRSB(bb1, bb2->stmts[i]); } } if (DEBUG_IROPT) { vex_printf("\nUNROLLED (%llx)\n", my_addr); - ppIRBB(bb1); + ppIRSB(bb1); vex_printf("\n"); } @@ -3521,7 +3524,7 @@ static void setHints_Expr (Bool* doesLoad, Bool* doesGet, IRExpr* e ) *doesGet = True; setHints_Expr(doesLoad, doesGet, e->Iex.GetI.ix); return; - case Iex_Tmp: + case Iex_RdTmp: case Iex_Const: return; default: @@ -3555,8 +3558,8 @@ static void aoccCount_Expr ( UShort* uses, IRExpr* e ) switch (e->tag) { - case Iex_Tmp: /* the only interesting case */ - uses[e->Iex.Tmp.tmp]++; + case Iex_RdTmp: /* the only interesting case */ + uses[e->Iex.RdTmp.tmp]++; return; case Iex_Mux0X: @@ -3623,8 +3626,8 @@ static void aoccCount_Stmt ( UShort* uses, IRStmt* st ) case Ist_AbiHint: aoccCount_Expr(uses, st->Ist.AbiHint.base); return; - case Ist_Tmp: - aoccCount_Expr(uses, st->Ist.Tmp.data); + case Ist_WrTmp: + aoccCount_Expr(uses, st->Ist.WrTmp.data); return; case Ist_Put: aoccCount_Expr(uses, st->Ist.Put.data); @@ -3690,7 +3693,7 @@ static IRExpr* atbSubst_Expr ( ATmpInfo* env, IRExpr* e ) switch (e->tag) { case Iex_CCall: - args2 = sopyIRExprVec(e->Iex.CCall.args); + args2 = shallowCopyIRExprVec(e->Iex.CCall.args); for (i = 0; args2[i]; i++) args2[i] = atbSubst_Expr(env,args2[i]); return IRExpr_CCall( @@ -3698,8 +3701,8 @@ static IRExpr* atbSubst_Expr ( ATmpInfo* env, IRExpr* e ) e->Iex.CCall.retty, args2 ); - case Iex_Tmp: - e2 = atbSubst_Temp(env, e->Iex.Tmp.tmp); + case Iex_RdTmp: + e2 = atbSubst_Temp(env, e->Iex.RdTmp.tmp); return e2 ? e2 : e; case Iex_Mux0X: return IRExpr_Mux0X( @@ -3773,10 +3776,10 @@ static IRStmt* atbSubst_Stmt ( ATmpInfo* env, IRStmt* st ) atbSubst_Expr(env, st->Ist.Store.addr), atbSubst_Expr(env, st->Ist.Store.data) ); - case Ist_Tmp: - return IRStmt_Tmp( - st->Ist.Tmp.tmp, - atbSubst_Expr(env, st->Ist.Tmp.data) + case Ist_WrTmp: + return IRStmt_WrTmp( + st->Ist.WrTmp.tmp, + atbSubst_Expr(env, st->Ist.WrTmp.data) ); case Ist_Put: return IRStmt_Put( @@ -3819,7 +3822,7 @@ static IRStmt* atbSubst_Stmt ( ATmpInfo* env, IRStmt* st ) } } -/* notstatic */ void ado_treebuild_BB ( IRBB* bb ) +/* notstatic */ void ado_treebuild_BB ( IRSB* bb ) { Int i, j, k, m; Bool stmtPuts, stmtStores, invalidateMe; @@ -3896,29 +3899,30 @@ static IRStmt* atbSubst_Stmt ( ATmpInfo* env, IRStmt* st ) /* Ensure there's at least one space in the env, by emitting the oldest binding if necessary. */ if (env[A_NENV-1].bindee != NULL) { - bb->stmts[j] = IRStmt_Tmp( env[A_NENV-1].binder, env[A_NENV-1].bindee ); + bb->stmts[j] = IRStmt_WrTmp( env[A_NENV-1].binder, + env[A_NENV-1].bindee ); j++; vassert(j <= i); env[A_NENV-1].bindee = NULL; } /* Consider current stmt. */ - if (st->tag == Ist_Tmp && uses[st->Ist.Tmp.tmp] <= 1) { + if (st->tag == Ist_WrTmp && uses[st->Ist.WrTmp.tmp] <= 1) { IRExpr *e, *e2; /* optional extra: dump dead bindings as we find them. Removes the need for a prior dead-code removal pass. */ - if (uses[st->Ist.Tmp.tmp] == 0) { + if (uses[st->Ist.WrTmp.tmp] == 0) { if (0) vex_printf("DEAD binding\n"); continue; /* for (i = 0; i < bb->stmts_used; i++) loop */ } - vassert(uses[st->Ist.Tmp.tmp] == 1); + vassert(uses[st->Ist.WrTmp.tmp] == 1); /* ok, we have 't = E', occ(t)==1. Do the abovementioned actions. */ - e = st->Ist.Tmp.data; + e = st->Ist.WrTmp.data; e2 = atbSubst_Expr(env, e); - addToEnvFront(env, st->Ist.Tmp.tmp, e2); + addToEnvFront(env, st->Ist.WrTmp.tmp, e2); setHints_Expr(&env[0].doesLoad, &env[0].doesGet, e2); /* don't advance j, as we are deleting this stmt and instead holding it temporarily in the env. */ @@ -3969,7 +3973,7 @@ static IRStmt* atbSubst_Stmt ( ATmpInfo* env, IRStmt* st ) || st->tag == Ist_AbiHint ); if (invalidateMe) { - bb->stmts[j] = IRStmt_Tmp( env[k].binder, env[k].bindee ); + bb->stmts[j] = IRStmt_WrTmp( env[k].binder, env[k].bindee ); j++; vassert(j <= i); env[k].bindee = NULL; @@ -4019,8 +4023,8 @@ static Bool iropt_verbose = False; /* True; */ static -IRBB* cheap_transformations ( - IRBB* bb, +IRSB* cheap_transformations ( + IRSB* bb, IRExpr* (*specHelper) (HChar*, IRExpr**), Bool (*preciseMemExnsFn)(Int,Int) ) @@ -4028,32 +4032,32 @@ IRBB* cheap_transformations ( redundant_get_removal_BB ( bb ); if (iropt_verbose) { vex_printf("\n========= REDUNDANT GET\n\n" ); - ppIRBB(bb); + ppIRSB(bb); } redundant_put_removal_BB ( bb, preciseMemExnsFn ); if (iropt_verbose) { vex_printf("\n========= REDUNDANT PUT\n\n" ); - ppIRBB(bb); + ppIRSB(bb); } bb = cprop_BB ( bb ); if (iropt_verbose) { vex_printf("\n========= CPROPD\n\n" ); - ppIRBB(bb); + ppIRSB(bb); } do_deadcode_BB ( bb ); if (iropt_verbose) { vex_printf("\n========= DEAD\n\n" ); - ppIRBB(bb); + ppIRSB(bb); } bb = spec_helpers_BB ( bb, specHelper ); do_deadcode_BB ( bb ); if (iropt_verbose) { vex_printf("\n========= SPECd \n\n" ); - ppIRBB(bb); + ppIRSB(bb); } return bb; @@ -4064,7 +4068,7 @@ IRBB* cheap_transformations ( optimising as much as possible in the presence of GetI and PutI. */ static -IRBB* expensive_transformations( IRBB* bb ) +IRSB* expensive_transformations( IRSB* bb ) { (void)do_cse_BB( bb ); collapse_AddSub_chains_BB( bb ); @@ -4083,7 +4087,7 @@ IRBB* expensive_transformations( IRBB* bb ) static void considerExpensives ( /*OUT*/Bool* hasGetIorPutI, /*OUT*/Bool* hasVorFtemps, - IRBB* bb ) + IRSB* bb ) { Int i, j; IRStmt* st; @@ -4101,10 +4105,10 @@ static void considerExpensives ( /*OUT*/Bool* hasGetIorPutI, case Ist_PutI: *hasGetIorPutI = True; break; - case Ist_Tmp: - if (st->Ist.Tmp.data->tag == Iex_GetI) + case Ist_WrTmp: + if (st->Ist.WrTmp.data->tag == Iex_GetI) *hasGetIorPutI = True; - switch (typeOfIRTemp(bb->tyenv, st->Ist.Tmp.tmp)) { + switch (typeOfIRTemp(bb->tyenv, st->Ist.WrTmp.tmp)) { case Ity_I1: case Ity_I8: case Ity_I16: case Ity_I32: case Ity_I64: case Ity_I128: break; @@ -4157,7 +4161,7 @@ static void considerExpensives ( /*OUT*/Bool* hasGetIorPutI, */ -IRBB* do_iropt_BB ( IRBB* bb0, +IRSB* do_iropt_BB ( IRSB* bb0, IRExpr* (*specHelper) (HChar*, IRExpr**), Bool (*preciseMemExnsFn)(Int,Int), Addr64 guest_addr ) @@ -4166,7 +4170,7 @@ IRBB* do_iropt_BB ( IRBB* bb0, static Int n_expensive = 0; Bool hasGetIorPutI, hasVorFtemps; - IRBB *bb, *bb2; + IRSB *bb, *bb2; n_total++; @@ -4177,7 +4181,7 @@ IRBB* do_iropt_BB ( IRBB* bb0, if (iropt_verbose) { vex_printf("\n========= FLAT\n\n" ); - ppIRBB(bb); + ppIRSB(bb); } /* If at level 0, stop now. */ diff --git a/VEX/priv/ir/iropt.h b/VEX/priv/ir/iropt.h index 25334f71b6..965401ed1a 100644 --- a/VEX/priv/ir/iropt.h +++ b/VEX/priv/ir/iropt.h @@ -54,23 +54,23 @@ /* Top level optimiser entry point. Returns a new BB. Operates under the control of the global "vex_control" struct. */ extern -IRBB* do_iropt_BB ( IRBB* bb, +IRSB* do_iropt_BB ( IRSB* bb, IRExpr* (*specHelper) (HChar*, IRExpr**), Bool (*preciseMemExnsFn)(Int,Int), Addr64 guest_addr ); /* Do a constant folding/propagation pass. */ extern -IRBB* cprop_BB ( IRBB* ); +IRSB* cprop_BB ( IRSB* ); /* Do a dead-code removal pass. bb is destructively modified. */ extern -void do_deadcode_BB ( IRBB* bb ); +void do_deadcode_BB ( IRSB* bb ); /* The tree-builder. Make (approximately) maximal safe trees. bb is destructively modified. */ extern -void ado_treebuild_BB ( IRBB* bb ); +void ado_treebuild_BB ( IRSB* bb ); #endif /* ndef __LIBVEX_IROPT_H */ diff --git a/VEX/priv/main/vex_main.c b/VEX/priv/main/vex_main.c index a590774abb..5203c9eb60 100644 --- a/VEX/priv/main/vex_main.c +++ b/VEX/priv/main/vex_main.c @@ -193,8 +193,8 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) HInstr* (*genReload) ( HReg, Int, Bool ); void (*ppInstr) ( HInstr*, Bool ); void (*ppReg) ( HReg ); - HInstrArray* (*iselBB) ( IRBB*, VexArch, VexArchInfo*, - VexMiscInfo* ); + HInstrArray* (*iselSB) ( IRSB*, VexArch, VexArchInfo*, + VexAbiInfo* ); Int (*emit) ( UChar*, Int, HInstr*, Bool, void* ); IRExpr* (*specHelper) ( HChar*, IRExpr** ); Bool (*preciseMemExnsFn) ( Int, Int ); @@ -203,7 +203,7 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) VexGuestLayout* guest_layout; Bool host_is_bigendian = False; - IRBB* irbb; + IRSB* irsb; HInstrArray* vcode; HInstrArray* rcode; Int i, j, k, out_used, guest_sizeB; @@ -223,7 +223,7 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) genReload = NULL; ppInstr = NULL; ppReg = NULL; - iselBB = NULL; + iselSB = NULL; emit = NULL; specHelper = NULL; preciseMemExnsFn = NULL; @@ -256,7 +256,7 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) genReload = (HInstr*(*)(HReg,Int, Bool)) genReload_X86; ppInstr = (void(*)(HInstr*, Bool)) ppX86Instr; ppReg = (void(*)(HReg)) ppHRegX86; - iselBB = iselBB_X86; + iselSB = iselSB_X86; emit = (Int(*)(UChar*,Int,HInstr*,Bool,void*)) emit_X86Instr; host_is_bigendian = False; host_word_type = Ity_I32; @@ -275,7 +275,7 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) genReload = (HInstr*(*)(HReg,Int, Bool)) genReload_AMD64; ppInstr = (void(*)(HInstr*, Bool)) ppAMD64Instr; ppReg = (void(*)(HReg)) ppHRegAMD64; - iselBB = iselBB_AMD64; + iselSB = iselSB_AMD64; emit = (Int(*)(UChar*,Int,HInstr*,Bool,void*)) emit_AMD64Instr; host_is_bigendian = False; host_word_type = Ity_I64; @@ -294,7 +294,7 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) genReload = (HInstr*(*)(HReg,Int,Bool)) genReload_PPC; ppInstr = (void(*)(HInstr*,Bool)) ppPPCInstr; ppReg = (void(*)(HReg)) ppHRegPPC; - iselBB = iselBB_PPC; + iselSB = iselSB_PPC; emit = (Int(*)(UChar*,Int,HInstr*,Bool,void*)) emit_PPCInstr; host_is_bigendian = True; host_word_type = Ity_I32; @@ -313,7 +313,7 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) genReload = (HInstr*(*)(HReg,Int, Bool)) genReload_PPC; ppInstr = (void(*)(HInstr*, Bool)) ppPPCInstr; ppReg = (void(*)(HReg)) ppHRegPPC; - iselBB = iselBB_PPC; + iselSB = iselSB_PPC; emit = (Int(*)(UChar*,Int,HInstr*,Bool,void*)) emit_PPCInstr; host_is_bigendian = True; host_word_type = Ity_I64; @@ -424,7 +424,7 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) " Front end " "------------------------\n\n"); - irbb = bb_to_IR ( vta->guest_extents, + irsb = bb_to_IR ( vta->guest_extents, vta->callback_opaque, disInstrFn, vta->guest_bytes, @@ -433,7 +433,7 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) host_is_bigendian, vta->arch_guest, &vta->archinfo_guest, - &vta->miscinfo_both, + &vta->abiinfo_both, guest_word_type, vta->do_self_check, vta->preamble_function, @@ -442,7 +442,7 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) vexAllocSanityCheck(); - if (irbb == NULL) { + if (irsb == NULL) { /* Access failure. */ vexSetAllocModeTEMP_and_clear(); vex_traceflags = 0; @@ -471,22 +471,22 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) } /* Sanity check the initial IR. */ - sanityCheckIRBB( irbb, "initial IR", + sanityCheckIRSB( irsb, "initial IR", False/*can be non-flat*/, guest_word_type ); vexAllocSanityCheck(); /* Clean it up, hopefully a lot. */ - irbb = do_iropt_BB ( irbb, specHelper, preciseMemExnsFn, + irsb = do_iropt_BB ( irsb, specHelper, preciseMemExnsFn, vta->guest_bytes_addr ); - sanityCheckIRBB( irbb, "after initial iropt", + sanityCheckIRSB( irsb, "after initial iropt", True/*must be flat*/, guest_word_type ); if (vex_traceflags & VEX_TRACE_OPT1) { vex_printf("\n------------------------" " After pre-instr IR optimisation " "------------------------\n\n"); - ppIRBB ( irbb ); + ppIRSB ( irsb ); vex_printf("\n"); } @@ -494,15 +494,15 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) /* Get the thing instrumented. */ if (vta->instrument1) - irbb = vta->instrument1(vta->callback_opaque, - irbb, guest_layout, + irsb = vta->instrument1(vta->callback_opaque, + irsb, guest_layout, vta->guest_extents, guest_word_type, host_word_type); vexAllocSanityCheck(); if (vta->instrument2) - irbb = vta->instrument2(vta->callback_opaque, - irbb, guest_layout, + irsb = vta->instrument2(vta->callback_opaque, + irsb, guest_layout, vta->guest_extents, guest_word_type, host_word_type); @@ -510,20 +510,20 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) vex_printf("\n------------------------" " After instrumentation " "------------------------\n\n"); - ppIRBB ( irbb ); + ppIRSB ( irsb ); vex_printf("\n"); } if (vta->instrument1 || vta->instrument2) - sanityCheckIRBB( irbb, "after instrumentation", + sanityCheckIRSB( irsb, "after instrumentation", True/*must be flat*/, guest_word_type ); /* Do a post-instrumentation cleanup pass. */ if (vta->instrument1 || vta->instrument2) { - do_deadcode_BB( irbb ); - irbb = cprop_BB( irbb ); - do_deadcode_BB( irbb ); - sanityCheckIRBB( irbb, "after post-instrumentation cleanup", + do_deadcode_BB( irsb ); + irsb = cprop_BB( irsb ); + do_deadcode_BB( irsb ); + sanityCheckIRSB( irsb, "after post-instrumentation cleanup", True/*must be flat*/, guest_word_type ); } @@ -533,13 +533,13 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) vex_printf("\n------------------------" " After post-instr IR optimisation " "------------------------\n\n"); - ppIRBB ( irbb ); + ppIRSB ( irsb ); vex_printf("\n"); } /* Turn it into virtual-registerised code. Build trees -- this also throws away any dead bindings. */ - ado_treebuild_BB( irbb ); + ado_treebuild_BB( irsb ); vexAllocSanityCheck(); @@ -547,7 +547,7 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) vex_printf("\n------------------------" " After tree-building " "------------------------\n\n"); - ppIRBB ( irbb ); + ppIRSB ( irsb ); vex_printf("\n"); } @@ -560,8 +560,8 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) " Instruction selection " "------------------------\n"); - vcode = iselBB ( irbb, vta->arch_host, &vta->archinfo_host, - &vta->miscinfo_both ); + vcode = iselSB ( irsb, vta->arch_host, &vta->archinfo_host, + &vta->abiinfo_both ); vexAllocSanityCheck(); @@ -705,15 +705,15 @@ void LibVEX_default_VexArchInfo ( /*OUT*/VexArchInfo* vai ) vai->ppc_cache_line_szB = 0; } -/* Write default settings info *vmi. */ -void LibVEX_default_VexMiscInfo ( /*OUT*/VexMiscInfo* vmi ) +/* Write default settings info *vbi. */ +void LibVEX_default_VexAbiInfo ( /*OUT*/VexAbiInfo* vbi ) { - vmi->guest_stack_redzone_size = 0; - vmi->guest_ppc_zap_RZ_at_blr = False; - vmi->guest_ppc_zap_RZ_at_bl = NULL; - vmi->guest_ppc_sc_continues_at_LR = False; - vmi->host_ppc_calls_use_fndescrs = False; - vmi->host_ppc32_regalign_int64_args = False; + vbi->guest_stack_redzone_size = 0; + vbi->guest_ppc_zap_RZ_at_blr = False; + vbi->guest_ppc_zap_RZ_at_bl = NULL; + vbi->guest_ppc_sc_continues_at_LR = False; + vbi->host_ppc_calls_use_fndescrs = False; + vbi->host_ppc32_regalign_int64_args = False; } diff --git a/VEX/pub/libvex.h b/VEX/pub/libvex.h index f1cbd971e7..a306ae2570 100644 --- a/VEX/pub/libvex.h +++ b/VEX/pub/libvex.h @@ -204,11 +204,11 @@ typedef reg if it is even-numbered? True => yes, False => no. */ Bool host_ppc32_regalign_int64_args; } - VexMiscInfo; + VexAbiInfo; -/* Write default settings info *vmi. */ +/* Write default settings info *vbi. */ extern -void LibVEX_default_VexMiscInfo ( /*OUT*/VexMiscInfo* vmi ); +void LibVEX_default_VexAbiInfo ( /*OUT*/VexAbiInfo* vbi ); /*-------------------------------------------------------*/ @@ -410,7 +410,7 @@ typedef VexArchInfo archinfo_guest; VexArch arch_host; VexArchInfo archinfo_host; - VexMiscInfo miscinfo_both; + VexAbiInfo abiinfo_both; /* IN: an opaque value which is passed as the first arg to all callback functions supplied in this struct. Vex has no idea @@ -441,13 +441,13 @@ typedef /* IN: optionally, two instrumentation functions. May be NULL. */ - IRBB* (*instrument1) ( /*callback_opaque*/void*, - IRBB*, + IRSB* (*instrument1) ( /*callback_opaque*/void*, + IRSB*, VexGuestLayout*, VexGuestExtents*, IRType gWordTy, IRType hWordTy ); - IRBB* (*instrument2) ( /*callback_opaque*/void*, - IRBB*, + IRSB* (*instrument2) ( /*callback_opaque*/void*, + IRSB*, VexGuestLayout*, VexGuestExtents*, IRType gWordTy, IRType hWordTy ); @@ -464,7 +464,7 @@ typedef disassemble any instructions into it; this is indicated by the callback returning True. */ - Bool (*preamble_function)(/*callback_opaque*/void*, IRBB*); + Bool (*preamble_function)(/*callback_opaque*/void*, IRSB*); /* IN: debug: trace vex activity at various points */ Int traceflags; diff --git a/VEX/pub/libvex_ir.h b/VEX/pub/libvex_ir.h index 14c4f5c26f..2fc4107638 100644 --- a/VEX/pub/libvex_ir.h +++ b/VEX/pub/libvex_ir.h @@ -68,17 +68,19 @@ Code blocks ~~~~~~~~~~~ - The code is broken into small code blocks (type: 'IRBB'). Each - code block typically represents from 1 to perhaps 50 instructions. - IRBBs are single-entry, multiple-exit code blocks. Each IRBB - contains three things: + The code is broken into small code blocks ("superblocks", type: + 'IRSB'). Each code block typically represents from 1 to perhaps 50 + instructions. IRSBs are single-entry, multiple-exit code blocks. + Each IRSB contains three things: - a type environment, which indicates the type of each temporary - value present in the IRBB + value present in the IRSB - a list of statements, which represent code - - a jump that exits from the end the IRBB + - a jump that exits from the end the IRSB Because the blocks are multiple-exit, there can be additional - conditional exit statements that cause control to leave the IRBB - before the final exit. + conditional exit statements that cause control to leave the IRSB + before the final exit. Also because of this, IRSBs can cover + multiple non-consecutive sequences of code (up to 3). These are + recorded in the type VexGuestExtents (see libvex.h). Statements and expressions ~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -106,11 +108,11 @@ The basic "Get" and "Put" operations are sufficient to model normal fixed registers on the guest. Selected areas of the guest state - can be treated as a circular array of registers (type: 'IRArray'), - which can be indexed at run-time. This is done with the "GetI" and - "PutI" primitives. This is necessary to describe rotating register - files, for example the x87 FPU stack, SPARC register windows, and - the Itanium register files. + can be treated as a circular array of registers (type: + 'IRRegArray'), which can be indexed at run-time. This is done with + the "GetI" and "PutI" primitives. This is necessary to describe + rotating register files, for example the x87 FPU stack, SPARC + register windows, and the Itanium register files. Examples, and flattened vs. unflattened code ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -183,7 +185,7 @@ SSAness and typing ~~~~~~~~~~~~~~~~~~ - The IR is fully typed. For every IRBB (IR block) it is possible to + The IR is fully typed. For every IRSB (IR block) it is possible to say unambiguously whether or not it is correctly typed. Incorrectly typed IR has no meaning and the VEX will refuse to process it. At various points during processing VEX typechecks the @@ -217,11 +219,11 @@ - eqIRFoo is a structural equality predicate for IRFoos. - - dopyIRFoo is a deep copy constructor for IRFoos. + - deepCopyIRFoo is a deep copy constructor for IRFoos. It recursively traverses the entire argument tree and produces a complete new tree. - - sopyIRFoo is the shallow copy constructor for IRFoos. + - shallowCopyIRFoo is the shallow copy constructor for IRFoos. It creates a new top-level copy of the supplied object, but does not copy any sub-objects. */ @@ -314,7 +316,7 @@ extern IRConst* IRConst_F64i ( ULong ); extern IRConst* IRConst_V128 ( UShort ); /* Deep-copy an IRConst */ -extern IRConst* dopyIRConst ( IRConst* ); +extern IRConst* deepCopyIRConst ( IRConst* ); /* Pretty-print an IRConst */ extern void ppIRConst ( IRConst* ); @@ -352,7 +354,7 @@ typedef extern IRCallee* mkIRCallee ( Int regparms, HChar* name, void* addr ); /* Deep-copy an IRCallee. */ -extern IRCallee* dopyIRCallee ( IRCallee* ); +extern IRCallee* deepCopyIRCallee ( IRCallee* ); /* Pretty-print an IRCallee. */ extern void ppIRCallee ( IRCallee* ); @@ -369,14 +371,14 @@ typedef IRType elemTy; /* type of each element in the indexed area */ Int nElems; /* number of elements in the indexed area */ } - IRArray; + IRRegArray; -extern IRArray* mkIRArray ( Int, IRType, Int ); +extern IRRegArray* mkIRRegArray ( Int, IRType, Int ); -extern IRArray* dopyIRArray ( IRArray* ); +extern IRRegArray* deepCopyIRRegArray ( IRRegArray* ); -extern void ppIRArray ( IRArray* ); -extern Bool eqIRArray ( IRArray*, IRArray* ); +extern void ppIRRegArray ( IRRegArray* ); +extern Bool eqIRRegArray ( IRRegArray*, IRRegArray* ); /* ------------------ Temporaries ------------------ */ @@ -889,7 +891,7 @@ typedef Iex_Binder, Iex_Get, Iex_GetI, - Iex_Tmp, + Iex_RdTmp, Iex_Qop, Iex_Triop, Iex_Binop, @@ -938,7 +940,7 @@ struct _IRExpr { example is the x87 FP register stack. The part of the guest state to be treated as a circular array - is described in the IRArray 'descr' field. It holds the + is described in the IRRegArray 'descr' field. It holds the offset of the first element in the array, the type of each element, and the number of elements. @@ -968,9 +970,9 @@ struct _IRExpr { eg. GETI(128:8xI8)[t1,0] */ struct { - IRArray* descr; /* Part of guest state treated as circular */ - IRExpr* ix; /* Variable part of index into array */ - Int bias; /* Constant offset part of index into array */ + IRRegArray* descr; /* Part of guest state treated as circular */ + IRExpr* ix; /* Variable part of index into array */ + Int bias; /* Constant offset part of index into array */ } GetI; /* The value held by a temporary. @@ -978,7 +980,7 @@ struct _IRExpr { */ struct { IRTemp tmp; /* The temporary number */ - } Tmp; + } RdTmp; /* A quaternary operation. ppIRExpr output: (, , , ), @@ -1099,8 +1101,8 @@ struct _IRExpr { /* Expression constructors. */ extern IRExpr* IRExpr_Binder ( Int binder ); extern IRExpr* IRExpr_Get ( Int off, IRType ty ); -extern IRExpr* IRExpr_GetI ( IRArray* descr, IRExpr* ix, Int bias ); -extern IRExpr* IRExpr_Tmp ( IRTemp tmp ); +extern IRExpr* IRExpr_GetI ( IRRegArray* descr, IRExpr* ix, Int bias ); +extern IRExpr* IRExpr_RdTmp ( IRTemp tmp ); extern IRExpr* IRExpr_Qop ( IROp op, IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, IRExpr* arg4 ); extern IRExpr* IRExpr_Triop ( IROp op, IRExpr* arg1, @@ -1113,7 +1115,7 @@ extern IRExpr* IRExpr_CCall ( IRCallee* cee, IRType retty, IRExpr** args ); extern IRExpr* IRExpr_Mux0X ( IRExpr* cond, IRExpr* expr0, IRExpr* exprX ); /* Deep-copy an IRExpr. */ -extern IRExpr* dopyIRExpr ( IRExpr* ); +extern IRExpr* deepCopyIRExpr ( IRExpr* ); /* Pretty-print an IRExpr. */ extern void ppIRExpr ( IRExpr* ); @@ -1129,11 +1131,11 @@ extern IRExpr** mkIRExprVec_5 ( IRExpr*, IRExpr*, IRExpr*, IRExpr*, IRExpr* ); /* IRExpr copiers: - - sopy: shallow-copy (ie. create a new vector that shares the + - shallowCopy: shallow-copy (ie. create a new vector that shares the elements with the original). - - dopy: deep-copy (ie. create a completely new vector). */ -extern IRExpr** sopyIRExprVec ( IRExpr** ); -extern IRExpr** dopyIRExprVec ( IRExpr** ); + - deepCopy: deep-copy (ie. create a completely new vector). */ +extern IRExpr** shallowCopyIRExprVec ( IRExpr** ); +extern IRExpr** deepCopyIRExprVec ( IRExpr** ); /* Make a constant expression from the given host word taking into account (of course) the host word size. */ @@ -1149,7 +1151,7 @@ IRExpr* mkIRExprCCall ( IRType retty, /* Convenience functions for atoms (IRExprs which are either Iex_Tmp or * Iex_Const). */ static inline Bool isIRAtom ( IRExpr* e ) { - return toBool(e->tag == Iex_Tmp || e->tag == Iex_Const); + return toBool(e->tag == Iex_RdTmp || e->tag == Iex_Const); } /* Are these two IR atoms identical? Causes an assertion @@ -1293,7 +1295,7 @@ extern void ppIRDirty ( IRDirty* ); extern IRDirty* emptyIRDirty ( void ); /* Deep-copy a dirty call */ -extern IRDirty* dopyIRDirty ( IRDirty* ); +extern IRDirty* deepCopyIRDirty ( IRDirty* ); /* A handy function which takes some of the tedium out of constructing dirty helper calls. The called function impliedly does not return @@ -1331,7 +1333,7 @@ typedef Ist_AbiHint, /* META */ Ist_Put, Ist_PutI, - Ist_Tmp, + Ist_WrTmp, Ist_Store, Ist_Dirty, Ist_MFence, @@ -1363,7 +1365,7 @@ typedef /* META: instruction mark. Marks the start of the statements that represent a single machine instruction (the end of those statements is marked by the next IMark or the end of - the IRBB). Contains the address and length of the + the IRSB). Contains the address and length of the instruction. ppIRExpr output: ------ IMark(, ) ------, @@ -1407,22 +1409,23 @@ typedef eg. PUTI(64:8xF64)[t5,0] = t1 */ struct { - IRArray* descr; /* Part of guest state treated as circular */ - IRExpr* ix; /* Variable part of index into array */ - Int bias; /* Constant offset part of index into array */ - IRExpr* data; /* The value to write */ + IRRegArray* descr; /* Part of guest state treated as circular */ + IRExpr* ix; /* Variable part of index into array */ + Int bias; /* Constant offset part of index into array */ + IRExpr* data; /* The value to write */ } PutI; - /* Assign a value to a temporary. ("Tmp" is not a very good - name for this, particularly because there is also a Tmp - expression kind.) + /* Assign a value to a temporary. Note that SSA rules require + each tmp is only assigned to once. IR sanity checking will + reject any block containing a temporary which is not assigned + to exactly once. ppIRExpr output: t = , eg. t1 = 3 */ struct { IRTemp tmp; /* Temporary (LHS of assignment) */ IRExpr* data; /* Expression (RHS of assignment) */ - } Tmp; + } WrTmp; /* Write a value to memory. ppIRExpr output: ST() = , eg. STle(t1) = t2 @@ -1454,7 +1457,7 @@ typedef struct { } MFence; - /* Conditional exit from the middle of an IRBB. + /* Conditional exit from the middle of an IRSB. ppIRExpr output: if () goto {} eg. if (t69) goto {Boring} 0x4000AAA:I32 */ @@ -1472,16 +1475,16 @@ extern IRStmt* IRStmt_NoOp ( void ); extern IRStmt* IRStmt_IMark ( Addr64 addr, Int len ); extern IRStmt* IRStmt_AbiHint ( IRExpr* base, Int len ); extern IRStmt* IRStmt_Put ( Int off, IRExpr* data ); -extern IRStmt* IRStmt_PutI ( IRArray* descr, IRExpr* ix, Int bias, +extern IRStmt* IRStmt_PutI ( IRRegArray* descr, IRExpr* ix, Int bias, IRExpr* data ); -extern IRStmt* IRStmt_Tmp ( IRTemp tmp, IRExpr* data ); +extern IRStmt* IRStmt_WrTmp ( IRTemp tmp, IRExpr* data ); extern IRStmt* IRStmt_Store ( IREndness end, IRExpr* addr, IRExpr* data ); extern IRStmt* IRStmt_Dirty ( IRDirty* details ); extern IRStmt* IRStmt_MFence ( void ); extern IRStmt* IRStmt_Exit ( IRExpr* guard, IRJumpKind jk, IRConst* dst ); /* Deep-copy an IRStmt. */ -extern IRStmt* dopyIRStmt ( IRStmt* ); +extern IRStmt* deepCopyIRStmt ( IRStmt* ); /* Pretty-print an IRStmt. */ extern void ppIRStmt ( IRStmt* ); @@ -1507,22 +1510,24 @@ typedef extern IRTemp newIRTemp ( IRTypeEnv*, IRType ); /* Deep-copy a type environment */ -extern IRTypeEnv* dopyIRTypeEnv ( IRTypeEnv* ); +extern IRTypeEnv* deepCopyIRTypeEnv ( IRTypeEnv* ); /* Pretty-print a type environment */ extern void ppIRTypeEnv ( IRTypeEnv* ); -/* Code blocks contain: +/* Code blocks, which in proper compiler terminology are superblocks + (single entry, multiple exit code sequences) contain: + - A table giving a type for each temp (the "type environment") - An expandable array of statements - An expression of type 32 or 64 bits, depending on the - guest's word size, indicating the next destination. + guest's word size, indicating the next destination if the block + executes all the way to the end, without a side exit - An indication of any special actions (JumpKind) needed for this final jump. - The "BB" is short for "basic block", but this is a misnomer, as an - IRBB can contain multiple exits. + "IRSB" stands for "IR Super Block". */ typedef struct { @@ -1533,23 +1538,23 @@ typedef IRExpr* next; IRJumpKind jumpkind; } - IRBB; + IRSB; -/* Allocate a new, uninitialised IRBB */ -extern IRBB* emptyIRBB ( void ); +/* Allocate a new, uninitialised IRSB */ +extern IRSB* emptyIRSB ( void ); -/* Deep-copy an IRBB */ -extern IRBB* dopyIRBB ( IRBB* ); +/* Deep-copy an IRSB */ +extern IRSB* deepCopyIRSB ( IRSB* ); -/* Deep-copy an IRBB, except for the statements list, which set to be +/* Deep-copy an IRSB, except for the statements list, which set to be a new, empty, list of statements. */ -extern IRBB* dopyIRBBExceptStmts ( IRBB* ); +extern IRSB* deepCopyIRSBExceptStmts ( IRSB* ); -/* Pretty-print an IRBB */ -extern void ppIRBB ( IRBB* ); +/* Pretty-print an IRSB */ +extern void ppIRSB ( IRSB* ); -/* Append an IRStmt to an IRBB */ -extern void addStmtToIRBB ( IRBB*, IRStmt* ); +/* Append an IRStmt to an IRSB */ +extern void addStmtToIRSB ( IRSB*, IRStmt* ); /*---------------------------------------------------------------*/ @@ -1565,7 +1570,7 @@ extern IRType typeOfIRTemp ( IRTypeEnv*, IRTemp ); extern IRType typeOfIRExpr ( IRTypeEnv*, IRExpr* ); /* Sanity check a BB of IR */ -extern void sanityCheckIRBB ( IRBB* bb, +extern void sanityCheckIRSB ( IRSB* bb, HChar* caller, Bool require_flatness, IRType guest_word_size ); diff --git a/VEX/test_main.c b/VEX/test_main.c index 3ca12ce600..4c7248ba89 100644 --- a/VEX/test_main.c +++ b/VEX/test_main.c @@ -67,7 +67,7 @@ int main ( int argc, char** argv ) VexControl vcon; VexGuestExtents vge; VexArchInfo vai_x86, vai_amd64, vai_ppc32; - VexMiscInfo vmi; + VexAbiInfo vbi; VexTranslateArgs vta; if (argc != 2) { @@ -136,7 +136,7 @@ int main ( int argc, char** argv ) vai_ppc32.hwcaps = 0; vai_ppc32.ppc_cache_line_szB = 128; - LibVEX_default_VexMiscInfo(&vmi); + LibVEX_default_VexAbiInfo(&vbi); /* ----- Set up args for LibVEX_Translate ----- */ #if 1 /* ppc32 -> ppc32 */ @@ -157,7 +157,7 @@ int main ( int argc, char** argv ) vta.arch_host = VexArchX86; vta.archinfo_host = vai_x86; #endif - vta.miscinfo_both = vmi; + vta.abiinfo_both = vbi; vta.guest_bytes = origbuf; vta.guest_bytes_addr = (Addr64)orig_addr; vta.callback_opaque = NULL;