From: Philippe Mathieu-Daudé Date: Sat, 13 Dec 2025 18:02:12 +0000 (+0100) Subject: target/sparc: Use explicit big-endian LD/ST API X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=18a91deb41b8f4a3bc7935b0a7b9fbc091bdceae;p=thirdparty%2Fqemu.git target/sparc: Use explicit big-endian LD/ST API The SPARC architecture uses big endianness. Directly use the big-endian LD/ST API. Mechanical change running: $ for a in uw w l q; do \ sed -i -e "s/ld${a}_p(/ld${a}_be_p(/" \ $(git grep -wlE '(ld|st)u?[wlq]_p' target/sparc/); done Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Richard Henderson Message-ID: <20251224162642.90857-5-philmd@linaro.org> --- diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c index 2c63eb9e03..881dbc96ed 100644 --- a/target/sparc/ldst_helper.c +++ b/target/sparc/ldst_helper.c @@ -707,17 +707,17 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, MEMTXATTRS_UNSPECIFIED, &result); break; case 2: - ret = address_space_lduw(cs->as, access_addr, - MEMTXATTRS_UNSPECIFIED, &result); + ret = address_space_lduw_be(cs->as, access_addr, + MEMTXATTRS_UNSPECIFIED, &result); break; default: case 4: - ret = address_space_ldl(cs->as, access_addr, - MEMTXATTRS_UNSPECIFIED, &result); + ret = address_space_ldl_be(cs->as, access_addr, + MEMTXATTRS_UNSPECIFIED, &result); break; case 8: - ret = address_space_ldq(cs->as, access_addr, - MEMTXATTRS_UNSPECIFIED, &result); + ret = address_space_ldq_be(cs->as, access_addr, + MEMTXATTRS_UNSPECIFIED, &result); break; } @@ -878,10 +878,10 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, MemTxResult result; hwaddr access_addr = (env->mxccregs[0] & 0xffffffffULL) + 8 * i; - env->mxccdata[i] = address_space_ldq(cs->as, - access_addr, - MEMTXATTRS_UNSPECIFIED, - &result); + env->mxccdata[i] = address_space_ldq_be(cs->as, + access_addr, + MEMTXATTRS_UNSPECIFIED, + &result); if (result != MEMTX_OK) { /* TODO: investigate whether this is the right behaviour */ sparc_raise_mmu_fault(cs, access_addr, false, false, @@ -906,8 +906,8 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, MemTxResult result; hwaddr access_addr = (env->mxccregs[1] & 0xffffffffULL) + 8 * i; - address_space_stq(cs->as, access_addr, env->mxccdata[i], - MEMTXATTRS_UNSPECIFIED, &result); + address_space_stq_be(cs->as, access_addr, env->mxccdata[i], + MEMTXATTRS_UNSPECIFIED, &result); if (result != MEMTX_OK) { /* TODO: investigate whether this is the right behaviour */ @@ -1072,17 +1072,17 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, MEMTXATTRS_UNSPECIFIED, &result); break; case 2: - address_space_stw(cs->as, access_addr, val, - MEMTXATTRS_UNSPECIFIED, &result); + address_space_stw_be(cs->as, access_addr, val, + MEMTXATTRS_UNSPECIFIED, &result); break; case 4: default: - address_space_stl(cs->as, access_addr, val, - MEMTXATTRS_UNSPECIFIED, &result); + address_space_stl_be(cs->as, access_addr, val, + MEMTXATTRS_UNSPECIFIED, &result); break; case 8: - address_space_stq(cs->as, access_addr, val, - MEMTXATTRS_UNSPECIFIED, &result); + address_space_stq_be(cs->as, access_addr, val, + MEMTXATTRS_UNSPECIFIED, &result); break; } if (result != MEMTX_OK) { diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index 46bf500ea8..5a58239d65 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -102,7 +102,8 @@ static int get_physical_address(CPUSPARCState *env, CPUTLBEntryFull *full, /* SPARC reference MMU table walk: Context table->L1->L2->PTE */ /* Context base + context number */ pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 2); - pde = address_space_ldl(cs->as, pde_ptr, MEMTXATTRS_UNSPECIFIED, &result); + pde = address_space_ldl_be(cs->as, pde_ptr, + MEMTXATTRS_UNSPECIFIED, &result); if (result != MEMTX_OK) { return 4 << 2; /* Translation fault, L = 0 */ } @@ -117,8 +118,8 @@ static int get_physical_address(CPUSPARCState *env, CPUTLBEntryFull *full, return 4 << 2; case 1: /* L0 PDE */ pde_ptr = ((address >> 22) & ~3) + ((pde & ~3) << 4); - pde = address_space_ldl(cs->as, pde_ptr, - MEMTXATTRS_UNSPECIFIED, &result); + pde = address_space_ldl_be(cs->as, pde_ptr, + MEMTXATTRS_UNSPECIFIED, &result); if (result != MEMTX_OK) { return (1 << 8) | (4 << 2); /* Translation fault, L = 1 */ } @@ -131,8 +132,8 @@ static int get_physical_address(CPUSPARCState *env, CPUTLBEntryFull *full, return (1 << 8) | (4 << 2); case 1: /* L1 PDE */ pde_ptr = ((address & 0xfc0000) >> 16) + ((pde & ~3) << 4); - pde = address_space_ldl(cs->as, pde_ptr, - MEMTXATTRS_UNSPECIFIED, &result); + pde = address_space_ldl_be(cs->as, pde_ptr, + MEMTXATTRS_UNSPECIFIED, &result); if (result != MEMTX_OK) { return (2 << 8) | (4 << 2); /* Translation fault, L = 2 */ } @@ -145,8 +146,8 @@ static int get_physical_address(CPUSPARCState *env, CPUTLBEntryFull *full, return (2 << 8) | (4 << 2); case 1: /* L2 PDE */ pde_ptr = ((address & 0x3f000) >> 10) + ((pde & ~3) << 4); - pde = address_space_ldl(cs->as, pde_ptr, - MEMTXATTRS_UNSPECIFIED, &result); + pde = address_space_ldl_be(cs->as, pde_ptr, + MEMTXATTRS_UNSPECIFIED, &result); if (result != MEMTX_OK) { return (3 << 8) | (4 << 2); /* Translation fault, L = 3 */ } @@ -189,7 +190,7 @@ static int get_physical_address(CPUSPARCState *env, CPUTLBEntryFull *full, if (is_dirty) { pde |= PG_MODIFIED_MASK; } - stl_phys(cs->as, pde_ptr, pde); + stl_be_phys(cs->as, pde_ptr, pde); } /* the page can be put in the TLB */ @@ -276,7 +277,8 @@ target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev) /* Context base + context number */ pde_ptr = (hwaddr)(env->mmuregs[1] << 4) + (env->mmuregs[2] << 2); - pde = address_space_ldl(cs->as, pde_ptr, MEMTXATTRS_UNSPECIFIED, &result); + pde = address_space_ldl_be(cs->as, pde_ptr, + MEMTXATTRS_UNSPECIFIED, &result); if (result != MEMTX_OK) { return 0; } @@ -292,8 +294,8 @@ target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev) return pde; } pde_ptr = ((address >> 22) & ~3) + ((pde & ~3) << 4); - pde = address_space_ldl(cs->as, pde_ptr, - MEMTXATTRS_UNSPECIFIED, &result); + pde = address_space_ldl_be(cs->as, pde_ptr, + MEMTXATTRS_UNSPECIFIED, &result); if (result != MEMTX_OK) { return 0; } @@ -310,8 +312,8 @@ target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev) return pde; } pde_ptr = ((address & 0xfc0000) >> 16) + ((pde & ~3) << 4); - pde = address_space_ldl(cs->as, pde_ptr, - MEMTXATTRS_UNSPECIFIED, &result); + pde = address_space_ldl_be(cs->as, pde_ptr, + MEMTXATTRS_UNSPECIFIED, &result); if (result != MEMTX_OK) { return 0; } @@ -328,8 +330,8 @@ target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev) return pde; } pde_ptr = ((address & 0x3f000) >> 10) + ((pde & ~3) << 4); - pde = address_space_ldl(cs->as, pde_ptr, - MEMTXATTRS_UNSPECIFIED, &result); + pde = address_space_ldl_be(cs->as, pde_ptr, + MEMTXATTRS_UNSPECIFIED, &result); if (result != MEMTX_OK) { return 0; }