From: Zhangjin Liao <liaozhangjin@eswincomputing.com>
Date: Wed, 23 Aug 2023 14:02:47 +0000 (-0600)
Subject: [PATCH] RISC-V:add a more appropriate type attribute
X-Git-Tag: basepoints/gcc-15~6730
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=18befd6f050e70f11ecca1dd58624f0ee3c68cc7;p=thirdparty%2Fgcc.git

[PATCH] RISC-V:add a more appropriate type attribute

Due to the more accurate type attribute added to the clz, ctz, and pcnt
operations in https://github.com/gcc-mirror/gcc/commit/07e2576d6f3 the
same type attribute should be used here.

gcc/ChangeLog:

	* config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
	appropriate type attribute.
---

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index 0c99152ffc8e..7b55528ee49a 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -262,7 +262,7 @@
           (match_operand:DI 2 "const_int_operand")))]
   "TARGET_64BIT && TARGET_ZBB && ((INTVAL (operands[2]) & 0x3f) == 0x3f)"
   "<bitmanip_insn>w\t%0,%1"
-  [(set_attr "type" "bitmanip")
+  [(set_attr "type" "<bitmanip_insn>")
    (set_attr "mode" "SI")])
 
 (define_insn "*<bitmanip_optab>di2"