From: Kelvin Nilsen <kelvin@gcc.gnu.org>
Date: Wed, 6 Feb 2019 21:35:44 +0000 (+0000)
Subject: backport: rs6000-c.c (altivec-resolve_overloaded_builtin): Change handling of ALTIVEC... 
X-Git-Tag: releases/gcc-7.5.0~608
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=19a953fb60da0b0035fc08d35b1bf7f38da22c66;p=thirdparty%2Fgcc.git

backport: rs6000-c.c (altivec-resolve_overloaded_builtin): Change handling of ALTIVEC_BUILTIN_VEC_EXTRACT.

gcc/ChangeLog:

2019-02-06  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	Backport from mainline.
	2019-01-30  Kelvin Nilsen  <kelvin@gcc.gnu.org>
	* config/rs6000/rs6000-c.c (altivec-resolve_overloaded_builtin):
	Change handling of ALTIVEC_BUILTIN_VEC_EXTRACT.  Coerce result to
	type of vector element when vec_extract is implemented by direct
	move.

gcc/testsuite/ChangeLog:

2019-02-06  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	2019-02-05  Kelvin Nilsen  <kelvin@gcc.gnu.org>
	* gcc.target/powerpc/vec-extract-slong-1.c: Require p8 execution
	hardware.
	* gcc.target/powerpc/vec-extract-schar-1.c: Likewise.
	* gcc.target/powerpc/vec-extract-sint128-1.c: Likewise.
	* gcc.target/powerpc/vec-extract-sshort-1.c: Likewise.
	* gcc.target/powerpc/vec-extract-ulong-1.c: Likewise.
	* gcc.target/powerpc/vec-extract-uchar-1.c: Likewise.
	* gcc.target/powerpc/vec-extract-sint-1.c: Likewise.
	* gcc.target/powerpc/vec-extract-uint128-1.c: Likewise.
	* gcc.target/powerpc/vec-extract-ushort-1.c: Likewise.
	* gcc.target/powerpc/vec-extract-uint-1.c: Likewise.

	Backport from mainline.
	2019-01-30  Kelvin Nilsen  <kelvin@gcc.gnu.org>
	* gcc.target/powerpc/vec-extract-schar-1.c: New test.
	* gcc.target/powerpc/vec-extract-sint-1.c: New test.
	* gcc.target/powerpc/vec-extract-sint128-1.c: New test.
	* gcc.target/powerpc/vec-extract-slong-1.c: New test.
	* gcc.target/powerpc/vec-extract-sshort-1.c: New test.
	* gcc.target/powerpc/vec-extract-uchar-1.c: New test.
	* gcc.target/powerpc/vec-extract-uint-1.c: New test.
	* gcc.target/powerpc/vec-extract-uint128-1.c: New test.
	* gcc.target/powerpc/vec-extract-ulong-1.c: New test.
	* gcc.target/powerpc/vec-extract-ushort-1.c: New test.

From-SVN: r268596
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 88c11f281e57..7c5ddb5fcc6f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2019-02-06  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+
+	Backport from mainline.
+	2019-01-30  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+	* config/rs6000/rs6000-c.c (altivec-resolve_overloaded_builtin):
+	Change handling of ALTIVEC_BUILTIN_VEC_EXTRACT.  Coerce result to
+	type of vector element when vec_extract is implemented by direct
+	move.
+
 2019-02-06  Eric Botcazou  <ebotcazou@adacore.com>
 
 	* config/i386/i386.c (ix86_expand_prologue): Emit a memory blockage
diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index 2996ca19b6f5..f71f13fe50cb 100644
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -6057,7 +6057,13 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
 	    }
 
 	  if (call)
-	    return build_call_expr (call, 2, arg1, arg2);
+	    {
+	      tree result = build_call_expr (call, 2, arg1, arg2);
+	      /* Coerce the result to vector element type.  May be no-op.  */
+	      arg1_inner_type = TREE_TYPE (arg1_type);
+	      result = fold_convert (arg1_inner_type, result);
+	      return result;
+	    }
 	}
 
       /* Build *(((arg1_inner_type*)&(vector type){arg1})+arg2). */
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index af6d055763df..4e95b24b4659 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,31 @@
+2019-02-06  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+
+	2019-02-05  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+	* gcc.target/powerpc/vec-extract-slong-1.c: Require p8 execution
+	hardware.
+	* gcc.target/powerpc/vec-extract-schar-1.c: Likewise.
+	* gcc.target/powerpc/vec-extract-sint128-1.c: Likewise.
+	* gcc.target/powerpc/vec-extract-sshort-1.c: Likewise.
+	* gcc.target/powerpc/vec-extract-ulong-1.c: Likewise.
+	* gcc.target/powerpc/vec-extract-uchar-1.c: Likewise.
+	* gcc.target/powerpc/vec-extract-sint-1.c: Likewise.
+	* gcc.target/powerpc/vec-extract-uint128-1.c: Likewise.
+	* gcc.target/powerpc/vec-extract-ushort-1.c: Likewise.
+	* gcc.target/powerpc/vec-extract-uint-1.c: Likewise.
+
+	Backport from mainline.
+	2019-01-30  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+	* gcc.target/powerpc/vec-extract-schar-1.c: New test.
+	* gcc.target/powerpc/vec-extract-sint-1.c: New test.
+	* gcc.target/powerpc/vec-extract-sint128-1.c: New test.
+	* gcc.target/powerpc/vec-extract-slong-1.c: New test.
+	* gcc.target/powerpc/vec-extract-sshort-1.c: New test.
+	* gcc.target/powerpc/vec-extract-uchar-1.c: New test.
+	* gcc.target/powerpc/vec-extract-uint-1.c: New test.
+	* gcc.target/powerpc/vec-extract-uint128-1.c: New test.
+	* gcc.target/powerpc/vec-extract-ulong-1.c: New test.
+	* gcc.target/powerpc/vec-extract-ushort-1.c: New test.
+
 2019-02-06  Eric Botcazou  <ebotcazou@adacore.com>
 
 	* gnat.dg/opt76.adb: New test.
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-schar-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-schar-1.c
new file mode 100644
index 000000000000..f5dea6f2dd86
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-schar-1.c
@@ -0,0 +1,29 @@
+/* Test to verify that the vec_extract from a vector of
+   signed chars remains signed.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target p8vector_hw } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(signed char sc) {
+  int sce;
+
+  vector signed char v = vec_splats(sc);
+  sce = vec_extract(v,0);
+
+  if (sce != sc)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (0xf6);
+  test1 (0x76);
+  test1 (0x06);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-sint-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-sint-1.c
new file mode 100644
index 000000000000..0cefe2002544
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-sint-1.c
@@ -0,0 +1,29 @@
+/* Test to verify that the vec_extract from a vector of
+   signed ints remains signed.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target p8vector_hw } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(signed int si) {
+  long long int sie;
+
+  vector signed int v = vec_splats(si);
+  sie = vec_extract(v,0);
+
+  if (sie != si)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (0xf6000000);
+  test1 (0x76000000);
+  test1 (0x06000000);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-sint128-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-sint128-1.c
new file mode 100644
index 000000000000..5321adcff4b0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-sint128-1.c
@@ -0,0 +1,27 @@
+/* Test to verify that the vec_extract from a vector of
+   signed __int128s remains signed.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target p8vector_hw } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(signed __int128 st) {
+
+  vector signed __int128 v = vec_splats(st);
+
+  if (vec_extract (v, 0) > st)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (((__int128) 0xf600000000000000LL) << 64);
+  test1 (((__int128) 0x7600000000000000LL) << 64);
+  test1 (((__int128) 0x0600000000000000LL) << 64);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-slong-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-slong-1.c
new file mode 100644
index 000000000000..9b4f548240ce
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-slong-1.c
@@ -0,0 +1,27 @@
+/* Test to verify that the vec_extract from a vector of
+   signed longs remains signed.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target p8vector_hw } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(signed long long int sl) {
+
+  vector signed long long int v = vec_splats(sl);
+
+  if (vec_extract (v, 0) > sl)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (0xf600000000000000LL);
+  test1 (0x7600000000000000LL);
+  test1 (0x0600000000000000LL);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-sshort-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-sshort-1.c
new file mode 100644
index 000000000000..cd5b4844280e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-sshort-1.c
@@ -0,0 +1,29 @@
+/* Test to verify that the vec_extract from a vector of
+   signed shorts remains signed.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target p8vector_hw } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(signed short ss) {
+  int sse;
+
+  vector signed short v = vec_splats(ss);
+  sse = vec_extract(v,0);
+
+  if (sse != ss)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (0xf600);
+  test1 (0x7600);
+  test1 (0x0600);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-uchar-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-uchar-1.c
new file mode 100644
index 000000000000..b355ef34b6c0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-uchar-1.c
@@ -0,0 +1,29 @@
+/* Test to verify that the vec_extract from a vector of
+   unsigned chars remains unsigned.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target p8vector_hw } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(unsigned char uc) {
+  int uce;
+
+  vector unsigned char v = vec_splats(uc);
+  uce = vec_extract(v,0);
+
+  if (uce != uc)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (0xf6);
+  test1 (0x76);
+  test1 (0x06);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-uint-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-uint-1.c
new file mode 100644
index 000000000000..9dd19837df04
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-uint-1.c
@@ -0,0 +1,29 @@
+/* Test to verify that the vec_extract from a vector of
+   unsigned ints remains unsigned.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target p8vector_hw } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(unsigned int ui) {
+  long long int uie;
+
+  vector unsigned int v = vec_splats(ui);
+  uie = vec_extract(v,0);
+
+  if (uie != ui)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (0xf6000000);
+  test1 (0x76000000);
+  test1 (0x06000000);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-uint128-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-uint128-1.c
new file mode 100644
index 000000000000..1714f2ca432b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-uint128-1.c
@@ -0,0 +1,27 @@
+/* Test to verify that the vec_extract from a vector of
+   unsigned __int128s remains unsigned.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target p8vector_hw } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(unsigned __int128 ul) {
+
+  vector unsigned __int128 v = vec_splats(ul);
+
+  if (vec_extract (v, 0) < ul)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (((__int128) 0xf600000000000000LL) << 64);
+  test1 (((__int128) 0x7600000000000000LL) << 64);
+  test1 (((__int128) 0x0600000000000000LL) << 64);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-ulong-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-ulong-1.c
new file mode 100644
index 000000000000..7bfdc634fa40
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-ulong-1.c
@@ -0,0 +1,27 @@
+/* Test to verify that the vec_extract from a vector of
+   unsigned longs remains unsigned.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target p8vector_hw } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(unsigned long long int ul) {
+
+  vector unsigned long long int v = vec_splats(ul);
+
+  if (vec_extract (v, 0) < ul)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (0xf600000000000000LL);
+  test1 (0x7600000000000000LL);
+  test1 (0x0600000000000000LL);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-ushort-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-ushort-1.c
new file mode 100644
index 000000000000..e76e44cd27cd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-ushort-1.c
@@ -0,0 +1,29 @@
+/* Test to verify that the vec_extract from a vector of
+   signed shorts remains signed.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target p8vector_hw } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(unsigned short us) {
+  int use;
+
+  vector unsigned short v = vec_splats(us);
+  use = vec_extract(v,0);
+
+  if (use != us)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (0xf600);
+  test1 (0x7600);
+  test1 (0x0600);
+  return 0;
+}