From: David Edelsohn Date: Tue, 22 Jan 2008 21:12:05 +0000 (+0000) Subject: re PR target/34529 (Wrong code with altivec stores and offsets) X-Git-Tag: releases/gcc-4.3.0~467 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=1a23970d0e21f1e88824425a716230a786a1a0c5;p=thirdparty%2Fgcc.git re PR target/34529 (Wrong code with altivec stores and offsets) PR target/34529 * config/rs6000/rs6000.c (rs6000_legitimate_offset_address_p): Offset addresses are not valid for Altivec or paired float modes. From-SVN: r131741 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2f80c36e3465..f882548bfa4f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2008-01-22 David Edelsohn + + PR target/34529 + * config/rs6000/rs6000.c (rs6000_legitimate_offset_address_p): + Offset addresses are not valid for Altivec or paired float modes. + 2008-01-22 Jakub Jelinek PR c++/34607 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index c730a65fc29e..83d8dbdc0d9d 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -3365,19 +3365,17 @@ rs6000_legitimate_offset_address_p (enum machine_mode mode, rtx x, int strict) case V4SFmode: case V4SImode: /* AltiVec vector modes. Only reg+reg addressing is valid and - constant offset zero should not occur due to canonicalization. - Allow any offset when not strict before reload. */ - return !strict; + constant offset zero should not occur due to canonicalization. */ + return false; case V4HImode: case V2SImode: case V1DImode: case V2SFmode: /* Paired vector modes. Only reg+reg addressing is valid and - constant offset zero should not occur due to canonicalization. - Allow any offset when not strict before reload. */ + constant offset zero should not occur due to canonicalization. */ if (TARGET_PAIRED_FLOAT) - return !strict; + return false; /* SPE vector modes. */ return SPE_CONST_OFFSET_OK (offset);