From: Andreas Arnez Date: Tue, 18 May 2021 17:59:32 +0000 (+0200) Subject: s390x: Wrap up misc-insn-3 and vec-enh-2 support X-Git-Tag: VALGRIND_3_18_0~86 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=1bee3ab757661f4bc161218272b33b1541613773;p=thirdparty%2Fvalgrind.git s390x: Wrap up misc-insn-3 and vec-enh-2 support Wrap up support for the miscellaneous-instruction-extensions facility 3 and the vector-enhancements facility 2: Add 'case' statements for the remaining unhandled arch13 instructions to 'guest_s390_toIR.c', document the new support in 's390-opcodes.csv', adjust 's390-check-opcodes.pl', and announce the new feature in 'NEWS'. --- diff --git a/NEWS b/NEWS index 2fe96269fb..66a4b8d8bc 100644 --- a/NEWS +++ b/NEWS @@ -15,6 +15,10 @@ support for X86/macOS 10.13, AMD64/macOS 10.13 and nanoMIPS/Linux. * s390: + - Support the miscellaneous-instruction-extensions facility 3 and the + vector-enhancements facility 2. This enables programs compiled with + "-march=arch13" or "-march=z15" to be executed under Valgrind. + * ppc64: - ISA 3.1 support is now complete @@ -47,6 +51,7 @@ are not entered into bugzilla tend to get forgotten about or ignored. have debug information 439590 glibc-2.34 breaks suppressions against obj:*/lib*/libc-2.*so* 440670 unhandled ppc64le-linux syscall: 252 (statfs64) and 253 (fstatfs64) +432387 s390x: z15 instructions support To see details of a given bug, visit https://bugs.kde.org/show_bug.cgi?id=XXXXXX diff --git a/VEX/priv/guest_s390_toIR.c b/VEX/priv/guest_s390_toIR.c index 46a867475c..1bd18f7602 100644 --- a/VEX/priv/guest_s390_toIR.c +++ b/VEX/priv/guest_s390_toIR.c @@ -8,7 +8,7 @@ This file is part of Valgrind, a dynamic binary instrumentation framework. - Copyright IBM Corp. 2010-2020 + Copyright IBM Corp. 2010-2021 This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as @@ -20503,6 +20503,9 @@ s390_decode_4byte_and_irgen(const UChar *bytes) RRE_r2(ovl)); goto ok; case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, RRE_r1(ovl), RRE_r2(ovl)); goto ok; + case 0xb938: /* SORTL */ goto unimplemented; + case 0xb939: /* DFLTCC */ goto unimplemented; + case 0xb93a: /* KDSA */ goto unimplemented; case 0xb93c: s390_format_RRE_RR(s390_irgen_PPNO, RRE_r1(ovl), RRE_r2(ovl)); goto ok; case 0xb93e: /* KIMD */ goto unimplemented; diff --git a/auxprogs/s390-check-opcodes.pl b/auxprogs/s390-check-opcodes.pl index b3c1c9bdb3..515ff9a71a 100755 --- a/auxprogs/s390-check-opcodes.pl +++ b/auxprogs/s390-check-opcodes.pl @@ -28,19 +28,32 @@ my %csv_implemented = (); my %toir_implemented = (); my %toir_decoded = (); my %known_arch = map {($_ => 1)} - qw(g5 z900 z990 z9-109 z9-ec z10 z196 zEC12 z13 arch12); + qw(g5 z900 z990 z9-109 z9-ec z10 z196 zEC12 z13 arch12 arch13); # Patterns for identifying certain extended mnemonics that shall be # skipped in "s390-opc.txt" and "s390-opcodes.csv". my @extended_mnemonics = ( "bi", # extended mnemonic for bic + 'brul?', + 'jasl?', + 'jctg?', + 'jg?nop', + 'jxleg?', + 'jxhg?', + 'l[de]rv', + 'risbgn?z', + 'st[de]rv', "va[bhfgq]", "vacc[bhfgq]", "vacccq", "vacq", "vavgl*[bhfg]", "vcdl*gb", + 'vcfp[sl]', + '[vw]cel?fb', + 'vc[sl]fp', + '[vw]cl?feb', "vceq[bhfg]s*", "vchl*[bhfg]s*", "vcl*gdb", @@ -77,10 +90,14 @@ my @extended_mnemonics = ( "vgfma*[bhfg]", "vgm[bhfg]", "vistr[bhfg]s*", + 'vlbr[hfgq]', + 'vlbrrep[hfg]', "vlc[bhfg]", "[vw]ldeb", "[vw]ledb", + 'vler[hfg]', "vlgv[bhfg]", + 'vllebrz[hfge]', "vllez[bhfg]", "vllezlf", "vlp[bhfg]", @@ -105,7 +122,10 @@ my @extended_mnemonics = ( "vsbiq", "vscbi[bhfgq]", "vseg[bfh]", + 'vstbr[hfgq]', + 'vster[hfg]', "vstrcz*[bhf]s*", + 'vstrsz?[bhf]', "vsum(b|gh|gf|h|qf|qg)", "vuplh[bhf]", "vuph[bhf]", diff --git a/docs/internals/s390-opcodes.csv b/docs/internals/s390-opcodes.csv index fc7ff86bf8..cd0b4b375e 100644 --- a/docs/internals/s390-opcodes.csv +++ b/docs/internals/s390-opcodes.csv @@ -903,7 +903,7 @@ srk,"subtract 3 operands 32 bit",implemented, sgrk,"subtract 3 operands 64 bit",implemented, slrk,"subtract logical 3 operands 32 bit",implemented, slgrk,"subtract logical 3 operands 64 bit",implemented, -popcnt,"population count","implemented", +popcnt,"population count",implemented,"z196/arch13" rrbm,"reset reference bits multiple",N/A,"privileged instruction" cefbra,"convert from 32 bit fixed to short bfp with rounding mode",implemented, cdfbra,"convert from 32 bit fixed to long bfp with rounding mode",implemented, @@ -1650,8 +1650,8 @@ vstrlr,"vector store rightmost with length",implemented,arch12 vstrl,"vector store rightmost with immediate length",implemented,arch12 vap,"vector add decimal","not implemented","arch12" vcp,"vector compare decimal","not implemented","arch12" -vcvb,"vector convert to binary 32 bit","not implemented","arch12" -vcvbg,"vector convert to binary 64 bit","not implemented","arch12" +vcvb,"vector convert to binary 32 bit","not implemented","arch12/arch13" +vcvbg,"vector convert to binary 64 bit","not implemented","arch12/arch13" vcvd,"vector convert to decimal 32 bit","not implemented","arch12" vcvdg,"vector convert to decimal 64 bit","not implemented","arch12" vdp,"vector divide decimal","not implemented","arch12" @@ -1671,3 +1671,78 @@ llgfsg,"load logical and shift guarded 64 bit","not implemented","arch12" lgsc,"load guarded storage controls","not implemented","arch12" stgsc,"store guarded storage controls","not implemented","arch12" kma,"cipher message with galois counter mode","not implemented","arch12" +ncrk,"and with complement 32 bit",implemented,arch13 +ncgrk,"and with complement 64 bit",implemented,arch13 +mvcrl,"move right to left",implemented,arch13 +nnrk,"nand 32 bit",implemented,arch13 +nngrk,"nand 64 bit",implemented,arch13 +nork,"nor 32 bit",implemented,arch13 +nogrk,"nor 64 bit",implemented,arch13 +nxrk,"not exclusive or 32 bit",implemented,arch13 +nxgrk,"not exclusive or 64 bit",implemented,arch13 +ocrk,"or with complement 32 bit",implemented,arch13 +ocgrk,"or with complement 64 bit",implemented,arch13 +selr,"select 32 bit",implemented,arch13 +selgr,"select 64 bit",implemented,arch13 +selfhr,"select high",implemented,arch13 +vlbr,"vector load byte reversed elements",implemented,arch13 +vlbrh,"vector load byte reversed halfword elements",implemented,arch13 +vlbrf,"vector load byte reversed word elements",implemented,arch13 +vlbrg,"vector load byte reversed doubleword elements",implemented,arch13 +vlbrq,"vector load byte reversed quadword elements",implemented,arch13 +vler,"vector load elements reversed",implemented,arch13 +vlerh,"vector load halfword elements reversed",implemented,arch13 +vlerf,"vector load word elements reversed",implemented,arch13 +vlerg,"vector load doubleword elements reversed",implemented,arch13 +vllebrz,"vector load byte reversed element and zero",implemented,arch13 +vllebrzh,"vector load byte reversed halfword element and zero",implemented,arch13 +vllebrzf,"vector load byte reversed word element and zero",implemented,arch13 +ldrv,"load byte reversed doubleword",implemented,arch13 +vllebrzg,"vector load byte reversed doubleword element and zero",implemented,arch13 +lerv,"load byte reversed word",implemented,arch13 +vllebrze,"vector load byte reversed word element left-aligned and zero",implemented,arch13 +vlebrh,"vector load byte reversed halfword element",implemented,arch13 +vlebrf,"vector load byte reversed word element",implemented,arch13 +vlebrg,"vector load byte reversed doubleword element",implemented,arch13 +vlbrrep,"vector load byte reversed element and replicate",implemented,arch13 +vlbrreph,"vector load byte reversed halfword element and replicate",implemented,arch13 +vlbrrepf,"vector load byte reversed word element and replicate",implemented,arch13 +vlbrrepg,"vector load byte reversed doubleword element and replicate",implemented,arch13 +vstbr,"vector store byte reversed elements",implemented,arch13 +vstbrh,"vector store byte reversed halfword elements",implemented,arch13 +vstbrf,"vector store byte reversed word elements",implemented,arch13 +vstbrg,"vector store byte reversed doubleword elements",implemented,arch13 +vstbrq,"vector store byte reversed quadword elements",implemented,arch13 +vster,"vector store elements reversed",implemented,arch13 +vsterh,"vector store halfword elements reversed",implemented,arch13 +vsterf,"vector store word elements reversed",implemented,arch13 +vsterg,"vector store doubleword elements reversed",implemented,arch13 +vstebrh,"vector store byte reversed halfword element",implemented,arch13 +vstebrf,"vector store byte reversed word element",implemented,arch13 +sterv,"store byte reversed word",implemented,arch13 +vstebrg,"vector store byte reversed doubleword element",implemented,arch13 +stdrv,"store byte reversed doubleword",implemented,arch13 +vsld,"vector shift left double by bit",implemented,arch13 +vsrd,"vector shift right double by bit",implemented,arch13 +vstrs,"vector string search",implemented,arch13 +vstrsb,"vector string search byte",implemented,arch13 +vstrsh,"vector string search halfword",implemented,arch13 +vstrsf,"vector string search word",implemented,arch13 +vstrszb,"vector string search byte zero",implemented,arch13 +vstrszh,"vector string search halfword zero",implemented,arch13 +vstrszf,"vector string search word zero",implemented,arch13 +vcfps,"vector fp convert from fixed",implemented,arch13 +vcefb,"vector fp convert from fixed 32 bit",implemented,arch13 +wcefb,"vector fp convert from fixed 32 bit",implemented,arch13 +vcfpl,"vector fp convert from logical",implemented,arch13 +vcelfb,"vector fp convert from logical 32 bit",implemented,arch13 +wcelfb,"vector fp convert from logical 32 bit",implemented,arch13 +vcsfp,"vector fp convert to fixed",implemented,arch13 +vcfeb,"vector fp convert to fixed 32 bit",implemented,arch13 +wcfeb,"vector fp convert to fixed 32 bit",implemented,arch13 +vclfp,"vector fp convert to logical",implemented,arch13 +vclfeb,"vector fp convert to logical 32 bit",implemented,arch13 +wclfeb,"vector fp convert to logical 32 bit",implemented,arch13 +dfltcc,"deflate conversion call","not implemented",arch13 +sortl,"sort lists","not implemented",arch13 +kdsa,"compute digital signature authentication","not implemented",arch13