From: Kenneth Feng <kenneth.feng@amd.com>
Date: Wed, 6 Sep 2023 06:07:58 +0000 (+0800)
Subject: drm/amd/amdgpu: workaround for the imu fw loading
X-Git-Tag: v6.11-rc1~141^2~25^2~434
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=1e740df77f5d4dfa75e1ca21b7ca3ebc1a907421;p=thirdparty%2Fkernel%2Flinux.git

drm/amd/amdgpu: workaround for the imu fw loading

workaournd for the imu fw loading on gfx 12.0 without psp

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/amdgpu/imu_v12_0.c b/drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
index be140ee4d9173..7112e4b2d6489 100644
--- a/drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
@@ -143,6 +143,11 @@ static void imu_v12_0_setup(struct amdgpu_device *adev)
 		imu_reg_val = RREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_16);
 		imu_reg_val |= 0x1;
 		WREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_16, imu_reg_val);
+
+		imu_reg_val = RREG32_SOC15(GC, 0, regGFX_IMU_SCRATCH_10);
+		imu_reg_val |= 0x20010007;
+		WREG32_SOC15(GC, 0, regGFX_IMU_SCRATCH_10, imu_reg_val);
+
 	}
 }