From: Hrushikesh Salunke Date: Fri, 17 Oct 2025 08:46:52 +0000 (+0530) Subject: arm64: dts: ti: k3-j784s4-evm-pcie0-pcie1-ep: Add boot phase tag to "pcie1_ep" X-Git-Tag: v6.19-rc1~100^2~18^2~22 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=1f03b9e71e49a2f903c914f12ca5068995d916d7;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: ti: k3-j784s4-evm-pcie0-pcie1-ep: Add boot phase tag to "pcie1_ep" J784S4 SoC has two instances of PCIe which are PCIe0 and PCIe1. J784S4 SoC uses PCIe1 instance for PCIe boot process. So it needs to be in endpoint mode and it needs to be functional at all stages of PCIe boot process. Thus add the "bootph-all" boot phase tag to "pcie1_ep" device tree node. Signed-off-by: Hrushikesh Salunke Link: https://patch.msgid.link/20251017084654.2929945-2-h-salunke@ti.com Signed-off-by: Vignesh Raghavendra --- diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm-pcie0-pcie1-ep.dtso b/arch/arm64/boot/dts/ti/k3-j784s4-evm-pcie0-pcie1-ep.dtso index 685305092bd88..22533d678f79c 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm-pcie0-pcie1-ep.dtso +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm-pcie0-pcie1-ep.dtso @@ -75,5 +75,6 @@ dma-coherent; phys = <&serdes0_pcie1_link>; phy-names = "pcie-phy"; + bootph-all; }; };