From: Andrea Corallo Date: Mon, 10 Oct 2022 09:59:58 +0000 (+0200) Subject: arm: improve tests and fix vcmp* X-Git-Tag: basepoints/gcc-14~2883 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=1fa5a44736062eeccd241ebeb1771bd77b7fd168;p=thirdparty%2Fgcc.git arm: improve tests and fix vcmp* gcc/ChangeLog: * config/arm/mve.md (@mve_vcmpq_): Fix spacing. * config/arm/arm_mve.h (__arm_vcmpgtq_m, __arm_vcmpleq_m) (__arm_vcmpltq_m, __arm_vcmpneq_m): Add missing defines. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c: Improve test. * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmphiq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_u8.c: Likewise. --- diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h index 073e3711623b..684f997520f4 100644 --- a/gcc/config/arm/arm_mve.h +++ b/gcc/config/arm/arm_mve.h @@ -39229,6 +39229,53 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));}) + +#define __arm_vcmpgtq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ + __typeof(p1) __p1 = (p1); \ + _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));}) + +#define __arm_vcmpleq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ + __typeof(p1) __p1 = (p1); \ + _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpleq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpleq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));}) + +#define __arm_vcmpltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ + __typeof(p1) __p1 = (p1); \ + _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));}) + +#define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ + __typeof(p1) __p1 = (p1); \ + _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpneq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ + int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \ + int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2));}) + #define __arm_vdupq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 6d5270281eca..3330a220aeae 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -831,7 +831,7 @@ (match_operand:MVE_2 2 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE" - "vcmp.%# , %q1, %q2" + "vcmp.%#\t, %q1, %q2" [(set_attr "type" "mve_move") ]) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c index a1640133012a..de9fe5e7d01b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint16x8_t a, uint16_t b, mve_pred16_t p) { return vcmpcsq_m_n_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p) { return vcmpcsq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint16x8_t a, mve_pred16_t p) +{ + return vcmpcsq_m (a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c index d269ec7e3ab5..04df1b2dc61d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32x4_t a, uint32_t b, mve_pred16_t p) { return vcmpcsq_m_n_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p) { return vcmpcsq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint32x4_t a, mve_pred16_t p) +{ + return vcmpcsq_m (a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c index 52c16b3e70f3..34ebadca2488 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint8x16_t a, uint8_t b, mve_pred16_t p) { return vcmpcsq_m_n_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p) { return vcmpcsq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint8x16_t a, mve_pred16_t p) +{ + return vcmpcsq_m (a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c index e68afa316a9c..bc03bf687deb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u16 cs, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vcmpcsq_m_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u16 cs, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vcmpcsq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c index 05d1b21b2794..8e216d49a023 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u32 cs, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vcmpcsq_m_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u32 cs, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vcmpcsq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c index 4c8a9d0aa2c2..ac4196a2e484 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u8 cs, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vcmpcsq_m_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u8 cs, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vcmpcsq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c index 4124036003ef..6038f4c8c65f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint16x8_t a, uint16_t b) { return vcmpcsq_n_u16 (a, b); } -/* { dg-final { scan-assembler "vcmp.u16" } } */ +/* +**foo1: +** ... +** vcmp.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint16x8_t a, uint16_t b) { return vcmpcsq (a, b); } -/* { dg-final { scan-assembler "vcmp.u16" } } */ +/* +**foo2: +** ... +** vcmp.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint16x8_t a) +{ + return vcmpcsq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c index 463c1ee12b41..9f39aa761c8f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32x4_t a, uint32_t b) { return vcmpcsq_n_u32 (a, b); } -/* { dg-final { scan-assembler "vcmp.u32" } } */ +/* +**foo1: +** ... +** vcmp.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint32x4_t a, uint32_t b) { return vcmpcsq (a, b); } -/* { dg-final { scan-assembler "vcmp.u32" } } */ +/* +**foo2: +** ... +** vcmp.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint32x4_t a) +{ + return vcmpcsq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c index 92bc44a4bb6e..0ce2cd13a7bd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint8x16_t a, uint8_t b) { return vcmpcsq_n_u8 (a, b); } -/* { dg-final { scan-assembler "vcmp.u8" } } */ +/* +**foo1: +** ... +** vcmp.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint8x16_t a, uint8_t b) { return vcmpcsq (a, b); } -/* { dg-final { scan-assembler "vcmp.u8" } } */ +/* +**foo2: +** ... +** vcmp.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint8x16_t a) +{ + return vcmpcsq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c index 26c7d750cef5..5598d06875ca 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.u16 cs, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint16x8_t a, uint16x8_t b) { return vcmpcsq_u16 (a, b); } -/* { dg-final { scan-assembler "vcmp.u16" } } */ +/* +**foo1: +** ... +** vcmp.u16 cs, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint16x8_t a, uint16x8_t b) { return vcmpcsq (a, b); } -/* { dg-final { scan-assembler "vcmp.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c index c91b0e1c2e3c..99b232b05dd9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.u32 cs, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32x4_t a, uint32x4_t b) { return vcmpcsq_u32 (a, b); } -/* { dg-final { scan-assembler "vcmp.u32" } } */ +/* +**foo1: +** ... +** vcmp.u32 cs, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint32x4_t a, uint32x4_t b) { return vcmpcsq (a, b); } -/* { dg-final { scan-assembler "vcmp.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c index 51ddab91500e..571e57135ab4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.u8 cs, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint8x16_t a, uint8x16_t b) { return vcmpcsq_u8 (a, b); } -/* { dg-final { scan-assembler "vcmp.u8" } } */ +/* +**foo1: +** ... +** vcmp.u8 cs, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint8x16_t a, uint8x16_t b) { return vcmpcsq (a, b); } -/* { dg-final { scan-assembler "vcmp.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c index 556351f49843..57b276a1d4c2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f16 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16x8_t b) { return vcmpeqq_f16 (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo1: +** ... +** vcmp.f16 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16x8_t b) { return vcmpeqq (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c index 65b2f240520b..ab1b25e28883 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f32 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32x4_t b) { return vcmpeqq_f32 (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo1: +** ... +** vcmp.f32 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32x4_t b) { return vcmpeqq (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c index 91b0ffa0afd6..c5587884d0ec 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcmpeqq_m_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcmpeqq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c index d66e9c8be348..4e9675fff51a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcmpeqq_m_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcmpeqq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c index 46b3f4499d39..a3cae828e792 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16_t b, mve_pred16_t p) { return vcmpeqq_m_n_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16_t b, mve_pred16_t p) { return vcmpeqq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float16x8_t a, mve_pred16_t p) +{ + return vcmpeqq_m (a, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c index 7d672c129db2..a7ce9e0c7e32 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32_t b, mve_pred16_t p) { return vcmpeqq_m_n_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32_t b, mve_pred16_t p) { return vcmpeqq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float32x4_t a, mve_pred16_t p) +{ + return vcmpeqq_m (a, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c index 912d4ad893de..7ba481e169fa 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16_t b, mve_pred16_t p) { return vcmpeqq_m_n_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16_t b, mve_pred16_t p) { return vcmpeqq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c index 947c331622da..13c88eaabb58 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32_t b, mve_pred16_t p) { return vcmpeqq_m_n_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32_t b, mve_pred16_t p) { return vcmpeqq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c index e215d655ea23..dcf276dee44e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8_t b, mve_pred16_t p) { return vcmpeqq_m_n_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8_t b, mve_pred16_t p) { return vcmpeqq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c index ea4716c450eb..d59d5149a30c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint16x8_t a, uint16_t b, mve_pred16_t p) { return vcmpeqq_m_n_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p) { return vcmpeqq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint16x8_t a, mve_pred16_t p) +{ + return vcmpeqq_m (a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c index 489c6ec0cb38..1fbf385d030a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32x4_t a, uint32_t b, mve_pred16_t p) { return vcmpeqq_m_n_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p) { return vcmpeqq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint32x4_t a, mve_pred16_t p) +{ + return vcmpeqq_m (a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c index e8dfce432d1f..92758c98c9af 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint8x16_t a, uint8_t b, mve_pred16_t p) { return vcmpeqq_m_n_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p) { return vcmpeqq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint8x16_t a, mve_pred16_t p) +{ + return vcmpeqq_m (a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c index 7e4c141e5d22..1ea35ed924bf 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcmpeqq_m_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcmpeqq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c index 904cfb6fe37d..a9bc97338425 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcmpeqq_m_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcmpeqq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c index a7e12164e323..a9fe771a101d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcmpeqq_m_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcmpeqq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c index 283e1fd036e1..826901874d7a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vcmpeqq_m_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vcmpeqq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c index ad1739bd6099..512b7f9c889b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vcmpeqq_m_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vcmpeqq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c index 595142e9cdaf..01b4507ba632 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vcmpeqq_m_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vcmpeqq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c index f97209d23222..cf2812558ffd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16_t b) { return vcmpeqq_n_f16 (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo1: +** ... +** vcmp.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16_t b) { return vcmpeqq (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo2: +** ... +** vcmp.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float16x8_t a) +{ + return vcmpeqq (a, 1.1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c index c80843288b2a..138171742824 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32_t b) { return vcmpeqq_n_f32 (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo1: +** ... +** vcmp.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32_t b) { return vcmpeqq (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo2: +** ... +** vcmp.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float32x4_t a) +{ + return vcmpeqq (a, 1.1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c index 69f1f531af4c..bd29828492e5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16_t b) { return vcmpeqq_n_s16 (a, b); } -/* { dg-final { scan-assembler "vcmp.i16" } } */ +/* +**foo1: +** ... +** vcmp.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16_t b) { return vcmpeqq (a, b); } -/* { dg-final { scan-assembler "vcmp.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c index 06032dbcc203..2a0d84e9b510 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32_t b) { return vcmpeqq_n_s32 (a, b); } -/* { dg-final { scan-assembler "vcmp.i32" } } */ +/* +**foo1: +** ... +** vcmp.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32_t b) { return vcmpeqq (a, b); } -/* { dg-final { scan-assembler "vcmp.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c index 3ebd88be85be..524bbe9f3cba 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8_t b) { return vcmpeqq_n_s8 (a, b); } -/* { dg-final { scan-assembler "vcmp.i8" } } */ +/* +**foo1: +** ... +** vcmp.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8_t b) { return vcmpeqq (a, b); } -/* { dg-final { scan-assembler "vcmp.i8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c index 2f6c53a525e5..3eeaa49aa971 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint16x8_t a, uint16_t b) { return vcmpeqq_n_u16 (a, b); } -/* { dg-final { scan-assembler "vcmp.i16" } } */ +/* +**foo1: +** ... +** vcmp.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint16x8_t a, uint16_t b) { return vcmpeqq (a, b); } -/* { dg-final { scan-assembler "vcmp.i16" } } */ +/* +**foo2: +** ... +** vcmp.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint16x8_t a) +{ + return vcmpeqq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c index 22fb5be97c57..a881bb841af2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32x4_t a, uint32_t b) { return vcmpeqq_n_u32 (a, b); } -/* { dg-final { scan-assembler "vcmp.i32" } } */ +/* +**foo1: +** ... +** vcmp.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint32x4_t a, uint32_t b) { return vcmpeqq (a, b); } -/* { dg-final { scan-assembler "vcmp.i32" } } */ +/* +**foo2: +** ... +** vcmp.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint32x4_t a) +{ + return vcmpeqq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c index 79eaeed69501..429b2e35eb7a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint8x16_t a, uint8_t b) { return vcmpeqq_n_u8 (a, b); } -/* { dg-final { scan-assembler "vcmp.i8" } } */ +/* +**foo1: +** ... +** vcmp.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint8x16_t a, uint8_t b) { return vcmpeqq (a, b); } -/* { dg-final { scan-assembler "vcmp.i8" } } */ +/* +**foo2: +** ... +** vcmp.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint8x16_t a) +{ + return vcmpeqq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c index 7951ead8a31a..92a87c087737 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i16 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16x8_t b) { return vcmpeqq_s16 (a, b); } -/* { dg-final { scan-assembler "vcmp.i16" } } */ +/* +**foo1: +** ... +** vcmp.i16 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16x8_t b) { return vcmpeqq (a, b); } -/* { dg-final { scan-assembler "vcmp.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c index 659ccb4ac144..d3b87d59bfad 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i32 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32x4_t b) { return vcmpeqq_s32 (a, b); } -/* { dg-final { scan-assembler "vcmp.i32" } } */ +/* +**foo1: +** ... +** vcmp.i32 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32x4_t b) { return vcmpeqq (a, b); } -/* { dg-final { scan-assembler "vcmp.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c index 9282ec2a97a7..2b71bbf75f61 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i8 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8x16_t b) { return vcmpeqq_s8 (a, b); } -/* { dg-final { scan-assembler "vcmp.i8" } } */ +/* +**foo1: +** ... +** vcmp.i8 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8x16_t b) { return vcmpeqq (a, b); } -/* { dg-final { scan-assembler "vcmp.i8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c index 318b7aa93061..1830b667bb62 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i16 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint16x8_t a, uint16x8_t b) { return vcmpeqq_u16 (a, b); } -/* { dg-final { scan-assembler "vcmp.i16" } } */ +/* +**foo1: +** ... +** vcmp.i16 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint16x8_t a, uint16x8_t b) { return vcmpeqq (a, b); } -/* { dg-final { scan-assembler "vcmp.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c index 88e015f1fa34..2b2a5f920f35 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i32 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32x4_t a, uint32x4_t b) { return vcmpeqq_u32 (a, b); } -/* { dg-final { scan-assembler "vcmp.i32" } } */ +/* +**foo1: +** ... +** vcmp.i32 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint32x4_t a, uint32x4_t b) { return vcmpeqq (a, b); } -/* { dg-final { scan-assembler "vcmp.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c index 990a96f7b3f5..9450c2033940 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i8 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint8x16_t a, uint8x16_t b) { return vcmpeqq_u8 (a, b); } -/* { dg-final { scan-assembler "vcmp.i8" } } */ +/* +**foo1: +** ... +** vcmp.i8 eq, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint8x16_t a, uint8x16_t b) { return vcmpeqq (a, b); } -/* { dg-final { scan-assembler "vcmp.i8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c index eea63a2fe506..fd8bcab4f252 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f16 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16x8_t b) { return vcmpgeq_f16 (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo1: +** ... +** vcmp.f16 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16x8_t b) { return vcmpgeq (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c index 64243fe3e8c2..a2d50b580e74 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f32 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32x4_t b) { return vcmpgeq_f32 (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo1: +** ... +** vcmp.f32 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32x4_t b) { return vcmpgeq (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c index 3588b0a536f0..a631825fadd2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcmpgeq_m_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcmpgeq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c index 8ed1d22e9197..b94e0738ef04 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcmpgeq_m_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcmpgeq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c index d106af8f53b3..9f4903d9cfd1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16_t b, mve_pred16_t p) { return vcmpgeq_m_n_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16_t b, mve_pred16_t p) { return vcmpgeq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float16x8_t a, mve_pred16_t p) +{ + return vcmpgeq_m (a, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c index 1feef8adb7ff..679e644f1653 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32_t b, mve_pred16_t p) { return vcmpgeq_m_n_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32_t b, mve_pred16_t p) { return vcmpgeq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float32x4_t a, mve_pred16_t p) +{ + return vcmpgeq_m (a, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c index c0ad38f6c6f9..45e26d0a77b0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16_t b, mve_pred16_t p) { return vcmpgeq_m_n_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16_t b, mve_pred16_t p) { return vcmpgeq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c index 8974ce4d11ae..3a6cad921f26 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32_t b, mve_pred16_t p) { return vcmpgeq_m_n_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32_t b, mve_pred16_t p) { return vcmpgeq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c index 981aa1b516c0..ce1ca30d6eaa 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s8 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8_t b, mve_pred16_t p) { return vcmpgeq_m_n_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s8 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8_t b, mve_pred16_t p) { return vcmpgeq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c index 587432a6af15..51587a38b72d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s16 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcmpgeq_m_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s16 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcmpgeq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c index e460a8dcafcb..3ff0aaaa4148 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s32 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcmpgeq_m_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s32 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcmpgeq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c index cde28a314b98..df71ee579454 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s8 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcmpgeq_m_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s8 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcmpgeq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c index 907fa5d50f66..2ca1b9d6684e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16_t b) { return vcmpgeq_n_f16 (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo1: +** ... +** vcmp.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16_t b) { return vcmpgeq (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo2: +** ... +** vcmp.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float16x8_t a) +{ + return vcmpgeq (a, 1.1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c index e4d1406c049f..3af110bd2b2a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32_t b) { return vcmpgeq_n_f32 (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo1: +** ... +** vcmp.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32_t b) { return vcmpgeq (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo2: +** ... +** vcmp.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float32x4_t a) +{ + return vcmpgeq (a, 1.1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c index f4aad09e7834..3c1af8a93ab1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16_t b) { return vcmpgeq_n_s16 (a, b); } -/* { dg-final { scan-assembler "vcmp.s16" } } */ +/* +**foo1: +** ... +** vcmp.s16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16_t b) { return vcmpgeq (a, b); } -/* { dg-final { scan-assembler "vcmp.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c index 2baa5204819f..8b4e0f426e5d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32_t b) { return vcmpgeq_n_s32 (a, b); } -/* { dg-final { scan-assembler "vcmp.s32" } } */ +/* +**foo1: +** ... +** vcmp.s32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32_t b) { return vcmpgeq (a, b); } -/* { dg-final { scan-assembler "vcmp.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c index 1dcffcc3050a..c1669bcdd904 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s8 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8_t b) { return vcmpgeq_n_s8 (a, b); } -/* { dg-final { scan-assembler "vcmp.s8" } } */ +/* +**foo1: +** ... +** vcmp.s8 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8_t b) { return vcmpgeq (a, b); } -/* { dg-final { scan-assembler "vcmp.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c index 817ffb2d8ac0..593c7410dcb9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s16 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16x8_t b) { return vcmpgeq_s16 (a, b); } -/* { dg-final { scan-assembler "vcmp.s16" } } */ +/* +**foo1: +** ... +** vcmp.s16 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16x8_t b) { return vcmpgeq (a, b); } -/* { dg-final { scan-assembler "vcmp.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c index d608b7fc9cf8..9e26ea9938ad 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s32 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32x4_t b) { return vcmpgeq_s32 (a, b); } -/* { dg-final { scan-assembler "vcmp.s32" } } */ +/* +**foo1: +** ... +** vcmp.s32 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32x4_t b) { return vcmpgeq (a, b); } -/* { dg-final { scan-assembler "vcmp.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c index 506e6cede951..3cb2832e1592 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s8 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8x16_t b) { return vcmpgeq_s8 (a, b); } -/* { dg-final { scan-assembler "vcmp.s8" } } */ +/* +**foo1: +** ... +** vcmp.s8 ge, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8x16_t b) { return vcmpgeq (a, b); } -/* { dg-final { scan-assembler "vcmp.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c index e2bfd7ed156c..8835fe08dba8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f16 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16x8_t b) { return vcmpgtq_f16 (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo1: +** ... +** vcmp.f16 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16x8_t b) { return vcmpgtq (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c index 1b4433f0e763..e14708847089 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f32 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32x4_t b) { return vcmpgtq_f32 (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo1: +** ... +** vcmp.f32 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32x4_t b) { return vcmpgtq (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c index def3f90a79d5..cb9d5f4036fd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcmpgtq_m_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcmpgtq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c index 41a11563f365..b249b831782b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcmpgtq_m_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcmpgtq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c index 80c86f65825b..b375983f01e2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16_t b, mve_pred16_t p) { return vcmpgtq_m_n_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16_t b, mve_pred16_t p) { return vcmpgtq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float16x8_t a, mve_pred16_t p) +{ + return vcmpgtq_m (a, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c index 9b7aaadfe71b..208a285cb393 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32_t b, mve_pred16_t p) { return vcmpgtq_m_n_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32_t b, mve_pred16_t p) { return vcmpgtq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float32x4_t a, mve_pred16_t p) +{ + return vcmpgtq_m (a, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c index c0719d0110ca..248e3093d2a5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16_t b, mve_pred16_t p) { return vcmpgtq_m_n_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16_t b, mve_pred16_t p) { return vcmpgtq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c index 26df8cea9fc6..9843288296ea 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32_t b, mve_pred16_t p) { return vcmpgtq_m_n_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32_t b, mve_pred16_t p) { return vcmpgtq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c index f20c50d69c15..80f1aa9ead08 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s8 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8_t b, mve_pred16_t p) { return vcmpgtq_m_n_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s8 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8_t b, mve_pred16_t p) { return vcmpgtq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c index da97abceb2e1..9289c00b5afe 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s16 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcmpgtq_m_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s16 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcmpgtq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c index ab7c218c7af2..8a3d7606bb73 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s32 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcmpgtq_m_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s32 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcmpgtq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c index 13520d1067bb..2760795eb860 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s8 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcmpgtq_m_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s8 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcmpgtq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c index 98e152cd9991..9f2a4be319a2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16_t b) { return vcmpgtq_n_f16 (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo1: +** ... +** vcmp.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16_t b) { return vcmpgtq (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo2: +** ... +** vcmp.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float16x8_t a) +{ + return vcmpgtq (a, 1.1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c index 5691e2f9d355..bbf18ebe6e7c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32_t b) { return vcmpgtq_n_f32 (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo1: +** ... +** vcmp.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32_t b) { return vcmpgtq (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo2: +** ... +** vcmp.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float32x4_t a) +{ + return vcmpgtq (a, 1.1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c index bc3bdbae2da6..d833cb6f58e9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16_t b) { return vcmpgtq_n_s16 (a, b); } -/* { dg-final { scan-assembler "vcmp.s16" } } */ +/* +**foo1: +** ... +** vcmp.s16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16_t b) { return vcmpgtq (a, b); } -/* { dg-final { scan-assembler "vcmp.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c index 409a3f9d808b..28cd51b95829 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32_t b) { return vcmpgtq_n_s32 (a, b); } -/* { dg-final { scan-assembler "vcmp.s32" } } */ +/* +**foo1: +** ... +** vcmp.s32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32_t b) { return vcmpgtq (a, b); } -/* { dg-final { scan-assembler "vcmp.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c index 2624307be9db..5a953ca55f42 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s8 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8_t b) { return vcmpgtq_n_s8 (a, b); } -/* { dg-final { scan-assembler "vcmp.s8" } } */ +/* +**foo1: +** ... +** vcmp.s8 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8_t b) { return vcmpgtq (a, b); } -/* { dg-final { scan-assembler "vcmp.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c index be19e19f09f1..b9c9da486f5b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s16 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16x8_t b) { return vcmpgtq_s16 (a, b); } -/* { dg-final { scan-assembler "vcmp.s16" } } */ +/* +**foo1: +** ... +** vcmp.s16 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16x8_t b) { return vcmpgtq (a, b); } -/* { dg-final { scan-assembler "vcmp.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c index 95f6c703b9d1..0f79385358e5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s32 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32x4_t b) { return vcmpgtq_s32 (a, b); } -/* { dg-final { scan-assembler "vcmp.s32" } } */ +/* +**foo1: +** ... +** vcmp.s32 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32x4_t b) { return vcmpgtq (a, b); } -/* { dg-final { scan-assembler "vcmp.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c index 8ba180d8e39e..f59dad94a57f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s8 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8x16_t b) { return vcmpgtq_s8 (a, b); } -/* { dg-final { scan-assembler "vcmp.s8" } } */ +/* +**foo1: +** ... +** vcmp.s8 gt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8x16_t b) { return vcmpgtq (a, b); } -/* { dg-final { scan-assembler "vcmp.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c index 26e5fe3f900d..136a2e44259d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint16x8_t a, uint16_t b, mve_pred16_t p) { return vcmphiq_m_n_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p) { return vcmphiq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint16x8_t a, mve_pred16_t p) +{ + return vcmphiq_m (a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c index 51396b8d0cde..5640b97afafa 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32x4_t a, uint32_t b, mve_pred16_t p) { return vcmphiq_m_n_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p) { return vcmphiq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint32x4_t a, mve_pred16_t p) +{ + return vcmphiq_m (a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c index 475f2e823459..e6474e454871 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint8x16_t a, uint8_t b, mve_pred16_t p) { return vcmphiq_m_n_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p) { return vcmphiq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint8x16_t a, mve_pred16_t p) +{ + return vcmphiq_m (a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c index 98ba895fde05..38b9b90c8030 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u16 hi, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vcmphiq_m_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u16 hi, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vcmphiq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c index ee561b02d0c4..97c8c1dfe05b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u32 hi, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vcmphiq_m_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u32 hi, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vcmphiq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c index 0c5b29e26736..e2024ccda25c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u8 hi, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vcmphiq_m_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.u8 hi, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vcmphiq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c index d39b755441d6..36107fc7b8d4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint16x8_t a, uint16_t b) { return vcmphiq_n_u16 (a, b); } -/* { dg-final { scan-assembler "vcmp.u16" } } */ +/* +**foo1: +** ... +** vcmp.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint16x8_t a, uint16_t b) { return vcmphiq (a, b); } -/* { dg-final { scan-assembler "vcmp.u16" } } */ +/* +**foo2: +** ... +** vcmp.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint16x8_t a) +{ + return vcmphiq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c index dbedea9b0787..d34de8f65c7d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32x4_t a, uint32_t b) { return vcmphiq_n_u32 (a, b); } -/* { dg-final { scan-assembler "vcmp.u32" } } */ +/* +**foo1: +** ... +** vcmp.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint32x4_t a, uint32_t b) { return vcmphiq (a, b); } -/* { dg-final { scan-assembler "vcmp.u32" } } */ +/* +**foo2: +** ... +** vcmp.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint32x4_t a) +{ + return vcmphiq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c index 967bb206886b..93a05b1a8570 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint8x16_t a, uint8_t b) { return vcmphiq_n_u8 (a, b); } -/* { dg-final { scan-assembler "vcmp.u8" } } */ +/* +**foo1: +** ... +** vcmp.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint8x16_t a, uint8_t b) { return vcmphiq (a, b); } -/* { dg-final { scan-assembler "vcmp.u8" } } */ +/* +**foo2: +** ... +** vcmp.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint8x16_t a) +{ + return vcmphiq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c index f9399498a993..40e65dc52f43 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.u16 hi, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint16x8_t a, uint16x8_t b) { return vcmphiq_u16 (a, b); } -/* { dg-final { scan-assembler "vcmp.u16" } } */ +/* +**foo1: +** ... +** vcmp.u16 hi, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint16x8_t a, uint16x8_t b) { return vcmphiq (a, b); } -/* { dg-final { scan-assembler "vcmp.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c index becdef0696ad..d87a4185762d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.u32 hi, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32x4_t a, uint32x4_t b) { return vcmphiq_u32 (a, b); } -/* { dg-final { scan-assembler "vcmp.u32" } } */ +/* +**foo1: +** ... +** vcmp.u32 hi, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint32x4_t a, uint32x4_t b) { return vcmphiq (a, b); } -/* { dg-final { scan-assembler "vcmp.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c index 933cc69507d8..80fd2a40b0fc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.u8 hi, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint8x16_t a, uint8x16_t b) { return vcmphiq_u8 (a, b); } -/* { dg-final { scan-assembler "vcmp.u8" } } */ +/* +**foo1: +** ... +** vcmp.u8 hi, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint8x16_t a, uint8x16_t b) { return vcmphiq (a, b); } -/* { dg-final { scan-assembler "vcmp.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c index c2e69a5de92c..209d81096af6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f16 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16x8_t b) { return vcmpleq_f16 (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo1: +** ... +** vcmp.f16 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16x8_t b) { return vcmpleq (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c index 923aee050d31..b92c5f66fd96 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f32 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32x4_t b) { return vcmpleq_f32 (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo1: +** ... +** vcmp.f32 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32x4_t b) { return vcmpleq (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c index 66a37192985d..e6136898ded9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcmpleq_m_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcmpleq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c index e679b338d581..2304e98d2531 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcmpleq_m_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcmpleq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c index 42049fd57a41..a61db2817c10 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16_t b, mve_pred16_t p) { return vcmpleq_m_n_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16_t b, mve_pred16_t p) { return vcmpleq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float16x8_t a, mve_pred16_t p) +{ + return vcmpleq_m (a, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c index c68bd4e59001..7a2cdb4059db 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32_t b, mve_pred16_t p) { return vcmpleq_m_n_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32_t b, mve_pred16_t p) { return vcmpleq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float32x4_t a, mve_pred16_t p) +{ + return vcmpleq_m (a, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c index 0cdc14455a38..69fcab15b8a5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16_t b, mve_pred16_t p) { return vcmpleq_m_n_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16_t b, mve_pred16_t p) { return vcmpleq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c index a955af8fa2ba..617ebd6144f1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32_t b, mve_pred16_t p) { return vcmpleq_m_n_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32_t b, mve_pred16_t p) { return vcmpleq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c index d9951e4a8cf5..b8ee50dd55c4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s8 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8_t b, mve_pred16_t p) { return vcmpleq_m_n_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s8 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8_t b, mve_pred16_t p) { return vcmpleq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c index f16aff86ef04..fcc376d6ec36 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s16 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcmpleq_m_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s16 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcmpleq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c index 2c4e659e9cfb..9983e89d80c8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s32 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcmpleq_m_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s32 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcmpleq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c index 69b88cfb3894..504e4feb5d1d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s8 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcmpleq_m_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s8 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcmpleq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c index 3fa3c5e0310b..cfa6dbc07c79 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16_t b) { return vcmpleq_n_f16 (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo1: +** ... +** vcmp.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16_t b) { return vcmpleq (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo2: +** ... +** vcmp.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float16x8_t a) +{ + return vcmpleq (a, 1.1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c index 8349de7b68cd..c89558f40762 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32_t b) { return vcmpleq_n_f32 (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo1: +** ... +** vcmp.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32_t b) { return vcmpleq (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo2: +** ... +** vcmp.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float32x4_t a) +{ + return vcmpleq (a, 1.1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c index 5ecae572227c..da73fc14b77a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16_t b) { return vcmpleq_n_s16 (a, b); } -/* { dg-final { scan-assembler "vcmp.s16" } } */ +/* +**foo1: +** ... +** vcmp.s16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16_t b) { return vcmpleq (a, b); } -/* { dg-final { scan-assembler "vcmp.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c index 02320e7a5527..0951a5c13fb9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32_t b) { return vcmpleq_n_s32 (a, b); } -/* { dg-final { scan-assembler "vcmp.s32" } } */ +/* +**foo1: +** ... +** vcmp.s32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32_t b) { return vcmpleq (a, b); } -/* { dg-final { scan-assembler "vcmp.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c index a0ac97328b71..e4553354681e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s8 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8_t b) { return vcmpleq_n_s8 (a, b); } -/* { dg-final { scan-assembler "vcmp.s8" } } */ +/* +**foo1: +** ... +** vcmp.s8 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8_t b) { return vcmpleq (a, b); } -/* { dg-final { scan-assembler "vcmp.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c index 2fb4acd3d742..68500da9ddf5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s16 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16x8_t b) { return vcmpleq_s16 (a, b); } -/* { dg-final { scan-assembler "vcmp.s16" } } */ +/* +**foo1: +** ... +** vcmp.s16 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16x8_t b) { return vcmpleq (a, b); } -/* { dg-final { scan-assembler "vcmp.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c index 2ae998efb7c7..1966bcd94d3a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s32 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32x4_t b) { return vcmpleq_s32 (a, b); } -/* { dg-final { scan-assembler "vcmp.s32" } } */ +/* +**foo1: +** ... +** vcmp.s32 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32x4_t b) { return vcmpleq (a, b); } -/* { dg-final { scan-assembler "vcmp.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c index da06b019cc12..e9f6e47e5d6e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s8 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8x16_t b) { return vcmpleq_s8 (a, b); } -/* { dg-final { scan-assembler "vcmp.s8" } } */ +/* +**foo1: +** ... +** vcmp.s8 le, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8x16_t b) { return vcmpleq (a, b); } -/* { dg-final { scan-assembler "vcmp.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c index eab80b2ddd9e..b4958816bd8d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f16 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16x8_t b) { return vcmpltq_f16 (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo1: +** ... +** vcmp.f16 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16x8_t b) { return vcmpltq (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c index f17d16482ddd..752ab2b3e49d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f32 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32x4_t b) { return vcmpltq_f32 (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo1: +** ... +** vcmp.f32 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32x4_t b) { return vcmpltq (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c index 93c36f3a6130..cbaacbe2b47e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcmpltq_m_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcmpltq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c index a17f0b02a95e..96d0e7c7cc64 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcmpltq_m_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcmpltq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c index 45d0f51b4d77..1e5db53198e7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16_t b, mve_pred16_t p) { return vcmpltq_m_n_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16_t b, mve_pred16_t p) { return vcmpltq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float16x8_t a, mve_pred16_t p) +{ + return vcmpltq_m (a, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c index 16e37ccaf8d4..77de40ade01f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32_t b, mve_pred16_t p) { return vcmpltq_m_n_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32_t b, mve_pred16_t p) { return vcmpltq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float32x4_t a, mve_pred16_t p) +{ + return vcmpltq_m (a, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c index d0e322fbede1..beebe65a58fd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16_t b, mve_pred16_t p) { return vcmpltq_m_n_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16_t b, mve_pred16_t p) { return vcmpltq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c index 7ec7963267a8..07260c56ed34 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32_t b, mve_pred16_t p) { return vcmpltq_m_n_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32_t b, mve_pred16_t p) { return vcmpltq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c index 22434e88cd62..7d1e9e7fbde5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s8 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8_t b, mve_pred16_t p) { return vcmpltq_m_n_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s8 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8_t b, mve_pred16_t p) { return vcmpltq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c index 359c06407847..c0f6dfc94321 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s16 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcmpltq_m_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s16 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcmpltq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c index 3df7e89a6f52..b6fc4700e736 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s32 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcmpltq_m_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s32 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcmpltq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c index 1055c2b661c8..545b76359add 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s8 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcmpltq_m_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.s8 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcmpltq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c index 2d55af20dd3a..401ef21ba2bc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16_t b) { return vcmpltq_n_f16 (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo1: +** ... +** vcmp.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16_t b) { return vcmpltq (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo2: +** ... +** vcmp.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float16x8_t a) +{ + return vcmpltq (a, 1.1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c index 2590ca83c455..380f071e5646 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32_t b) { return vcmpltq_n_f32 (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo1: +** ... +** vcmp.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32_t b) { return vcmpltq (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo2: +** ... +** vcmp.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float32x4_t a) +{ + return vcmpltq (a, 1.1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c index 169f6ad4610d..a1d12392dd2a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16_t b) { return vcmpltq_n_s16 (a, b); } -/* { dg-final { scan-assembler "vcmp.s16" } } */ +/* +**foo1: +** ... +** vcmp.s16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16_t b) { return vcmpltq (a, b); } -/* { dg-final { scan-assembler "vcmp.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c index 534047c2df3c..6332f75f327f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32_t b) { return vcmpltq_n_s32 (a, b); } -/* { dg-final { scan-assembler "vcmp.s32" } } */ +/* +**foo1: +** ... +** vcmp.s32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32_t b) { return vcmpltq (a, b); } -/* { dg-final { scan-assembler "vcmp.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c index da659f1f2bea..e0ac80caeb03 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s8 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8_t b) { return vcmpltq_n_s8 (a, b); } -/* { dg-final { scan-assembler "vcmp.s8" } } */ +/* +**foo1: +** ... +** vcmp.s8 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8_t b) { return vcmpltq (a, b); } -/* { dg-final { scan-assembler "vcmp.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c index da4c90a07de8..23843ad88f3a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s16 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16x8_t b) { return vcmpltq_s16 (a, b); } -/* { dg-final { scan-assembler "vcmp.s16" } } */ +/* +**foo1: +** ... +** vcmp.s16 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16x8_t b) { return vcmpltq (a, b); } -/* { dg-final { scan-assembler "vcmp.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c index 5dc218a5f40b..aeb7a6f98968 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s32 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32x4_t b) { return vcmpltq_s32 (a, b); } -/* { dg-final { scan-assembler "vcmp.s32" } } */ +/* +**foo1: +** ... +** vcmp.s32 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32x4_t b) { return vcmpltq (a, b); } -/* { dg-final { scan-assembler "vcmp.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c index ea5853c212cd..2129b56a5f7d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.s8 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8x16_t b) { return vcmpltq_s8 (a, b); } -/* { dg-final { scan-assembler "vcmp.s8" } } */ +/* +**foo1: +** ... +** vcmp.s8 lt, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8x16_t b) { return vcmpltq (a, b); } -/* { dg-final { scan-assembler "vcmp.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c index 8d1c6096c56b..c27ea2f0de84 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f16 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16x8_t b) { return vcmpneq_f16 (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo1: +** ... +** vcmp.f16 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16x8_t b) { return vcmpneq (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c index 860bd69c1299..609de44d8e72 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f32 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32x4_t b) { return vcmpneq_f32 (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo1: +** ... +** vcmp.f32 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32x4_t b) { return vcmpneq (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c index a4e62de7272a..98f22337d61e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcmpneq_m_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vcmpneq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c index b18a2e5fd88c..7f6e96ae47ea 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcmpneq_m_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vcmpneq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c index c127b3a68f6a..71b3476fb189 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16_t b, mve_pred16_t p) { return vcmpneq_m_n_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16_t b, mve_pred16_t p) { return vcmpneq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float16x8_t a, mve_pred16_t p) +{ + return vcmpneq_m (a, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c index a8423d45708d..d6dea8db8657 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32_t b, mve_pred16_t p) { return vcmpneq_m_n_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32_t b, mve_pred16_t p) { return vcmpneq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float32x4_t a, mve_pred16_t p) +{ + return vcmpneq_m (a, 1.1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c index 63ee1c3bffbc..e72c9b62829b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16_t b, mve_pred16_t p) { return vcmpneq_m_n_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16_t b, mve_pred16_t p) { return vcmpneq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c index 10f6d448d765..47c90e31f49d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32_t b, mve_pred16_t p) { return vcmpneq_m_n_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32_t b, mve_pred16_t p) { return vcmpneq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c index 66e5d158c51a..9d9da1000461 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8_t b, mve_pred16_t p) { return vcmpneq_m_n_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8_t b, mve_pred16_t p) { return vcmpneq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c index ffe6ff919cf8..ea8cf24b3583 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint16x8_t a, uint16_t b, mve_pred16_t p) { return vcmpneq_m_n_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p) { return vcmpneq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint16x8_t a, mve_pred16_t p) +{ + return vcmpneq_m (a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c index 55e796a1138c..30291dcdd9bc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32x4_t a, uint32_t b, mve_pred16_t p) { return vcmpneq_m_n_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p) { return vcmpneq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint32x4_t a, mve_pred16_t p) +{ + return vcmpneq_m (a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c index 3c8bd16647a5..be75376a6916 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c @@ -1,22 +1,63 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint8x16_t a, uint8_t b, mve_pred16_t p) { return vcmpneq_m_n_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p) { return vcmpneq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint8x16_t a, mve_pred16_t p) +{ + return vcmpneq_m (a, 1, p); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c index d3e1ce0e690a..60e868141d07 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcmpneq_m_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vcmpneq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c index f5602ffd0daf..780c544bef3d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcmpneq_m_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vcmpneq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c index 84b8b1617b0a..15f6d316cba2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcmpneq_m_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vcmpneq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c index 3c8943719bbb..300852ed7b3e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vcmpneq_m_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i16 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vcmpneq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c index 980cc4124b2b..227b5f01eca1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vcmpneq_m_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i32 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vcmpneq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c index 2615dcb37b91..cfcb59f49cfd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vcmpneq_m_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcmpt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcmpt.i8 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vcmpneq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c index e9e2a9c7b045..29e43f3fdf85 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float16x8_t a, float16_t b) { return vcmpneq_n_f16 (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo1: +** ... +** vcmp.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float16x8_t a, float16_t b) { return vcmpneq (a, b); } -/* { dg-final { scan-assembler "vcmp.f16" } } */ +/* +**foo2: +** ... +** vcmp.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float16x8_t a) +{ + return vcmpneq (a, 1.1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c index eb64b17969c8..688e77cd044e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (float32x4_t a, float32_t b) { return vcmpneq_n_f32 (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo1: +** ... +** vcmp.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (float32x4_t a, float32_t b) { return vcmpneq (a, b); } -/* { dg-final { scan-assembler "vcmp.f32" } } */ +/* +**foo2: +** ... +** vcmp.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (float32x4_t a) +{ + return vcmpneq (a, 1.1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c index 14689242ee42..2afc34d16e5c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16_t b) { return vcmpneq_n_s16 (a, b); } -/* { dg-final { scan-assembler "vcmp.i16" } } */ +/* +**foo1: +** ... +** vcmp.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16_t b) { return vcmpneq (a, b); } -/* { dg-final { scan-assembler "vcmp.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c index 53418ff39237..6c3231613168 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32_t b) { return vcmpneq_n_s32 (a, b); } -/* { dg-final { scan-assembler "vcmp.i32" } } */ +/* +**foo1: +** ... +** vcmp.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32_t b) { return vcmpneq (a, b); } -/* { dg-final { scan-assembler "vcmp.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c index fa405c281b4c..5483d6dd2fe2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8_t b) { return vcmpneq_n_s8 (a, b); } -/* { dg-final { scan-assembler "vcmp.i8" } } */ +/* +**foo1: +** ... +** vcmp.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8_t b) { return vcmpneq (a, b); } -/* { dg-final { scan-assembler "vcmp.i8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c index cc8540b3a6cb..d8edfb0d825b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint16x8_t a, uint16_t b) { return vcmpneq_n_u16 (a, b); } -/* { dg-final { scan-assembler "vcmp.i16" } } */ +/* +**foo1: +** ... +** vcmp.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint16x8_t a, uint16_t b) { return vcmpneq (a, b); } -/* { dg-final { scan-assembler "vcmp.i16" } } */ +/* +**foo2: +** ... +** vcmp.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint16x8_t a) +{ + return vcmpneq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c index 07c9b1ade96c..2b7a6b568307 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32x4_t a, uint32_t b) { return vcmpneq_n_u32 (a, b); } -/* { dg-final { scan-assembler "vcmp.i32" } } */ +/* +**foo1: +** ... +** vcmp.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint32x4_t a, uint32_t b) { return vcmpneq (a, b); } -/* { dg-final { scan-assembler "vcmp.i32" } } */ +/* +**foo2: +** ... +** vcmp.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint32x4_t a) +{ + return vcmpneq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c index eac5e96384e5..2dab43af3318 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c @@ -1,21 +1,51 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint8x16_t a, uint8_t b) { return vcmpneq_n_u8 (a, b); } -/* { dg-final { scan-assembler "vcmp.i8" } } */ +/* +**foo1: +** ... +** vcmp.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint8x16_t a, uint8_t b) { return vcmpneq (a, b); } -/* { dg-final { scan-assembler "vcmp.i8" } } */ +/* +**foo2: +** ... +** vcmp.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ +mve_pred16_t +foo2 (uint8x16_t a) +{ + return vcmpneq (a, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c index 6b04ce70ffcd..d57b607baa9d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i16 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int16x8_t a, int16x8_t b) { return vcmpneq_s16 (a, b); } -/* { dg-final { scan-assembler "vcmp.i16" } } */ +/* +**foo1: +** ... +** vcmp.i16 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int16x8_t a, int16x8_t b) { return vcmpneq (a, b); } -/* { dg-final { scan-assembler "vcmp.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c index cfb98d7e6506..e02171f66867 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i32 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int32x4_t a, int32x4_t b) { return vcmpneq_s32 (a, b); } -/* { dg-final { scan-assembler "vcmp.i32" } } */ +/* +**foo1: +** ... +** vcmp.i32 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int32x4_t a, int32x4_t b) { return vcmpneq (a, b); } -/* { dg-final { scan-assembler "vcmp.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c index ae69be4ba0b9..0abef8c3e00f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i8 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (int8x16_t a, int8x16_t b) { return vcmpneq_s8 (a, b); } -/* { dg-final { scan-assembler "vcmp.i8" } } */ +/* +**foo1: +** ... +** vcmp.i8 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (int8x16_t a, int8x16_t b) { return vcmpneq (a, b); } -/* { dg-final { scan-assembler "vcmp.i8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c index 51059f211919..7144f3ee2fcc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i16 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint16x8_t a, uint16x8_t b) { return vcmpneq_u16 (a, b); } -/* { dg-final { scan-assembler "vcmp.i16" } } */ +/* +**foo1: +** ... +** vcmp.i16 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint16x8_t a, uint16x8_t b) { return vcmpneq (a, b); } -/* { dg-final { scan-assembler "vcmp.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c index 42e4a3f4f2d8..a31134f2f1de 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i32 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32x4_t a, uint32x4_t b) { return vcmpneq_u32 (a, b); } -/* { dg-final { scan-assembler "vcmp.i32" } } */ +/* +**foo1: +** ... +** vcmp.i32 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint32x4_t a, uint32x4_t b) { return vcmpneq (a, b); } -/* { dg-final { scan-assembler "vcmp.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c index addacc158330..2801c8e3763d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c @@ -1,21 +1,37 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vcmp.i8 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint8x16_t a, uint8x16_t b) { return vcmpneq_u8 (a, b); } -/* { dg-final { scan-assembler "vcmp.i8" } } */ +/* +**foo1: +** ... +** vcmp.i8 ne, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo1 (uint8x16_t a, uint8x16_t b) { return vcmpneq (a, b); } -/* { dg-final { scan-assembler "vcmp.i8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file