From: Krzysztof Kozlowski Date: Tue, 23 Dec 2025 15:26:27 +0000 (+0100) Subject: arm64: dts: freescale: Use lowercase hex X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=202266aee7d54e90a861fcc364993100414b8148;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: freescale: Use lowercase hex The DTS code coding style expects lowercase hex for values and unit addresses. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts index 71765ec91745e..f51508952d51c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts @@ -392,13 +392,13 @@ /* ubia (first OpenWrt) - a/b names to prevent confusion with ubi0/1/etc. */ partition@2800000 { label = "ubia"; - reg = <0x2800000 0x6C00000>; + reg = <0x2800000 0x6c00000>; }; /* ubib (second OpenWrt) */ partition@9400000 { label = "ubib"; - reg = <0x9400000 0x6C00000>; + reg = <0x9400000 0x6c00000>; }; }; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi index b2f6cd237be04..99016768b73f2 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi @@ -684,7 +684,7 @@ compatible = "arm,mmu-500"; reg = <0 0x5000000 0 0x800000>; #iommu-cells = <1>; - stream-match-mask = <0x7C00>; + stream-match-mask = <0x7c00>; dma-coherent; #global-interrupts = <12>; // global secure fault diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi index 9421fdd7e30e3..6073e426774aa 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi @@ -881,7 +881,7 @@ reg = <0 0x5000000 0 0x800000>; #global-interrupts = <12>; #iommu-cells = <1>; - stream-match-mask = <0x7C00>; + stream-match-mask = <0x7c00>; dma-coherent; interrupts = , /* global secure fault */ , /* combined secure interrupt */ diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index d899c0355e51d..853b01452813a 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -35,7 +35,7 @@ d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; - i-cache-size = <0xC000>; + i-cache-size = <0xc000>; i-cache-line-size = <64>; i-cache-sets = <192>; next-level-cache = <&cluster0_l2>; @@ -52,7 +52,7 @@ d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; - i-cache-size = <0xC000>; + i-cache-size = <0xc000>; i-cache-line-size = <64>; i-cache-sets = <192>; next-level-cache = <&cluster0_l2>; @@ -69,7 +69,7 @@ d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; - i-cache-size = <0xC000>; + i-cache-size = <0xc000>; i-cache-line-size = <64>; i-cache-sets = <192>; next-level-cache = <&cluster1_l2>; @@ -86,7 +86,7 @@ d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; - i-cache-size = <0xC000>; + i-cache-size = <0xc000>; i-cache-line-size = <64>; i-cache-sets = <192>; next-level-cache = <&cluster1_l2>; @@ -103,7 +103,7 @@ d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; - i-cache-size = <0xC000>; + i-cache-size = <0xc000>; i-cache-line-size = <64>; i-cache-sets = <192>; next-level-cache = <&cluster2_l2>; @@ -120,7 +120,7 @@ d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; - i-cache-size = <0xC000>; + i-cache-size = <0xc000>; i-cache-line-size = <64>; i-cache-sets = <192>; next-level-cache = <&cluster2_l2>; @@ -137,7 +137,7 @@ d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; - i-cache-size = <0xC000>; + i-cache-size = <0xc000>; i-cache-line-size = <64>; i-cache-sets = <192>; next-level-cache = <&cluster3_l2>; @@ -154,7 +154,7 @@ d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; - i-cache-size = <0xC000>; + i-cache-size = <0xc000>; i-cache-line-size = <64>; i-cache-sets = <192>; next-level-cache = <&cluster3_l2>; @@ -171,7 +171,7 @@ d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; - i-cache-size = <0xC000>; + i-cache-size = <0xc000>; i-cache-line-size = <64>; i-cache-sets = <192>; next-level-cache = <&cluster4_l2>; @@ -188,7 +188,7 @@ d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; - i-cache-size = <0xC000>; + i-cache-size = <0xc000>; i-cache-line-size = <64>; i-cache-sets = <192>; next-level-cache = <&cluster4_l2>; @@ -205,7 +205,7 @@ d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; - i-cache-size = <0xC000>; + i-cache-size = <0xc000>; i-cache-line-size = <64>; i-cache-sets = <192>; next-level-cache = <&cluster5_l2>; @@ -222,7 +222,7 @@ d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; - i-cache-size = <0xC000>; + i-cache-size = <0xc000>; i-cache-line-size = <64>; i-cache-sets = <192>; next-level-cache = <&cluster5_l2>; @@ -239,7 +239,7 @@ d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; - i-cache-size = <0xC000>; + i-cache-size = <0xc000>; i-cache-line-size = <64>; i-cache-sets = <192>; next-level-cache = <&cluster6_l2>; @@ -256,7 +256,7 @@ d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; - i-cache-size = <0xC000>; + i-cache-size = <0xc000>; i-cache-line-size = <64>; i-cache-sets = <192>; next-level-cache = <&cluster6_l2>; @@ -273,7 +273,7 @@ d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; - i-cache-size = <0xC000>; + i-cache-size = <0xc000>; i-cache-line-size = <64>; i-cache-sets = <192>; next-level-cache = <&cluster7_l2>; @@ -290,7 +290,7 @@ d-cache-size = <0x8000>; d-cache-line-size = <64>; d-cache-sets = <128>; - i-cache-size = <0xC000>; + i-cache-size = <0xc000>; i-cache-line-size = <64>; i-cache-sets = <192>; next-level-cache = <&cluster7_l2>; diff --git a/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts b/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts index 0d009f4be804e..664f4a6950a82 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts +++ b/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts @@ -147,23 +147,23 @@ }; pinctrl_i2c2: i2c2grp { - fsl,pins = , - ; + fsl,pins = , + ; }; pinctrl_i2c2_gpio: i2c2gpiogrp { - fsl,pins = , - ; + fsl,pins = , + ; }; pinctrl_i2c3: i2c3grp { - fsl,pins = , - ; + fsl,pins = , + ; }; pinctrl_i2c3_gpio: i2c3gpiogrp { - fsl,pins = , - ; + fsl,pins = , + ; }; pinctrl_pwm3: pwm3grp { diff --git a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts index ec1f100222485..86b8c5af4153d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts @@ -226,7 +226,7 @@ }; pinctrl_rtc: rtcgrp { fsl,pins = < - MX8MP_IOMUXC_UART2_TXD__GPIO5_IO25 0x1C0 + MX8MP_IOMUXC_UART2_TXD__GPIO5_IO25 0x1c0 >; }; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts index 90ec73068a6de..0fe52c73fc8fa 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts @@ -501,7 +501,7 @@ pinctrl_rtc: rtcgrp { fsl,pins = < - MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x1C0 + MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x1c0 >; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi index bebe19eb360f8..0348da385f239 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi @@ -1044,7 +1044,7 @@ }; pinctrl_mcu_int: mcuintgrp { - fsl,pins = ; /* MCU_INT# */ + fsl,pins = ; /* MCU_INT# */ }; /* SMARC LCD1_BKLT_PWM */ @@ -1096,12 +1096,12 @@ /* SMARC SLEEP# */ pinctrl_sleep: sleepgrp { - fsl,pins = ; /* SMARC S149 - SLEEP# */ + fsl,pins = ; /* SMARC S149 - SLEEP# */ }; /* SMARC SMB_ALERT# */ pinctrl_smb_alert: smbalertgrp { - fsl,pins = ; /* SMARC P1 - SMB_ALERT# */ + fsl,pins = ; /* SMARC P1 - SMB_ALERT# */ }; /* TPM_CS# */ diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts index 6e927ff1e967a..b7f69c92b7748 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts @@ -134,7 +134,7 @@ compatible = "shared-dma-pool"; reusable; size = <0 0x38000000>; - alloc-ranges = <0 0x40000000 0 0xB0000000>; + alloc-ranges = <0 0x40000000 0 0xb0000000>; linux,cma-default; }; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts index fdfe246c56407..ad49bf85a04d3 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts @@ -228,7 +228,7 @@ compatible = "shared-dma-pool"; reusable; size = <0 0x38000000>; - alloc-ranges = <0 0x40000000 0 0xB0000000>; + alloc-ranges = <0 0x40000000 0 0xb0000000>; linux,cma-default; }; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts index d9f203c795197..aadaeef928bd9 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts @@ -633,7 +633,7 @@ pinctrl_hpdet: hpdetgrp { fsl,pins = < - MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0xC0 /* HP_DET */ + MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0xc0 /* HP_DET */ >; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi index 9e0e2d7271efb..2975e94516617 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi @@ -536,9 +536,9 @@ pinctrl_keys: keysgrp { fsl,pins = < /* VOL- */ - MX8MQ_IOMUXC_ENET_MDIO_GPIO1_IO17 0x01C0 + MX8MQ_IOMUXC_ENET_MDIO_GPIO1_IO17 0x01c0 /* VOL+ */ - MX8MQ_IOMUXC_ENET_MDC_GPIO1_IO16 0x01C0 + MX8MQ_IOMUXC_ENET_MDC_GPIO1_IO16 0x01c0 >; }; @@ -620,7 +620,7 @@ pinctrl_tcpc: tcpcgrp { fsl,pins = < /* TCPC_INT */ - MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x01C0 + MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x01c0 >; }; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts index 779d9f78fb819..7d4574c6de1d6 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts @@ -1214,17 +1214,17 @@ pinctrl_mipi_csi0: mipi-csi0grp { fsl,pins = < - IMX8QM_MIPI_CSI0_GPIO0_00_LSIO_GPIO1_IO27 0xC0000041 - IMX8QM_MIPI_CSI0_GPIO0_01_LSIO_GPIO1_IO28 0xC0000041 - IMX8QM_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT 0xC0000041 + IMX8QM_MIPI_CSI0_GPIO0_00_LSIO_GPIO1_IO27 0xc0000041 + IMX8QM_MIPI_CSI0_GPIO0_01_LSIO_GPIO1_IO28 0xc0000041 + IMX8QM_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT 0xc0000041 >; }; pinctrl_mipi_csi1: mipi-csi1grp { fsl,pins = < - IMX8QM_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_IO30 0xC0000041 - IMX8QM_MIPI_CSI1_GPIO0_01_LSIO_GPIO1_IO31 0xC0000041 - IMX8QM_MIPI_CSI1_MCLK_OUT_MIPI_CSI1_ACM_MCLK_OUT 0xC0000041 + IMX8QM_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_IO30 0xc0000041 + IMX8QM_MIPI_CSI1_GPIO0_01_LSIO_GPIO1_IO31 0xc0000041 + IMX8QM_MIPI_CSI1_MCLK_OUT_MIPI_CSI1_ACM_MCLK_OUT 0xc0000041 >; }; diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi index 9e7309a0ca51f..f7e28f22343a7 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi @@ -137,7 +137,7 @@ reg = <0x0 0x100>; clocks = <&clk IMX_SC_R_A72 IMX_SC_PM_CLK_CPU>; enable-method = "psci"; - i-cache-size = <0xC000>; + i-cache-size = <0xc000>; i-cache-line-size = <64>; i-cache-sets = <256>; d-cache-size = <0x8000>; @@ -241,7 +241,7 @@ gic: interrupt-controller@51a00000 { compatible = "arm,gic-v3"; reg = <0x0 0x51a00000 0 0x10000>, /* GIC Dist */ - <0x0 0x51b00000 0 0xC0000>, /* GICR */ + <0x0 0x51b00000 0 0xc0000>, /* GICR */ <0x0 0x52000000 0 0x2000>, /* GICC */ <0x0 0x52010000 0 0x1000>, /* GICH */ <0x0 0x52020000 0 0x20000>; /* GICV */ diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts index 50a97c0297c72..40a0bc9f4e848 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts @@ -1062,9 +1062,9 @@ pinctrl_mipi_csi0: mipi-csi0grp { fsl,pins = < - IMX8QXP_MIPI_CSI0_GPIO0_01_LSIO_GPIO3_IO07 0xC0000041 - IMX8QXP_MIPI_CSI0_GPIO0_00_LSIO_GPIO3_IO08 0xC0000041 - IMX8QXP_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT 0xC0000041 + IMX8QXP_MIPI_CSI0_GPIO0_01_LSIO_GPIO3_IO07 0xc0000041 + IMX8QXP_MIPI_CSI0_GPIO0_00_LSIO_GPIO3_IO08 0xc0000041 + IMX8QXP_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT 0xc0000041 >; }; diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi index 8e9e841cc8281..014808774b0e9 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -623,7 +623,7 @@ }; pinctrl_csi_mclk: csimclkgrp { - fsl,pins = ; /* SODIMM 75 / X3-12 */ + fsl,pins = ; /* SODIMM 75 / X3-12 */ }; pinctrl_ext_io0: extio0grp { diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts index 3081513cfc045..d4184fb8b28cd 100644 --- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts @@ -178,7 +178,7 @@ linux_cma: linux,cma { compatible = "shared-dma-pool"; - alloc-ranges = <0 0x80000000 0 0x7F000000>; + alloc-ranges = <0 0x80000000 0 0x7f000000>; reusable; size = <0 0x3c000000>; linux,cma-default; diff --git a/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi b/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi index afbdadcb36863..a0752f21edf92 100644 --- a/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi @@ -153,7 +153,7 @@ compatible = "shared-dma-pool"; reusable; size = <0 0x3c000000>; - alloc-ranges = <0 0x80000000 0 0x7F000000>; + alloc-ranges = <0 0x80000000 0 0x7f000000>; linux,cma-default; }; }; diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi index eff7673e7f341..e314f3c7d61d0 100644 --- a/arch/arm64/boot/dts/freescale/s32g3.dtsi +++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi @@ -641,9 +641,9 @@ status = "disabled"; }; - swt7: watchdog@4020C000 { + swt7: watchdog@4020c000 { compatible = "nxp,s32g3-swt", "nxp,s32g2-swt"; - reg = <0x4020C000 0x1000>; + reg = <0x4020c000 0x1000>; clocks = <&clks 0x3a>, <&clks 0x3b>, <&clks 0x3b>; clock-names = "counter", "module", "register"; status = "disabled"; diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi index f1969cdcef19e..803ff45310771 100644 --- a/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi +++ b/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi @@ -197,16 +197,16 @@ }; dspi1-grp3 { - pinmux = <0x5F0>; + pinmux = <0x5f0>; input-enable; slew-rate = <150>; bias-pull-up; }; dspi1-grp4 { - pinmux = <0x3D92>, - <0x3DA2>, - <0x3DB2>; + pinmux = <0x3d92>, + <0x3da2>, + <0x3db2>; }; }; @@ -219,26 +219,26 @@ }; dspi5-grp1 { - pinmux = <0xA0>; + pinmux = <0xa0>; input-enable; slew-rate = <150>; bias-pull-up; }; dspi5-grp2 { - pinmux = <0x3ED2>, - <0x3EE2>, - <0x3EF2>; + pinmux = <0x3ed2>, + <0x3ee2>, + <0x3ef2>; }; dspi5-grp3 { - pinmux = <0xB3>; + pinmux = <0xb3>; output-enable; slew-rate = <150>; }; dspi5-grp4 { - pinmux = <0xC3>; + pinmux = <0xc3>; output-enable; input-enable; slew-rate = <150>; diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi index 3bc3335c92482..979868f6d2c5c 100644 --- a/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi +++ b/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi @@ -151,16 +151,16 @@ }; dspi1-grp3 { - pinmux = <0x5F0>; + pinmux = <0x5f0>; input-enable; slew-rate = <150>; bias-pull-up; }; dspi1-grp4 { - pinmux = <0x3D92>, - <0x3DA2>, - <0x3DB2>; + pinmux = <0x3d92>, + <0x3da2>, + <0x3db2>; }; }; @@ -173,26 +173,26 @@ }; dspi5-grp1 { - pinmux = <0xA0>; + pinmux = <0xa0>; input-enable; slew-rate = <150>; bias-pull-up; }; dspi5-grp2 { - pinmux = <0x3ED2>, - <0x3EE2>, - <0x3EF2>; + pinmux = <0x3ed2>, + <0x3ee2>, + <0x3ef2>; }; dspi5-grp3 { - pinmux = <0xB3>; + pinmux = <0xb3>; output-enable; slew-rate = <150>; }; dspi5-grp4 { - pinmux = <0xC3>; + pinmux = <0xc3>; output-enable; input-enable; slew-rate = <150>;