From: Jeff Law <jlaw@ventanamicro>
Date: Tue, 9 May 2023 13:18:45 +0000 (-0600)
Subject: Eliminate more comparisons on the H8 port
X-Git-Tag: basepoints/gcc-15~9521
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=204303c81e82ddd01e7dc5a5a63719d476f9043c;p=thirdparty%2Fgcc.git

Eliminate more comparisons on the H8 port

This patch fixes a minor code quality issue I found while testing LRA on the
H8.  Specifically we have a peephole which converts a comparison of a memory
location against zero into a load + comparison which is actually more
efficient.  This triggers when there are registers available at the right
point during peephole2.

If the load is not a mode dependent address we can actually do better by
realizing the load itself sets the proper flags and eliminate the comparison.
I may have expected this to happen when I wrote the original peephole2,
but cmpelim runs before peephole2, so clearly if we want to eliminate the
comparison we have to do it manually.

gcc/
	* config/h8300/testcompare.md: Add peephole2 which uses a memory
	load to set flags, thus eliminating a compare against zero.
---

diff --git a/gcc/config/h8300/testcompare.md b/gcc/config/h8300/testcompare.md
index 81dce1d0bc1f..efa66d274c7a 100644
--- a/gcc/config/h8300/testcompare.md
+++ b/gcc/config/h8300/testcompare.md
@@ -171,13 +171,25 @@
    (set_attr "length_table" "*,add")])
 
 ;; Convert a memory comparison to a move if there is a scratch register.
+;; This is preferred over the next as we can proactively avoid the
+;; comparison.
+(define_peephole2
+  [(match_scratch:QHSI 1 "r")
+   (set (reg:CC CC_REG)
+	(compare (match_operand:QHSI 0 "memory_operand" "")
+		 (const_int 0)))]
+  "!mode_dependent_address_p (XEXP (operands[0], 0), MEM_ADDR_SPACE (operands[0]))"
+  [(parallel [(set (reg:CCZN CC_REG) (compare:CCZN (match_dup 0) (const_int 0)))
+	      (set (match_dup 1) (match_dup 0))])])
 
+;; Similarly, but used when the memory reference is an autoinc address
+;; mode.
 (define_peephole2
   [(match_scratch:QHSI 1 "r")
    (set (reg:CC CC_REG)
 	(compare (match_operand:QHSI 0 "memory_operand" "")
 		 (const_int 0)))]
-  ""
+  "mode_dependent_address_p (XEXP (operands[0], 0), MEM_ADDR_SPACE (operands[0]))"
   [(parallel [(set (match_dup 1) (match_dup 0)) (clobber (reg:CC CC_REG))])
    (set (reg:CC CC_REG) (compare:CC (match_dup 1) (const_int 0)))])