From: Maxime Chevallier Date: Thu, 30 Oct 2025 18:24:53 +0000 (+0100) Subject: net: stmmac: rename devlink parameter ts_coarse into phc_coarse_adj X-Git-Tag: v6.19-rc1~170^2~254 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=209ff7af79bf495e6c3d300bf3dea6aeea973bc7;p=thirdparty%2Fkernel%2Flinux.git net: stmmac: rename devlink parameter ts_coarse into phc_coarse_adj The devlink param "ts_coarse" doesn't indicate that we get coarse timestamps, but rather that the PHC clock adjusments are coarse as the frequency won't be continuously adjusted. Adjust the devlink parameter name to reflect that. The Coarse terminlogy comes from the dwmac register naming, update the documentation to better explain what the parameter is about. With this change, the parameter can now be adjusted using: devlink dev param set name phc_coarse_adj value true cmode runtime Signed-off-by: Maxime Chevallier Link: https://patch.msgid.link/20251030182454.182406-1-maxime.chevallier@bootlin.com Signed-off-by: Jakub Kicinski --- diff --git a/Documentation/networking/devlink/stmmac.rst b/Documentation/networking/devlink/stmmac.rst index e8e33d1c7baf1..47e3ff10bc082 100644 --- a/Documentation/networking/devlink/stmmac.rst +++ b/Documentation/networking/devlink/stmmac.rst @@ -19,13 +19,22 @@ The ``stmmac`` driver implements the following driver-specific parameters. - Type - Mode - Description - * - ``ts_coarse`` + * - ``phc_coarse_adj`` - Boolean - runtime - - Enable the Coarse timestamping mode. In Coarse mode, the ptp clock is - expected to be updated through an external PPS input, but the subsecond - increment used for timestamping is set to 1/ptp_clock_rate. In Fine mode - (i.e. Coarse mode == false), the ptp clock frequency is adjusted more - frequently, but the subsecond increment is set to 2/ptp_clock_rate. + - Enable the Coarse timestamping mode, as defined in the DWMAC TRM. + A detailed explanation of this timestamping mode can be found in the + Socfpga Functionnal Description [1]. + + In Coarse mode, the ptp clock is expected to be fed by a high-precision + clock that is externally adjusted, and the subsecond increment used for + timestamping is set to 1/ptp_clock_rate. + + In Fine mode (i.e. Coarse mode == false), the ptp clock frequency is + continuously adjusted, but the subsecond increment is set to + 2/ptp_clock_rate. + Coarse mode is suitable for PTP Grand Master operation. If unsure, leave the parameter to False. + + [1] https://www.intel.com/content/www/us/en/docs/programmable/683126/21-2/functional-description-of-the-emac.html diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 1e69c1a7dc6c5..c2a783c8022d9 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -7445,7 +7445,7 @@ static int stmmac_dl_ts_coarse_get(struct devlink *dl, u32 id, } static const struct devlink_param stmmac_devlink_params[] = { - DEVLINK_PARAM_DRIVER(STMMAC_DEVLINK_PARAM_ID_TS_COARSE, "ts_coarse", + DEVLINK_PARAM_DRIVER(STMMAC_DEVLINK_PARAM_ID_TS_COARSE, "phc_coarse_adj", DEVLINK_PARAM_TYPE_BOOL, BIT(DEVLINK_PARAM_CMODE_RUNTIME), stmmac_dl_ts_coarse_get,