From: Borislav Petkov (AMD) Date: Fri, 11 Jul 2025 19:23:58 +0000 (+0200) Subject: x86/CPU/AMD: Properly check the TSA microcode X-Git-Tag: v6.6.98~1 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=20aa3d5198068ddc6f88e2f7501ecad5add17af5;p=thirdparty%2Fkernel%2Fstable.git x86/CPU/AMD: Properly check the TSA microcode In order to simplify backports, I resorted to an older version of the microcode revision checking which didn't pull in the whole struct x86_cpu_id matching machinery. My simpler method, however, forgot to add the extended CPU model to the patch revision, which lead to mismatches when determining whether TSA mitigation support is present. So add that forgotten extended model. This is a stable-only fix and the preference is to do it this way because it is a lot simpler. Also, the Fixes: tag below points to the respective stable patch. Fixes: 90293047df18 ("x86/bugs: Add a Transient Scheduler Attacks mitigation") Reported-by: Thomas Voegtle Signed-off-by: Borislav Petkov (AMD) Tested-by: Thomas Voegtle Message-ID: <04ea0a8e-edb0-c59e-ce21-5f3d5d167af3@lio96.de> Signed-off-by: Greg Kroah-Hartman --- diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 1180689a23903..f6690df70b43e 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -547,6 +547,7 @@ static bool amd_check_tsa_microcode(void) p.ext_fam = c->x86 - 0xf; p.model = c->x86_model; + p.ext_model = c->x86_model >> 4; p.stepping = c->x86_stepping; if (cpu_has(c, X86_FEATURE_ZEN3) ||