From: Paul Floyd <pjfloyd@wanadoo.fr>
Date: Sun, 12 May 2024 05:12:41 +0000 (+0200)
Subject: aarch64: fix data cache opcode warning
X-Git-Tag: VALGRIND_3_24_0~144
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2159084c665feae035a1845f5054b673bc679b90;p=thirdparty%2Fvalgrind.git

aarch64: fix data cache opcode warning

Wrong logic used in patch.
---

diff --git a/VEX/priv/guest_arm64_toIR.c b/VEX/priv/guest_arm64_toIR.c
index a5c487717..062c0b3aa 100644
--- a/VEX/priv/guest_arm64_toIR.c
+++ b/VEX/priv/guest_arm64_toIR.c
@@ -8024,10 +8024,10 @@ Bool dis_ARM64_branch_etc(/*MB_OUT*/DisResult* dres, UInt insn,
       D5 0B 7E 001 Rt  dc civac, rT
    */
    if (   (INSN(31,0) & 0xFFFFFFE0) == 0xD50B7A20
-       && (INSN(31,0) & 0xFFFFFFE0) == 0xD50B7B20
-       && (INSN(31,0) & 0xFFFFFFE0) == 0xD50B7C20
-       && (INSN(31,0) & 0xFFFFFFE0) == 0xD50B7D20
-       && (INSN(31,0) & 0xFFFFFFE0) == 0xD50B7E20) {
+       || (INSN(31,0) & 0xFFFFFFE0) == 0xD50B7B20
+       || (INSN(31,0) & 0xFFFFFFE0) == 0xD50B7C20
+       || (INSN(31,0) & 0xFFFFFFE0) == 0xD50B7D20
+       || (INSN(31,0) & 0xFFFFFFE0) == 0xD50B7E20) {
       /* Exactly the same scheme as for IC IVAU, except we observe the
          dMinLine size, and request an Ijk_FlushDCache instead of
          Ijk_InvalICache. */