From: Julian Seward <jseward@acm.org>
Date: Sun, 21 Feb 2010 20:40:53 +0000 (+0000)
Subject: CVTPI2PD (which converts 2 x I32 in M64 or MMX to 2 x F64 in XMM):
X-Git-Tag: svn/VALGRIND_3_6_1^2~109
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=22111b3f3ec8466b6eb95027fa3650bbafb28e1d;p=thirdparty%2Fvalgrind.git

CVTPI2PD (which converts 2 x I32 in M64 or MMX to 2 x F64 in XMM):
only switch the x87 FPU to MMX mode in the case where the source
operand is in memory, not in an MMX register.  This fixes #210264.

This is all very fishy.

* it's inconsistent with all other instructions which convert between
  values in (MMX or M64) and XMM, in that they put the FPU in MMX mode
  even if the source is memory, not MMX.  (for example, CVTPI2PS).
  At least, that's what the Intel docs appear to say.

* the AMD documentation makes no mention at all of this.  For example
  it makes no differentiation in this matter between CVTPI2PD and
  CVTPI2PS.

I wonder if Intel surreptitiously changed the behaviour of CVTPI2PD
since this code was written circa 5 years ago.  Or, whether the Intel
and AMD implementations differ in this respect.



git-svn-id: svn://svn.valgrind.org/vex/trunk@1961
---

diff --git a/VEX/priv/guest_amd64_toIR.c b/VEX/priv/guest_amd64_toIR.c
index 901792f4f2..e064fcb46c 100644
--- a/VEX/priv/guest_amd64_toIR.c
+++ b/VEX/priv/guest_amd64_toIR.c
@@ -10562,8 +10562,14 @@ DisResult disInstr_AMD64_WRK (
       IRTemp arg64 = newTemp(Ity_I64);
 
       modrm = getUChar(delta+2);
-      do_MMX_preamble();
       if (epartIsReg(modrm)) {
+         /* Only switch to MMX mode if the source is a MMX register.
+            This is inconsistent with all other instructions which
+            convert between XMM and (M64 or MMX), which always switch
+            to MMX mode even if 64-bit operand is M64 and not MMX.  At
+            least, that's what the Intel docs seem to me to say.
+            Fixes #210264. */
+         do_MMX_preamble();
          assign( arg64, getMMXReg(eregLO3ofRM(modrm)) );
          delta += 2+1;
          DIP("cvtpi2pd %s,%s\n", nameMMXReg(eregLO3ofRM(modrm)),
diff --git a/VEX/priv/guest_x86_toIR.c b/VEX/priv/guest_x86_toIR.c
index edf4e338ab..1e3fb8fa54 100644
--- a/VEX/priv/guest_x86_toIR.c
+++ b/VEX/priv/guest_x86_toIR.c
@@ -9508,8 +9508,14 @@ DisResult disInstr_X86_WRK (
       IRTemp arg64 = newTemp(Ity_I64);
 
       modrm = getIByte(delta+2);
-      do_MMX_preamble();
       if (epartIsReg(modrm)) {
+         /* Only switch to MMX mode if the source is a MMX register.
+            This is inconsistent with all other instructions which
+            convert between XMM and (M64 or MMX), which always switch
+            to MMX mode even if 64-bit operand is M64 and not MMX.  At
+            least, that's what the Intel docs seem to me to say.
+            Fixes #210264. */
+         do_MMX_preamble();
          assign( arg64, getMMXReg(eregOfRM(modrm)) );
          delta += 2+1;
          DIP("cvtpi2pd %s,%s\n", nameMMXReg(eregOfRM(modrm)),