From: Xiong Hu Luo Date: Fri, 19 Apr 2019 03:30:33 +0000 (+0000) Subject: backport r257541, r259936, r260294, r260623, r261098, r261333, r268585 from trunk X-Git-Tag: releases/gcc-7.5.0~478 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=226a15e6cd18369e65eb34bce360f4dbe6341c70;p=thirdparty%2Fgcc.git backport r257541, r259936, r260294, r260623, r261098, r261333, r268585 from trunk These patches are followed changes for r255555 on testcases vsx-vector-6*.c. Backport them to update file names and fix regressions for GCC7 on power9. See e.g. https://gcc.gnu.org/ml/gcc-testresults/2019-04/msg00159.html for the failures this patch fixes; the patch is for GCC 7. gcc/ChangeLog: 2019-04-19 Xiong Hu Luo Backport from trunk 2018-05-23 Segher Boessenkool * doc/sourcebuild.texi (Endianness): New subsubsection. gcc/testsuite/ChangeLog: 2019-04-19 Xiong Hu Luo Backport from trunk 2018-02-07 Will Schmidt * gcc.target/powerpc/vsx-vector-6-le.c: Update CPU target. * gcc.target/powerpc/vsx-vector-6-le.p9.c: New. Backport from trunk 2018-05-04 Carl Love * gcc.target/powerpc/vsx-vector-6.h (foo): Add test for vec_max, vec_trunc. * gcc.target/powerpc/vsx-vector-6-le.c (dg-final): Update xvcmpeqdp, xvcmpgtdp, xvcmpgedp counts. Add xxsel counts. * gcc.target/powerpc/vsx-vector-6-be.c (dg-final): Update xvcmpgtdp, xvcmpgedp counts. Add xxsel counts. Backport from trunk 2018-05-16 Carl Love * gcc.target/powerpc/vsx-vector-6-be.c: Remove file. * gcc.target/powerpc/vsx-vector-6-be.p7.c: New test file. * gcc.target/powerpc/vsx-vector-6-be.p8.c: New test file. * gcc.target/powerpc/vsx-vector-6-le.c (dg-final): Update counts for xvcmpeqdp., xvcmpgtdp., xvcmpgedp., xxlxor, xvrdpi. Backport from trunk 2018-05-23 Segher Boessenkool * lib/target-supports.exp (check_effective_target_be): New. (check_effective_target_le): New. Backport from trunk 2018-06-01 Carl Love * gcc.target/powerpc/altivec-7-be.c: Delete file. * gcc.target/powerpc/altivec-7-le.c: Delete file. * gcc.target/powerpc/vsx-7-be.c: Remove file. Backport from trunk 2018-06-01 Carl Love Commit 260294 on 2018-05-16 by Carl Love was supposed to add the following files. * gcc.target/powerpc/vsx-vector-6-be.p7.c: New test file. * gcc.target/powerpc/vsx-vector-6-be.p8.c: New test file. Backport from trunk 2018-06-08 Carl Love * gcc.target/powerpc/vsx-vector-6-be.p7.c: Rename this file to vsx-vector-6.p7.c. * gcc.target/powerpc/vsx-vector-6-le.p9.c: Rename this file to vsx-vector-6.p9.c. * gcc.target/powerpc/vsx-vector-6-be.p8.c: Move instruction counts for BE system that are different then for an LE system from this file into vsx-vector-6-le.c using be target qualifier. Remove this file. * gcc.target/powerpc/vsx-vector-6-le.c: Add le qualifiers as needed for the various instruction counts. Rename file to vsx-vector-6.p8.c. Backport from trunk 2019-02-06 Bill Seurer * gcc.target/powerpc/vsx-vector-6.p7.c: Update instruction counts and target. * gcc.target/powerpc/vsx-vector-6.p8.c: Update instruction counts and target. * gcc.target/powerpc/vsx-vector-6.p9.c: Update instruction counts and target. From-SVN: r270452 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c0b8b5bc9998..6aa186a6cef7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2019-04-19 Xiong Hu Luo + + Backport from trunk + 2018-05-23 Segher Boessenkool + + * doc/sourcebuild.texi (Endianness): New subsubsection. + 2019-04-11 Martin Liska Backport from mainline diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index c7bb4b793325..f0e9bb8d35fd 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -1273,6 +1273,16 @@ By convention, keywords ending in @code{_nocache} can also include options specified for the particular test in an earlier @code{dg-options} or @code{dg-add-options} directive. +@subsubsection Endianness + +@table @code +@item be +Target uses big-endian memory order for multi-byte and multi-word data. + +@item le +Target uses little-endian memory order for multi-byte and multi-word data. +@end table + @subsubsection Data type sizes @table @code diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 1eeab12e17a3..56948a808400 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,73 @@ +2019-04-19 Xiong Hu Luo + + Backport from trunk + 2018-02-07 Will Schmidt + + * gcc.target/powerpc/vsx-vector-6-le.c: Update CPU target. + * gcc.target/powerpc/vsx-vector-6-le.p9.c: New. + + Backport from trunk + 2018-05-04 Carl Love + * gcc.target/powerpc/vsx-vector-6.h (foo): Add test for vec_max, + vec_trunc. + * gcc.target/powerpc/vsx-vector-6-le.c (dg-final): Update xvcmpeqdp, + xvcmpgtdp, xvcmpgedp counts. Add xxsel counts. + * gcc.target/powerpc/vsx-vector-6-be.c (dg-final): Update xvcmpgtdp, + xvcmpgedp counts. Add xxsel counts. + + Backport from trunk + 2018-05-16 Carl Love + * gcc.target/powerpc/vsx-vector-6-be.c: Remove file. + * gcc.target/powerpc/vsx-vector-6-be.p7.c: New test file. + * gcc.target/powerpc/vsx-vector-6-be.p8.c: New test file. + * gcc.target/powerpc/vsx-vector-6-le.c (dg-final): Update counts for + xvcmpeqdp., xvcmpgtdp., xvcmpgedp., xxlxor, xvrdpi. + + Backport from trunk + 2018-05-23 Segher Boessenkool + + * lib/target-supports.exp (check_effective_target_be): New. + (check_effective_target_le): New. + + Backport from trunk + 2018-06-01 Carl Love + + * gcc.target/powerpc/altivec-7-be.c: Delete file. + * gcc.target/powerpc/altivec-7-le.c: Delete file. + * gcc.target/powerpc/vsx-7-be.c: Remove file. + + Backport from trunk + 2018-06-01 Carl Love + + Commit 260294 on 2018-05-16 by Carl Love was supposed to add the + following files. + + * gcc.target/powerpc/vsx-vector-6-be.p7.c: New test file. + * gcc.target/powerpc/vsx-vector-6-be.p8.c: New test file. + + Backport from trunk + 2018-06-08 Carl Love + + * gcc.target/powerpc/vsx-vector-6-be.p7.c: Rename this file to + vsx-vector-6.p7.c. + * gcc.target/powerpc/vsx-vector-6-le.p9.c: Rename this file to + vsx-vector-6.p9.c. + * gcc.target/powerpc/vsx-vector-6-be.p8.c: Move instruction counts + for BE system that are different then for an LE system from this file + into vsx-vector-6-le.c using be target qualifier. Remove this file. + * gcc.target/powerpc/vsx-vector-6-le.c: Add le qualifiers as needed for + the various instruction counts. Rename file to vsx-vector-6.p8.c. + + Backport from trunk + 2019-02-06 Bill Seurer + + * gcc.target/powerpc/vsx-vector-6.p7.c: Update instruction + counts and target. + * gcc.target/powerpc/vsx-vector-6.p8.c: Update instruction + counts and target. + * gcc.target/powerpc/vsx-vector-6.p9.c: Update instruction + counts and target. + 2019-04-14 Thomas Koenig Backport from trunk diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-7-be.c b/gcc/testsuite/gcc.target/powerpc/altivec-7-be.c deleted file mode 100644 index 1e690be14452..000000000000 --- a/gcc/testsuite/gcc.target/powerpc/altivec-7-be.c +++ /dev/null @@ -1,30 +0,0 @@ -/* { dg-do compile { target powerpc*-*-* } } */ -/* { dg-require-effective-target powerpc_altivec_ok } */ -/* { dg-options "-maltivec" } */ - -/* Expected results for Big Endian: - vec_packpx vpkpx - vec_ld lxvd2x - vec_lde lvewx - vec_ldl lxvl - vec_lvewx lvewx - vec_unpackh vupklsh - vec_unpackl vupkhsh - vec_andc xxnor - xxland - vec_vxor xxlxor - vec_vmsumubm vmsumubm - vec_vmulesb vmulesb - vec_vmulosb vmulosb -*/ - -/* { dg-final { scan-assembler-times "vpkpx" 2 } } */ -/* { dg-final { scan-assembler-times "vmulesb" 1 } } */ -/* { dg-final { scan-assembler-times "vmulosb" 1 } } */ -/* { dg-final { scan-assembler-times "lvewx" 2 } } */ -/* { dg-final { scan-assembler-times "lvxl" 1 } } */ -/* { dg-final { scan-assembler-times "vupklsh" 1 } } */ -/* { dg-final { scan-assembler-times "vupkhsh" 1 } } */ - -/* Source code for the test in altivec-7.h */ -#include "altivec-7.h" diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-7-le.c b/gcc/testsuite/gcc.target/powerpc/altivec-7-le.c deleted file mode 100644 index 50aab1ce3775..000000000000 --- a/gcc/testsuite/gcc.target/powerpc/altivec-7-le.c +++ /dev/null @@ -1,37 +0,0 @@ -/* { dg-do compile { target powerpc64le-*-* } } */ -/* { dg-require-effective-target powerpc_altivec_ok } */ -/* { dg-options "-maltivec" } */ - -/* Expected results for Little Endian: - vec_packpx vpkpx - vec_vmulosb vmulesb - vec_ld lxv2x - vec_lde lvewx - vec_ldl lxvl - vec_lvewx lvewx - vec_unpackh vupklsh - vec_unpackl vupkhsh - vec_andc xxnor - xxland - vec_vxor xxlxor - vec_vmsumubm vmsumubm - vec_vmulesb vmulosb - vec_vmulosb vmulesb -*/ - -/* { dg-final { scan-assembler-times "vpkpx" 2 } } */ -/* { dg-final { scan-assembler-times "vmulesb" 1 } } */ -/* { dg-final { scan-assembler-times "vmulosb" 1 } } */ -/* { dg-final { scan-assembler-times "lxvd2x" 33 } } */ -/* { dg-final { scan-assembler-times "lvewx" 2 } } */ -/* { dg-final { scan-assembler-times "lvxl" 1 } } */ -/* { dg-final { scan-assembler-times "vupklsh" 1 } } */ -/* { dg-final { scan-assembler-times "vupkhsh" 1 } } */ -/* { dg-final { scan-assembler-times "xxlnor" 0 } } */ -/* { dg-final { scan-assembler-times "xxland" 4 } } */ -/* { dg-final { scan-assembler-times "xxlxor" 5 } } */ -/* { dg-final { scan-assembler-times "vupkhpx" 1 } } */ - -/* Source code for the test in altivec-7.h and vsx-7.h. */ -#include "altivec-7.h" -#include "vsx-7.h" diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-7-be.c b/gcc/testsuite/gcc.target/powerpc/vsx-7-be.c deleted file mode 100644 index 81230a056aa6..000000000000 --- a/gcc/testsuite/gcc.target/powerpc/vsx-7-be.c +++ /dev/null @@ -1,50 +0,0 @@ -/* { dg-do compile { target powerpc*-*-* } } */ -/* { dg-require-effective-target powerpc_vsx_ok } */ -/* { dg-options "-mvsx" } */ - -/* This is an extension of altivec-7-be.c, with vsx target features included. */ - -/* Expected results for Big Endian: -(from altivec-7.h) - vec_packpx vpkpx - vec_ld lxvd2x or lxv - vec_lde lvewx - vec_ldl lxvl - vec_lvewx lvewx - vec_andc xxnor - xxland - vec_vxor xxlxor - vec_vmsumubm vmsumubm - vec_vmulesb vmulesb - vec_vmulosb vmulosb -(from vsx-7.h) - vec_unpackl vupkhsh - vec_unpackh vupklsh -*/ - -/* { dg-final { scan-assembler-times "vpkpx" 2 } } */ -/* { dg-final { scan-assembler-times "vmulesb" 1 } } */ -/* { dg-final { scan-assembler-times "vmulosb" 1 } } */ - -// For LE platforms P9 and later, we generate the lxv insn instead of lxvd2x. -/* { dg-final { scan-assembler-times {\mlxvd2x\M} 0 { target { { powerpc64*le-*-* } && { p9vector_hw } } } } } */ -/* { dg-final { scan-assembler-times {\mlxv\M} 36 { target { { powerpc64*le-*-* } && { p9vector_hw } } } } } */ -// For LE platforms < P9. -/* { dg-final { scan-assembler-times {\mlxvd2x\M} 33 { target { { powerpc64*le-*-* } && { ! p9vector_hw } } } } } */ -// For BE platforms we generate 6 lxvd2x insns. -/* { dg-final { scan-assembler-times {\mlxvd2x\M} 6 { target { { ! powerpc64*le-*-* } && { ! p9vector_hw } } } } } */ - -/* { dg-final { scan-assembler-times "lvewx" 2 } } */ -/* { dg-final { scan-assembler-times "lvxl" 1 } } */ -/* { dg-final { scan-assembler-times "vupklsh" 1 } } */ -/* { dg-final { scan-assembler-times "vupkhsh" 1 } } */ -/* { dg-final { scan-assembler-times "xxlnor" 0 } } */ -/* { dg-final { scan-assembler-times "xxland" 4 } } */ -/* { dg-final { scan-assembler-times "xxlxor" 5 } } */ -/* { dg-final { scan-assembler-times "vupkhpx" 1 } } */ - -/* Source code for the 'altivec' test in altivec-7.h */ -/* Source code for the 'vsx' required tests in vsx-7.h */ - -#include "altivec-7.h" -#include "vsx-7.h" diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.c deleted file mode 100644 index b734761881e5..000000000000 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.c +++ /dev/null @@ -1,32 +0,0 @@ -/* { dg-do compile { target { powerpc64le-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } } */ -/* { dg-require-effective-target powerpc_vsx_ok } */ -/* { dg-options "-mvsx -O2" } */ - -/* Expected instruction counts for Little Endian */ - -/* { dg-final { scan-assembler-times "xvabsdp" 1 } } */ -/* { dg-final { scan-assembler-times "xvadddp" 1 } } */ -/* { dg-final { scan-assembler-times "xxlnor" 6 } } */ -/* { dg-final { scan-assembler-times "xxlor" 14 } } */ -/* { dg-final { scan-assembler-times "xvcmpeqdp" 5 } } */ -/* { dg-final { scan-assembler-times "xvcmpgtdp" 7 } } */ -/* { dg-final { scan-assembler-times "xvcmpgedp" 6 } } */ -/* { dg-final { scan-assembler-times "xvrdpim" 1 } } */ -/* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */ -/* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */ -/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */ -/* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */ -/* { dg-final { scan-assembler-times "xvmindp" 1 } } */ -/* { dg-final { scan-assembler-times "xvmuldp" 1 } } */ -/* { dg-final { scan-assembler-times "vperm" 1 } } */ -/* { dg-final { scan-assembler-times "xvrdpic" 1 } } */ -/* { dg-final { scan-assembler-times "xvsqrtdp" 1 } } */ -/* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */ -/* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */ -/* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */ -/* { dg-final { scan-assembler-times "vmsumshs" 1 } } */ -/* { dg-final { scan-assembler-times "xxland" 9 } } */ - -/* Source code for the test in vsx-vector-6.h */ -#include "vsx-vector-6.h" diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6.h b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6.h index 422f8a1ad478..a891b64e6faa 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6.h +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6.h @@ -7,7 +7,9 @@ void foo (vector double *out, vector double *in, vector long *p_l, vector bool long *p_b, vector unsigned char *p_uc, int *i, vector float *p_f, vector bool char *outbc, vector bool int *outbi, - vector bool short *outbsi, vector int *outsi, vector unsigned int *outui) + vector bool short *outbsi, vector int *outsi, + vector unsigned int *outui, vector signed char *outsc, + vector unsigned char *outuc) { vector double in0 = in[0]; vector double in1 = in[1]; @@ -20,6 +22,8 @@ void foo (vector double *out, vector double *in, vector long *p_l, vector bool l vector float inf0; vector float inf1; vector float inf2; + vector char inc0; + vector char inc1; vector bool char inbc0; vector bool char inbc1; vector bool short inbs0; @@ -30,6 +34,7 @@ void foo (vector double *out, vector double *in, vector long *p_l, vector bool l vector unsigned short int inusi0, inusi1; vector signed int insi0, insi1; vector unsigned int inui0, inui1; + vector unsigned char inuc0, inuc1; *out++ = vec_abs (in0); *out++ = vec_add (in0, in1); @@ -103,6 +108,7 @@ void foo (vector double *out, vector double *in, vector long *p_l, vector bool l *p_f++ = vec_nmsub (inf0, inf1, inf2); *p_f++ = vec_nmadd (inf0, inf1, inf2); *p_f++ = vec_or (inf0, inf1); + *p_f++ = vec_trunc (inf0); *out++ = vec_or (inbl0, in0); *out++ = vec_or (in0, inbl0); @@ -113,6 +119,8 @@ void foo (vector double *out, vector double *in, vector long *p_l, vector bool l *outbc++ = vec_andc (inbc0, inbc1); *outbc++ = vec_or (inbc0, inbc1); + *outuc++ = vec_max (inuc0, inuc1); + *outbi++ = vec_andc (inbi0, inbi1); *outbsi++ = vec_andc (inbs0, inbs1); @@ -151,7 +159,9 @@ int main() vector bool short *outbsi; vector int *outsi; vector unsigned int *outui; + vector signed char *outsc; + vector unsigned char *outuc; foo (out, in, p_l, p_b, p_uc, i, p_f, outbc, - outbi, outbsi, outsi, outui); + outbi, outbsi, outsi, outui, outsc, outuc); } diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c new file mode 100644 index 000000000000..68f40db7befa --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c @@ -0,0 +1,42 @@ +/* { dg-do compile { target { lp64 && be } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mvsx -O2 -mcpu=power7 -dp" } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ + +/* Expected instruction counts for Power 7 */ + +/* { dg-final { scan-assembler-times "xvabsdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvadddp" 1 } } */ +/* { dg-final { scan-assembler-times "xxlnor" 5 } } */ +/* { dg-final { scan-assembler-times {\mxvcmpeqdp\s} 1 } } */ +/* { dg-final { scan-assembler-times {\mxvcmpeqdp\.\s} 5 } } */ +/* { dg-final { scan-assembler-times {\mxvcmpgtdp\s} 2 } } */ +/* { dg-final { scan-assembler-times {\mxvcmpgtdp\.\s} 5 } } */ +/* { dg-final { scan-assembler-times {\mxvcmpgedp\s} 1 } } */ +/* { dg-final { scan-assembler-times {\mxvcmpgedp\.\s} 6 } } */ +/* { dg-final { scan-assembler-times "xvrdpim" 1 } } */ +/* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */ +/* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */ +/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvmindp" 1 } } */ +/* { dg-final { scan-assembler-times "xvmuldp" 1 } } */ +/* { dg-final { scan-assembler-times "vperm" 2 } } */ +/* { dg-final { scan-assembler-times "xvrdpic" 2 } } */ +/* { dg-final { scan-assembler-times "xvsqrtdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */ +/* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */ +/* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */ +/* { dg-final { scan-assembler-times "xvnmaddadp" 1 } } */ +/* { dg-final { scan-assembler-times "xvnmsubadp" 1 } } */ +/* { dg-final { scan-assembler-times "vmsumshs" 2 } } */ +/* { dg-final { scan-assembler-times "xxland" 13 } } */ +/* { dg-final { scan-assembler-times "xxlxor" 2 } } */ +/* { dg-final { scan-assembler-times "xxsel" 4 } } */ +/* { dg-final { scan-assembler-times "xvrdpip" 1 } } */ +/* { dg-final { scan-assembler-times "xvdivdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvrdpi" 7 } } */ + +/* Source code for the test in vsx-vector-6.h */ +#include "vsx-vector-6.h" diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c new file mode 100644 index 000000000000..5edff4ea52ea --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c @@ -0,0 +1,54 @@ +/* { dg-do compile { target lp64 } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mvsx -O2 -mcpu=power8" } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ + +/* Expected instruction counts for Power 8. */ + +/* { dg-final { scan-assembler-times "xvabsdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvadddp" 1 } } */ +/* { dg-final { scan-assembler-times "xxlnor" 6 { target le } } } */ +/* { dg-final { scan-assembler-times "xxlnor" 5 { target be } } } */ + +/* We generate xxlor instructions for many reasons other than or'ing vector + operands or calling __builtin_vec_or(), which means we cannot rely on + their usage counts being stable. Therefore, we just ensure at least one + xxlor instruction was generated. */ +/* { dg-final { scan-assembler "xxlor" } } */ + +/* { dg-final { scan-assembler-times {\mxvcmpeqdp\s} 0 { target le } } } */ +/* { dg-final { scan-assembler-times {\mxvcmpeqdp\s} 1 { target be } } } */ +/* { dg-final { scan-assembler-times {\mxvcmpeqdp\.\s} 6 { target le } } } */ +/* { dg-final { scan-assembler-times {\mxvcmpeqdp\.\s} 5 { target be } } } */ +/* { dg-final { scan-assembler-times {\mxvcmpgtdp\s} 2 } } */ +/* { dg-final { scan-assembler-times {\mxvcmpgtdp\.\s} 5 { target le } } } */ +/* { dg-final { scan-assembler-times {\mxvcmpgtdp\.\s} 6 { target le } } } */ +/* { dg-final { scan-assembler-times {\mxvcmpgedp\s} 2 } } */ +/* { dg-final { scan-assembler-times {\mxvcmpgedp\.\s} 4 } } */ +/* { dg-final { scan-assembler-times "xvrdpim" 1 } } */ +/* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */ +/* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */ +/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvmindp" 1 } } */ +/* { dg-final { scan-assembler-times "xvmuldp" 1 } } */ +/* { dg-final { scan-assembler-times "vperm" 1 } } */ +/* { dg-final { scan-assembler-times "xvrdpic" 1 } } */ +/* { dg-final { scan-assembler-times "xvsqrtdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */ +/* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */ +/* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */ +/* { dg-final { scan-assembler-times "xvnmaddadp" 1 } } */ +/* { dg-final { scan-assembler-times "xvnmsubadp" 1 } } */ +/* { dg-final { scan-assembler-times "vmsumshs" 1 } } */ +/* { dg-final { scan-assembler-times "xxland" 9 { target le } } } */ +/* { dg-final { scan-assembler-times "xxland" 13 { target be } } } */ +/* { dg-final { scan-assembler-times "xxlxor" 2 } } */ +/* { dg-final { scan-assembler-times "xxsel" 2 } } */ +/* { dg-final { scan-assembler-times "xvrdpip" 1 } } */ +/* { dg-final { scan-assembler-times "xvdivdp" 1 } } */ +/* { dg-final { scan-assembler-times "xvrdpi" 5 } } */ + +/* Source code for the test in vsx-vector-6.h */ +#include "vsx-vector-6.h" diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p9.c similarity index 56% rename from gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.c rename to gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p9.c index a33f6d1de279..48ac4a37143c 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p9.c @@ -1,16 +1,24 @@ -/* { dg-do compile { target { powerpc64-*-* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } } */ -/* { dg-require-effective-target powerpc_vsx_ok } */ -/* { dg-options "-mvsx -O2" } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-mvsx -O2 -mcpu=power9" } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ -/* Expected instruction counts for Big Endian */ +/* Expected instruction counts for Power9. */ /* { dg-final { scan-assembler-times "xvabsdp" 1 } } */ /* { dg-final { scan-assembler-times "xvadddp" 1 } } */ -/* { dg-final { scan-assembler-times "xxlnor" 7 } } */ -/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 } } */ -/* { dg-final { scan-assembler-times "xvcmpgtdp" 7 } } */ -/* { dg-final { scan-assembler-times "xvcmpgedp" 6 } } */ +/* { dg-final { scan-assembler-times "xxlnor" 5 } } */ + +/* We generate xxlor instructions for many reasons other than or'ing vector + operands or calling __builtin_vec_or(), which means we cannot rely on + their usage counts being stable. Therefore, we just ensure at least one + xxlor instruction was generated. */ +/* { dg-final { scan-assembler "xxlor" } } */ + +/* { dg-final { scan-assembler-times "xvcmpeqdp" 7 } } */ +/* { dg-final { scan-assembler-times "xvcmpgtdp" 8 } } */ +/* { dg-final { scan-assembler-times "xvcmpgedp" 7 } } */ /* { dg-final { scan-assembler-times "xvrdpim" 1 } } */ /* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */ /* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */ diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index f08535d43e1c..546edfd8db87 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -2365,6 +2365,22 @@ proc check_effective_target_next_runtime { } { }] } +# Return 1 if we're generating code for big-endian memory order. + +proc check_effective_target_be { } { + return [check_no_compiler_messages be object { + int dummy[__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ ? 1 : -1]; + }] +} + +# Return 1 if we're generating code for little-endian memory order. + +proc check_effective_target_le { } { + return [check_no_compiler_messages le object { + int dummy[__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ ? 1 : -1]; + }] +} + # Return 1 if we're generating 32-bit code using default options, 0 # otherwise.