From: Konrad Dybcio Date: Thu, 26 Jun 2025 09:02:29 +0000 (+0200) Subject: drm/msm: Offset MDSS HBB value by 13 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=227d4ce0b09eba29aa69740e43643afb9b41b229;p=thirdparty%2Fkernel%2Flinux.git drm/msm: Offset MDSS HBB value by 13 The Adreno part of the driver exposes this value to userspace, and the SMEM data source also presents a x+13 value. Keep things coherent and make the value uniform across them. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio Patchwork: https://patchwork.freedesktop.org/patch/660961/ Signed-off-by: Rob Clark --- diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c index 422da5ebf8026..597c8e6498531 100644 --- a/drivers/gpu/drm/msm/msm_mdss.c +++ b/drivers/gpu/drm/msm/msm_mdss.c @@ -167,7 +167,7 @@ static void msm_mdss_setup_ubwc_dec_20(struct msm_mdss *msm_mdss) { const struct msm_mdss_data *data = msm_mdss->mdss_data; u32 value = MDSS_UBWC_STATIC_UBWC_SWIZZLE(data->ubwc_swizzle) | - MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit); + MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit - 13); if (data->ubwc_bank_spread) value |= MDSS_UBWC_STATIC_UBWC_BANK_SPREAD; @@ -182,7 +182,7 @@ static void msm_mdss_setup_ubwc_dec_30(struct msm_mdss *msm_mdss) { const struct msm_mdss_data *data = msm_mdss->mdss_data; u32 value = MDSS_UBWC_STATIC_UBWC_SWIZZLE(data->ubwc_swizzle & 0x1) | - MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit); + MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit - 13); if (data->macrotile_mode) value |= MDSS_UBWC_STATIC_MACROTILE_MODE; @@ -200,7 +200,7 @@ static void msm_mdss_setup_ubwc_dec_40(struct msm_mdss *msm_mdss) { const struct msm_mdss_data *data = msm_mdss->mdss_data; u32 value = MDSS_UBWC_STATIC_UBWC_SWIZZLE(data->ubwc_swizzle) | - MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit); + MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit - 13); if (data->ubwc_bank_spread) value |= MDSS_UBWC_STATIC_UBWC_BANK_SPREAD; @@ -277,9 +277,9 @@ static const struct msm_mdss_data *msm_mdss_generate_mdp5_mdss_data(struct msm_m if (hw_rev == MDSS_HW_MSM8996 || hw_rev == MDSS_HW_MSM8998) - data->highest_bank_bit = 2; + data->highest_bank_bit = 15; else - data->highest_bank_bit = 1; + data->highest_bank_bit = 14; return data; } @@ -593,13 +593,13 @@ static void mdss_remove(struct platform_device *pdev) static const struct msm_mdss_data msm8998_data = { .ubwc_enc_version = UBWC_1_0, .ubwc_dec_version = UBWC_1_0, - .highest_bank_bit = 2, + .highest_bank_bit = 15, .reg_bus_bw = 76800, }; static const struct msm_mdss_data qcm2290_data = { /* no UBWC */ - .highest_bank_bit = 0x2, + .highest_bank_bit = 15, .reg_bus_bw = 76800, }; @@ -608,7 +608,7 @@ static const struct msm_mdss_data sa8775p_data = { .ubwc_dec_version = UBWC_4_0, .ubwc_swizzle = 4, .ubwc_bank_spread = true, - .highest_bank_bit = 0, + .highest_bank_bit = 13, .macrotile_mode = true, .reg_bus_bw = 74000, }; @@ -618,7 +618,7 @@ static const struct msm_mdss_data sar2130p_data = { .ubwc_dec_version = UBWC_4_3, .ubwc_swizzle = 6, .ubwc_bank_spread = true, - .highest_bank_bit = 0, + .highest_bank_bit = 13, .macrotile_mode = 1, .reg_bus_bw = 74000, }; @@ -628,7 +628,7 @@ static const struct msm_mdss_data sc7180_data = { .ubwc_dec_version = UBWC_2_0, .ubwc_swizzle = 6, .ubwc_bank_spread = true, - .highest_bank_bit = 0x1, + .highest_bank_bit = 14, .reg_bus_bw = 76800, }; @@ -637,7 +637,7 @@ static const struct msm_mdss_data sc7280_data = { .ubwc_dec_version = UBWC_4_0, .ubwc_swizzle = 6, .ubwc_bank_spread = true, - .highest_bank_bit = 1, + .highest_bank_bit = 14, .macrotile_mode = true, .reg_bus_bw = 74000, }; @@ -645,7 +645,7 @@ static const struct msm_mdss_data sc7280_data = { static const struct msm_mdss_data sc8180x_data = { .ubwc_enc_version = UBWC_3_0, .ubwc_dec_version = UBWC_3_0, - .highest_bank_bit = 3, + .highest_bank_bit = 16, .macrotile_mode = true, .reg_bus_bw = 76800, }; @@ -655,7 +655,7 @@ static const struct msm_mdss_data sc8280xp_data = { .ubwc_dec_version = UBWC_4_0, .ubwc_swizzle = 6, .ubwc_bank_spread = true, - .highest_bank_bit = 3, + .highest_bank_bit = 16, .macrotile_mode = true, .reg_bus_bw = 76800, }; @@ -663,14 +663,14 @@ static const struct msm_mdss_data sc8280xp_data = { static const struct msm_mdss_data sdm670_data = { .ubwc_enc_version = UBWC_2_0, .ubwc_dec_version = UBWC_2_0, - .highest_bank_bit = 1, + .highest_bank_bit = 14, .reg_bus_bw = 76800, }; static const struct msm_mdss_data sdm845_data = { .ubwc_enc_version = UBWC_2_0, .ubwc_dec_version = UBWC_2_0, - .highest_bank_bit = 2, + .highest_bank_bit = 15, .reg_bus_bw = 76800, }; @@ -679,21 +679,21 @@ static const struct msm_mdss_data sm6350_data = { .ubwc_dec_version = UBWC_2_0, .ubwc_swizzle = 6, .ubwc_bank_spread = true, - .highest_bank_bit = 1, + .highest_bank_bit = 14, .reg_bus_bw = 76800, }; static const struct msm_mdss_data sm7150_data = { .ubwc_enc_version = UBWC_2_0, .ubwc_dec_version = UBWC_2_0, - .highest_bank_bit = 1, + .highest_bank_bit = 14, .reg_bus_bw = 76800, }; static const struct msm_mdss_data sm8150_data = { .ubwc_enc_version = UBWC_3_0, .ubwc_dec_version = UBWC_3_0, - .highest_bank_bit = 2, + .highest_bank_bit = 15, .reg_bus_bw = 76800, }; @@ -702,7 +702,7 @@ static const struct msm_mdss_data sm6115_data = { .ubwc_dec_version = UBWC_2_0, .ubwc_swizzle = 7, .ubwc_bank_spread = true, - .highest_bank_bit = 0x1, + .highest_bank_bit = 14, .reg_bus_bw = 76800, }; @@ -710,13 +710,13 @@ static const struct msm_mdss_data sm6125_data = { .ubwc_enc_version = UBWC_1_0, .ubwc_dec_version = UBWC_3_0, .ubwc_swizzle = 1, - .highest_bank_bit = 1, + .highest_bank_bit = 14, }; static const struct msm_mdss_data sm6150_data = { .ubwc_enc_version = UBWC_2_0, .ubwc_dec_version = UBWC_2_0, - .highest_bank_bit = 1, + .highest_bank_bit = 14, .reg_bus_bw = 76800, }; @@ -726,7 +726,7 @@ static const struct msm_mdss_data sm8250_data = { .ubwc_swizzle = 6, .ubwc_bank_spread = true, /* TODO: highest_bank_bit = 2 for LP_DDR4 */ - .highest_bank_bit = 3, + .highest_bank_bit = 16, .macrotile_mode = true, .reg_bus_bw = 76800, }; @@ -737,7 +737,7 @@ static const struct msm_mdss_data sm8350_data = { .ubwc_swizzle = 6, .ubwc_bank_spread = true, /* TODO: highest_bank_bit = 2 for LP_DDR4 */ - .highest_bank_bit = 3, + .highest_bank_bit = 16, .macrotile_mode = true, .reg_bus_bw = 74000, }; @@ -748,7 +748,7 @@ static const struct msm_mdss_data sm8550_data = { .ubwc_swizzle = 6, .ubwc_bank_spread = true, /* TODO: highest_bank_bit = 2 for LP_DDR4 */ - .highest_bank_bit = 3, + .highest_bank_bit = 16, .macrotile_mode = true, .reg_bus_bw = 57000, }; @@ -759,7 +759,7 @@ static const struct msm_mdss_data sm8750_data = { .ubwc_swizzle = 6, .ubwc_bank_spread = true, /* TODO: highest_bank_bit = 2 for LP_DDR4 */ - .highest_bank_bit = 3, + .highest_bank_bit = 16, .macrotile_mode = true, .reg_bus_bw = 57000, }; @@ -770,7 +770,7 @@ static const struct msm_mdss_data x1e80100_data = { .ubwc_swizzle = 6, .ubwc_bank_spread = true, /* TODO: highest_bank_bit = 2 for LP_DDR4 */ - .highest_bank_bit = 3, + .highest_bank_bit = 16, .macrotile_mode = true, /* TODO: Add reg_bus_bw with real value */ };