From: Russell King (Oracle) Date: Wed, 27 Aug 2025 13:27:47 +0000 (+0100) Subject: net: stmmac: mdio: clean up c22/c45 accessor split X-Git-Tag: v6.18-rc1~132^2~304 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=24eb86a8170f129725b56c8a359089ce18ad6d6f;p=thirdparty%2Fkernel%2Flinux.git net: stmmac: mdio: clean up c22/c45 accessor split The C45 accessors were setting the GR (register number) field twice, once with the 16-bit register address truncated to five bits, and then overwritten with the C45 devad. This is harmless since the field was being cleared prior to being updated with the C45 devad, except for the extra work. Remove the redundant code. Signed-off-by: Russell King (Oracle) Reviewed-by: Simon Horman Link: https://patch.msgid.link/E1urGBn-00000000DCH-3swS@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski --- diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c index 86021e6b67b2e..da4542be756a1 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c @@ -311,12 +311,10 @@ static int stmmac_mdio_read_c45(struct mii_bus *bus, int phyaddr, int devad, value |= (phyaddr << priv->hw->mii.addr_shift) & priv->hw->mii.addr_mask; - value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask; value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift) & priv->hw->mii.clk_csr_mask; value |= MII_GMAC4_READ; value |= MII_GMAC4_C45E; - value &= ~priv->hw->mii.reg_mask; value |= (devad << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask; data |= phyreg << MII_GMAC4_REG_ADDR_SHIFT; @@ -409,14 +407,12 @@ static int stmmac_mdio_write_c45(struct mii_bus *bus, int phyaddr, value |= (phyaddr << priv->hw->mii.addr_shift) & priv->hw->mii.addr_mask; - value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask; value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift) & priv->hw->mii.clk_csr_mask; value |= MII_GMAC4_WRITE; value |= MII_GMAC4_C45E; - value &= ~priv->hw->mii.reg_mask; value |= (devad << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask; data |= phyreg << MII_GMAC4_REG_ADDR_SHIFT;