From: Julian Seward <jseward@acm.org>
Date: Tue, 29 Jul 2008 09:48:26 +0000 (+0000)
Subject: Handle Iop_ReinterpF32asI32, as needed for exp-ptrcheck.
X-Git-Tag: svn/VALGRIND_3_4_1^2~21
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2506bad572ca3765655e07279fb7689b7e4232bf;p=thirdparty%2Fvalgrind.git

Handle Iop_ReinterpF32asI32, as needed for exp-ptrcheck.


git-svn-id: svn://svn.valgrind.org/vex/trunk@1859
---

diff --git a/VEX/priv/host-amd64/isel.c b/VEX/priv/host-amd64/isel.c
index ef9dbc1dc9..26af4935ba 100644
--- a/VEX/priv/host-amd64/isel.c
+++ b/VEX/priv/host-amd64/isel.c
@@ -1607,6 +1607,20 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
             return dst;
          }
 
+         /* ReinterpF32asI32(e) */
+         /* Given an IEEE754 single, produce an I64 with the same bit
+            pattern in the lower half. */
+         case Iop_ReinterpF32asI32: {
+            AMD64AMode* m8_rsp = AMD64AMode_IR(-8, hregAMD64_RSP());
+            HReg        dst    = newVRegI(env);
+            HReg        src    = iselFltExpr(env, e->Iex.Unop.arg);
+            /* paranoia */
+            set_SSE_rounding_default(env);
+            addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 4, src, m8_rsp));
+            addInstr(env, AMD64Instr_LoadEX(4, False/*unsigned*/, m8_rsp, dst ));
+            return dst;
+         }
+
          case Iop_16to8:
          case Iop_32to8:
          case Iop_64to8: