From: Pan Li <pan2.li@intel.com>
Date: Wed, 4 Feb 2026 04:55:28 +0000 (+0800)
Subject: RISC-V: Introduce vr2fpr-cost= for customizing the cost when vr2fpr
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=25d819a6e4dd32b786120a3f4d0f23eed15762f7;p=thirdparty%2Fgcc.git

RISC-V: Introduce vr2fpr-cost= for customizing the cost when vr2fpr

Similar to vr2gpr-cost=, add the one for fpr as well.

	PR/target 123916

gcc/ChangeLog:

	* config/riscv/riscv-opts.h (VR2FPR_COST_UNPROVIDED): Add new
	sentinel for unprovided cost.
	* config/riscv/riscv-protos.h (get_vr2fr_cost): Add new func
	decl.
	* config/riscv/riscv-vector-costs.cc (costs::adjust_stmt_cost):
	Leverage new func to get cost of vr2fpr.
	* config/riscv/riscv.cc (riscv_register_move_cost): Ditto.
	(get_vr2fr_cost): Add new func to wrap access to the cost
	of the vr2fpr.
	* config/riscv/riscv.opt: Add new param vr2fpr-cost.

Signed-off-by: Pan Li <pan2.li@intel.com>
---

diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index ab67d231d43..1c44bc4e6ec 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -176,6 +176,7 @@ enum riscv_tls_type {
 #define GPR2VR_COST_UNPROVIDED COST_UNPROVIDED
 #define VR2GPR_COST_UNPROVIDED COST_UNPROVIDED
 #define FPR2VR_COST_UNPROVIDED COST_UNPROVIDED
+#define VR2FPR_COST_UNPROVIDED COST_UNPROVIDED
 
 /* Extra extension flags, used for carry extra info for a RISC-V extension.  */
 enum
diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index 2c163ddc324..0734c31ec56 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -880,6 +880,7 @@ const cpu_vector_cost *get_vector_costs ();
 int get_gr2vr_cost ();
 int get_vr2gr_cost ();
 int get_fr2vr_cost ();
+int get_vr2fr_cost ();
 
 enum
 {
diff --git a/gcc/config/riscv/riscv-vector-costs.cc b/gcc/config/riscv/riscv-vector-costs.cc
index b9012a52893..f582551eba7 100644
--- a/gcc/config/riscv/riscv-vector-costs.cc
+++ b/gcc/config/riscv/riscv-vector-costs.cc
@@ -1253,8 +1253,8 @@ costs::adjust_stmt_cost (enum vect_cost_for_stmt kind, loop_vec_info loop,
 	+= (FLOAT_TYPE_P (vectype) ? get_fr2vr_cost () : get_gr2vr_cost ());
       break;
     case vec_to_scalar:
-      stmt_cost += (FLOAT_TYPE_P (vectype) ? costs->regmove->VR2FR
-		    : get_vr2gr_cost ());
+      stmt_cost
+	+= (FLOAT_TYPE_P (vectype) ? get_vr2fr_cost () : get_vr2gr_cost ());
       break;
     case vector_load:
     case vector_store:
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 1bb8f98ddb5..8b22556b546 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -10730,7 +10730,7 @@ riscv_register_move_cost (machine_mode mode,
       if (to_is_gpr)
 	return get_vr2gr_cost ();
       else if (to_is_fpr)
-	return get_vector_costs ()->regmove->VR2FR;
+	return get_vr2fr_cost ();
     }
 
   if (to == V_REGS)
@@ -14243,6 +14243,21 @@ get_fr2vr_cost ()
   return cost;
 }
 
+/* Return the cost of moving data from floating-point to vector register.
+   It will take the value of --param=fpr2vr-cost if it is provided.
+   Otherwise the default regmove->FR2VR will be returned.  */
+
+int
+get_vr2fr_cost ()
+{
+  int cost = get_vector_costs ()->regmove->VR2FR;
+
+  if (vr2fpr_cost != VR2FPR_COST_UNPROVIDED)
+    cost = vr2fpr_cost;
+
+  return cost;
+}
+
 /* Implement targetm.vectorize.builtin_vectorization_cost.  */
 
 static int
diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index 4a2d8ed2408..2c26ee99691 100644
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -294,6 +294,10 @@ Set the cost value of the rvv instruction when operate from VR to GPR .
 Target RejectNegative Joined UInteger Var(fpr2vr_cost) Init(FPR2VR_COST_UNPROVIDED)
 Set the cost value of the rvv instruction when operate from FPR to VR.
 
+-param=vr2fpr-cost=
+Target RejectNegative Joined UInteger Var(vr2fpr_cost) Init(VR2FPR_COST_UNPROVIDED)
+Set the cost value of the rvv instruction when operate from VR to FPR.
+
 -param=riscv-autovec-mode=
 Target Undocumented RejectNegative Joined Var(riscv_autovec_mode) Save
 Set the only autovec mode to try.