From: Mark Brown Date: Thu, 14 Nov 2024 11:43:39 +0000 (+0000) Subject: spi: imx: support word delay in ecspi X-Git-Tag: v6.13-rc1~158^2 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=26470a2e87a6fc40750f4bfe962519e9ae9a9e72;p=thirdparty%2Fkernel%2Flinux.git spi: imx: support word delay in ecspi Merge series from Jonas Rebmann : The i.MX SPI controller supports inserting a configurable delay between subsequent words, which is needed for some slower devices that couldn't keep up otherwise. This patch series introduces support for the word delay parameters for i.MX51 onwards. The SPI clock (CSRC=0) was chosen as the clock source over the also available 32.768 KHz Low-Frequency Reference Clock (CSRC=1). The sample period control bits (SAMPLE_PERIOD) are set to the selected word delay converted to SPI clock cycles. A deviation from the requested number of wait cycles and the actual word delay was observed via both software timings and oscilloscope measurements and accounted for. The Chip Select Delay Control bits in the Sample Period Control Register remain zero. Behaviour on i.MX35 and earlier, where the CSPI interface is used, remains unchanged. --- 26470a2e87a6fc40750f4bfe962519e9ae9a9e72