From: Julian Seward <jseward@acm.org>
Date: Sun, 14 May 2017 13:00:07 +0000 (+0000)
Subject: Implement "mrs <reg>, cntfrq_el0".  Fixes #368868.
X-Git-Tag: svn/VALGRIND_3_13_0^2~17
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=26e1e98b69a5b7e65ef0fe65688c9dd756afa232;p=thirdparty%2Fvalgrind.git

Implement "mrs <reg>, cntfrq_el0".  Fixes #368868.


git-svn-id: svn://svn.valgrind.org/vex/trunk@3368
---

diff --git a/VEX/priv/guest_arm64_defs.h b/VEX/priv/guest_arm64_defs.h
index cba6dd821f..b28f326c28 100644
--- a/VEX/priv/guest_arm64_defs.h
+++ b/VEX/priv/guest_arm64_defs.h
@@ -124,6 +124,8 @@ extern ULong arm64g_calc_crc32cx ( ULong acc, ULong bits );
 
 extern ULong arm64g_dirtyhelper_MRS_CNTVCT_EL0 ( void );
 
+extern ULong arm64g_dirtyhelper_MRS_CNTFRQ_EL0 ( void );
+
 extern void  arm64g_dirtyhelper_PMULLQ ( /*OUT*/V128* res,
                                          ULong arg1, ULong arg2 );
 
diff --git a/VEX/priv/guest_arm64_helpers.c b/VEX/priv/guest_arm64_helpers.c
index b2d6813e0e..10065d5470 100644
--- a/VEX/priv/guest_arm64_helpers.c
+++ b/VEX/priv/guest_arm64_helpers.c
@@ -774,6 +774,21 @@ ULong arm64g_dirtyhelper_MRS_CNTVCT_EL0 ( void )
 }
 
 
+/* CALLED FROM GENERATED CODE */
+/* DIRTY HELPER (non-referentially-transparent) */
+/* Horrible hack.  On non-arm64 platforms, return 0. */
+ULong arm64g_dirtyhelper_MRS_CNTFRQ_EL0 ( void )
+{
+#  if defined(__aarch64__) && !defined(__arm__)
+   ULong w = 0x5555555555555555ULL; /* overwritten */
+   __asm__ __volatile__("mrs %0, cntfrq_el0" : "=r"(w));
+   return w;
+#  else
+   return 0ULL;
+#  endif
+}
+
+
 void arm64g_dirtyhelper_PMULLQ ( /*OUT*/V128* res, ULong arg1, ULong arg2 )
 {
    /* This doesn't need to be a dirty helper, except for the fact that
diff --git a/VEX/priv/guest_arm64_toIR.c b/VEX/priv/guest_arm64_toIR.c
index a3cef994fc..aaf62f86bb 100644
--- a/VEX/priv/guest_arm64_toIR.c
+++ b/VEX/priv/guest_arm64_toIR.c
@@ -7008,6 +7008,27 @@ Bool dis_ARM64_branch_etc(/*MB_OUT*/DisResult* dres, UInt insn,
       DIP("mrs %s, cntvct_el0\n", nameIReg64orZR(tt));
       return True;
    }   
+   /* ---- Cases for CNTFRQ_EL0 ----
+      This is always RO at EL0, so it's safe to pass through to the host.
+      D5 3B E0 000 Rt  MRS Xt, cntfrq_el0
+   */
+   if ((INSN(31,0) & 0xFFFFFFE0) == 0xD53BE000) {
+      UInt     tt   = INSN(4,0);
+      IRTemp   val  = newTemp(Ity_I64);
+      IRExpr** args = mkIRExprVec_0();
+      IRDirty* d    = unsafeIRDirty_1_N ( 
+                         val, 
+                         0/*regparms*/, 
+                         "arm64g_dirtyhelper_MRS_CNTFRQ_EL0",
+                         &arm64g_dirtyhelper_MRS_CNTFRQ_EL0,
+                         args 
+                      );
+      /* execute the dirty call, dumping the result in val. */
+      stmt( IRStmt_Dirty(d) );
+      putIReg64orZR(tt, mkexpr(val));
+      DIP("mrs %s, cntfrq_el0\n", nameIReg64orZR(tt));
+      return True;
+   }   
 
    /* ------------------ IC_IVAU ------------------ */
    /* D5 0B 75 001 Rt  ic ivau, rT