From: Andreas Schwab <schwab@suse.de>
Date: Thu, 9 Feb 2023 09:40:39 +0000 (+0100)
Subject: testsuite: adjust patterns in RISC-V tests to skip unwind table directives
X-Git-Tag: basepoints/gcc-14~1226
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=26f4b055d97804666d6d144b2af9b9dee0854354;p=thirdparty%2Fgcc.git

testsuite: adjust patterns in RISC-V tests to skip unwind table directives

gcc/testsuite/
	PR target/108723
	* gcc.target/riscv/shorten-memrefs-1.c: Adjust patterns to skip
	over cfi directives.
	* gcc.target/riscv/shorten-memrefs-2.c: Likewise.
	* gcc.target/riscv/shorten-memrefs-3.c: Likewise.
	* gcc.target/riscv/shorten-memrefs-4.c: Likewise.
	* gcc.target/riscv/shorten-memrefs-5.c: Likewise.
	* gcc.target/riscv/shorten-memrefs-6.c: Likewise.
	* gcc.target/riscv/shorten-memrefs-8.c: Likewise.
---

diff --git a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-1.c b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-1.c
index f0222f46effe..cce7c80f6c15 100644
--- a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-1.c
+++ b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-1.c
@@ -23,5 +23,5 @@ store2z (long long *array)
   array[203] = 0;
 }
 
-/* { dg-final { scan-assembler-not "store1z:\n\taddi" } } */
-/* { dg-final { scan-assembler-not "store2z:\n\taddi" } } */
+/* { dg-final { scan-assembler-not "store1z:\n(\t?\\.\[^\n\]*\n)\taddi" } } */
+/* { dg-final { scan-assembler-not "store2z:\n(\t?\\.\[^\n\]*\n)\taddi" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-2.c b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-2.c
index ec39104fd885..a9ddb797d06a 100644
--- a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-2.c
+++ b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-2.c
@@ -44,9 +44,9 @@ load2r (long long *array)
   return a;
 }
 
-/* { dg-final { scan-assembler "store1a:\n\taddi" } } */
+/* { dg-final { scan-assembler "store1a:\n(\t?\\.\[^\n\]*\n)*\taddi" } } */
 /* The sd insns in store2a are not rewritten because shorten_memrefs currently
    only optimizes lw and sw.
-/* { dg-final { scan-assembler "store2a:\n\taddi" { xfail riscv*-*-*  } } } */
-/* { dg-final { scan-assembler "load1r:\n\taddi" } } */
-/* { dg-final { scan-assembler "load2r:\n\taddi" } } */
+/* { dg-final { scan-assembler "store2a:\n(\t?\\.\[^\n\]*\n)*\taddi" { xfail riscv*-*-*  } } } */
+/* { dg-final { scan-assembler "load1r:\n(\t?\\.\[^\n\]*\n)*\taddi" } } */
+/* { dg-final { scan-assembler "load2r:\n(\t?\\.\[^\n\]*\n)*\taddi" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-3.c b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-3.c
index 50316284832a..3d561124b818 100644
--- a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-3.c
+++ b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-3.c
@@ -36,5 +36,5 @@ load2a (long long a0, long long a1, long long a2, long long a3, long long a4,
   return sub2 (a0, a1, a2, a3, a4, 0, a);
 }
 
-/* { dg-final { scan-assembler-not "load1a:\n\taddi" { xfail riscv*-*-* } } } */
+/* { dg-final { scan-assembler-not "load1a:\n(\t?\\.\[^\n\]*\n)*\taddi" { xfail riscv*-*-* } } } */
 /* { dg-final { scan-assembler-not "load2a:\n.*addi\[ \t\]*\[at\]\[0-9\],\[at\]\[0-9\],\[0-9\]*" { xfail riscv*-*-*  } } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-4.c b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-4.c
index d985512e2b31..26decf085fbc 100644
--- a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-4.c
+++ b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-4.c
@@ -23,5 +23,5 @@ store2z (long long *array)
   array[203] = 0;
 }
 
-/* { dg-final { scan-assembler-not "store1z:\n\taddi" } } */
-/* { dg-final { scan-assembler-not "store2z:\n\taddi" } } */
+/* { dg-final { scan-assembler-not "store1z:\n(\t?\\.\[^\n\]*\n)\taddi" } } */
+/* { dg-final { scan-assembler-not "store2z:\n(\t?\\.\[^\n\]*\n)\taddi" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-5.c b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-5.c
index 9217922c10d7..11e858ed6da0 100644
--- a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-5.c
+++ b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-5.c
@@ -44,11 +44,11 @@ load2r (long long *array)
   return a;
 }
 
-/* { dg-final { scan-assembler "store1a:\n\taddi" } } */
+/* { dg-final { scan-assembler "store1a:\n(\t?\\.\[^\n\]*\n)*\taddi" } } */
 /* The sd insns in store2a are not rewritten because shorten_memrefs currently
    only optimizes lw and sw.
-/* { dg-final { scan-assembler "store2a:\n\taddi" { xfail riscv*-*-* } } } */
-/* { dg-final { scan-assembler "load1r:\n\taddi" } } */
+/* { dg-final { scan-assembler "store2a:\n(\t?\\.\[^\n\]*\n)*\taddi" { xfail riscv*-*-* } } } */
+/* { dg-final { scan-assembler "load1r:\n(\t?\\.\[^\n\]*\n)*\taddi" } } */
 /* The ld insns in load2r are not rewritten because shorten_memrefs currently
    only optimizes lw and sw.
-/* { dg-final { scan-assembler "load2r:\n\taddi" { xfail riscv*-*-* } } } */
+/* { dg-final { scan-assembler "load2r:\n(\t?\\.\[^\n\]*\n)*\taddi" { xfail riscv*-*-* } } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-6.c b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-6.c
index c36af6d6a5d4..b6539b76aafd 100644
--- a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-6.c
+++ b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-6.c
@@ -36,5 +36,5 @@ load2a (long long a0, long long a1, long long a2, long long a3, long long a4,
   return sub2 (a0, a1, a2, a3, a4, 0, a);
 }
 
-/* { dg-final { scan-assembler-not "load1a:\n\taddi" { xfail riscv*-*-* } } } */
+/* { dg-final { scan-assembler-not "load1a:\n(\t?\\.\[^\n\]*\n)*\taddi" { xfail riscv*-*-* } } } */
 /* { dg-final { scan-assembler-not "load2a:\n.*addi\[ \t\]*\[at\]\[0-9\],\[at\]\[0-9\],\[0-9\]*" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-8.c b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-8.c
index 6dfc015cf3a6..3ff6956b33e4 100644
--- a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-8.c
+++ b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-8.c
@@ -23,6 +23,6 @@ load (char *p)
   return a;
 }
 
-/* { dg-final { scan-assembler "store:\n\taddi\ta\[0-7\],a\[0-7\],1" } } */
-/* { dg-final { scan-assembler "load:\n\taddi\ta\[0-7\],a\[0-7\],1" } } */
+/* { dg-final { scan-assembler "store:\n(\t?\\.\[^\n\]*\n)*\taddi\ta\[0-7\],a\[0-7\],1" } } */
+/* { dg-final { scan-assembler "load:\n(\t?\\.\[^\n\]*\n)*\taddi\ta\[0-7\],a\[0-7\],1" } } */