From: Julian Seward Date: Fri, 21 Jan 2005 20:55:36 +0000 (+0000) Subject: Fix various compilation warnings emitted by icc, mostly to do with X-Git-Tag: svn/VALGRIND_3_0_1^2~599 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2790eda3b181f587ee0c982369e7324f44ea708a;p=thirdparty%2Fvalgrind.git Fix various compilation warnings emitted by icc, mostly to do with dead code -- it is better at spotting it than gcc is. git-svn-id: svn://svn.valgrind.org/vex/trunk@735 --- diff --git a/VEX/priv/guest-arm/toIR.c b/VEX/priv/guest-arm/toIR.c index f107fd4ba3..297baa6d08 100644 --- a/VEX/priv/guest-arm/toIR.c +++ b/VEX/priv/guest-arm/toIR.c @@ -914,7 +914,7 @@ static HChar* name_ARMDataProcOp ( UChar opc ) ARM ARM A5-48 */ static -Bool dis_loadstore_mult ( theInstr ) +Bool dis_loadstore_mult ( UInt theInstr ) { UChar flags = (theInstr >> 20) & 0x1F; // theInstr[24:20] UChar Rn_addr = (theInstr >> 16) & 0xF; diff --git a/VEX/priv/guest-x86/ghelpers.c b/VEX/priv/guest-x86/ghelpers.c index 19ca1359cf..e983cbad4e 100644 --- a/VEX/priv/guest-x86/ghelpers.c +++ b/VEX/priv/guest-x86/ghelpers.c @@ -733,13 +733,12 @@ IRExpr* guest_x86_spechelper ( Char* function_name, if (vex_streq(function_name, "x86g_calculate_condition")) { /* specialise calls to above "calculate condition" function */ - IRExpr *cond, *cc_op, *cc_dep1, *cc_dep2, *cc_ndep; + IRExpr *cond, *cc_op, *cc_dep1, *cc_dep2; vassert(arity == 5); cond = args[0]; cc_op = args[1]; cc_dep1 = args[2]; cc_dep2 = args[3]; - cc_ndep = args[4]; /*---------------- ADDL ----------------*/ @@ -987,7 +986,6 @@ UInt x86g_calculate_FXAM ( UInt tag, ULong dbl ) Bool mantissaIsZero; Int bexp; UChar sign; - UInt c1; UChar* f64; vassert(host_is_little_endian()); @@ -1007,8 +1005,6 @@ UInt x86g_calculate_FXAM ( UInt tag, ULong dbl ) bexp = (f64[7] << 4) | ((f64[6] >> 4) & 0x0F); bexp &= 0x7FF; - c1 = ((UInt)sign) << 9; - mantissaIsZero = (f64[6] & 0x0F) == 0 && (f64[5] | f64[4] | f64[3] | f64[2] | f64[1] | f64[0]) == 0; diff --git a/VEX/priv/guest-x86/toIR.c b/VEX/priv/guest-x86/toIR.c index d4251d91f3..8295eadc32 100644 --- a/VEX/priv/guest-x86/toIR.c +++ b/VEX/priv/guest-x86/toIR.c @@ -5499,12 +5499,9 @@ UInt dis_MMX ( Bool* decode_ok, UChar sorb, Int sz, UInt delta ) case 0x72: case 0x73: { /* (sz==4): PSLLgg/PSRAgg/PSRLgg mmxreg by imm8 */ - UChar byte1, byte2, subopc; - void* hAddr; - Char* hName; + UChar byte2, subopc; if (sz != 4) goto mmx_decode_failure; - byte1 = opc; /* 0x71/72/73 */ byte2 = getIByte(delta); /* amode / sub-opcode */ subopc = (byte2 >> 3) & 7; @@ -5512,9 +5509,6 @@ UInt dis_MMX ( Bool* decode_ok, UChar sorb, Int sz, UInt delta ) do { delta = dis_MMX_shiftE_imm(delta,_name,_op); \ } while (0) - hAddr = NULL; - hName = NULL; - if (subopc == 2 /*SRL*/ && opc == 0x71) SHIFT_BY_IMM("psrlw", Iop_ShrN16x4); else if (subopc == 2 /*SRL*/ && opc == 0x72) @@ -6195,7 +6189,7 @@ UInt dis_xadd_G_E ( UChar sorb, Int sz, UInt delta0 ) IRTemp tmpt1 = newTemp(ty); if (epartIsReg(rm)) { - vassert(0); + unimplemented("x86 xadd instruction with register operand"); #if 0 uInstr2(cb, GET, sz, ArchReg, eregOfRM(rm), TempReg, tmpd); uInstr2(cb, GET, sz, ArchReg, gregOfRM(rm), TempReg, tmpt); diff --git a/VEX/priv/host-arm/isel.c b/VEX/priv/host-arm/isel.c index 6b239c71e1..6ceaa4507f 100644 --- a/VEX/priv/host-arm/isel.c +++ b/VEX/priv/host-arm/isel.c @@ -828,7 +828,7 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt ) /* --------- Call to DIRTY helper --------- */ /* call complex ("dirty") helper function */ case Ist_Dirty: { - IRType retty; + //IRType retty; IRDirty* d = stmt->Ist.Dirty.details; Bool passBBP = False; @@ -844,7 +844,7 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt ) /* No return value. Nothing to do. */ return; - retty = typeOfIRTemp(env->type_env, d->tmp); + //retty = typeOfIRTemp(env->type_env, d->tmp); // CAB: ? if (retty == Ity_I64) { diff --git a/VEX/priv/host-generic/h_generic_regs.c b/VEX/priv/host-generic/h_generic_regs.c index 94d3274f6b..1692d119c7 100644 --- a/VEX/priv/host-generic/h_generic_regs.c +++ b/VEX/priv/host-generic/h_generic_regs.c @@ -55,8 +55,8 @@ void ppHRegClass ( HRegClass hrc ) /* Generic printing for registers. */ void ppHReg ( HReg r ) { - Char* maybe_v = hregIsVirtual(r) ? "v" : ""; - Int regNo = hregNumber(r); + HChar* maybe_v = hregIsVirtual(r) ? "v" : ""; + Int regNo = hregNumber(r); switch (hregClass(r)) { case HRcInt32: vex_printf("%%%sr%d", maybe_v, regNo); return; case HRcInt64: vex_printf("%%%sR%d", maybe_v, regNo); return; diff --git a/VEX/priv/host-generic/h_generic_simd64.c b/VEX/priv/host-generic/h_generic_simd64.c index 5255fc1cac..c118984c0a 100644 --- a/VEX/priv/host-generic/h_generic_simd64.c +++ b/VEX/priv/host-generic/h_generic_simd64.c @@ -354,11 +354,6 @@ static inline UChar min8U ( UChar xx, UChar yy ) return (xx < yy) ? xx : yy; } -static inline UChar abdU8 ( UChar xx, UChar yy ) -{ - return xx>yy ? xx-yy : yy-xx; -} - /* ----------------------------------------------------- */ /* Start of the externally visible functions. These simply implement the corresponding IR primops. */ diff --git a/VEX/priv/ir/iropt.c b/VEX/priv/ir/iropt.c index ad86ce8781..bb0b8d0751 100644 --- a/VEX/priv/ir/iropt.c +++ b/VEX/priv/ir/iropt.c @@ -3503,7 +3503,6 @@ IRBB* do_iropt_BB ( IRBB* bb0, static UInt n_total = 0; static UInt n_expensive = 0; - Bool show_res = False; Bool do_expensive; IRBB *bb, *bb2; @@ -3534,7 +3533,6 @@ IRBB* do_iropt_BB ( IRBB* bb0, do_expensive = hasGetIorPutI(bb); if (do_expensive) { n_expensive++; - //show_res = True; if (DEBUG_IROPT) vex_printf("***** EXPENSIVE %d %d\n", n_total, n_expensive); bb = expensive_transformations( bb ); @@ -3546,7 +3544,6 @@ IRBB* do_iropt_BB ( IRBB* bb0, bb2 = maybe_loop_unroll_BB( bb, guest_addr ); if (bb2) { - show_res = False; //True; bb = cheap_transformations( bb2, specHelper, preciseMemExnsFn ); if (do_expensive) { bb = expensive_transformations( bb );