From: Carl Love Date: Tue, 1 Feb 2022 21:29:30 +0000 (+0000) Subject: Fix setting condition code for Vector Compare quad word instructions. X-Git-Tag: VALGRIND_3_19_0~42 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=27fc72dfb185733fed3dfd974ad2e7c5476852f6;p=thirdparty%2Fvalgrind.git Fix setting condition code for Vector Compare quad word instructions. The vcmpgtsq., vcmpgtuq,, vcmpequq. instructions set the condition code field 6 to 0b1000 for true, 0b0010 for false. The condition code was being set according to the typical condition code values for equal and greater than which is incorrect for these instructions. The patch fixes the setting of the condition code as specified in the instructions. --- diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c index 543fa95743..b2ff4bfe2a 100644 --- a/VEX/priv/guest_ppc_toIR.c +++ b/VEX/priv/guest_ppc_toIR.c @@ -29155,9 +29155,15 @@ static Bool dis_vx_quadword_arith ( UInt prefix, UInt theInstr ) assign ( eq, Quad_precision_int_eq( vA, vB ) ); - assign( cc, binop( Iop_Shl32, - unop( Iop_1Uto32, mkexpr( eq ) ), - mkU8( 1 ) ) ); + /* if true cc = 0b0100, if flase cc= 0b0010 */ + assign( cc, binop( Iop_Or32, + binop( Iop_Shl32, + unop( Iop_1Uto32, mkexpr( eq ) ), + mkU8( 3 ) ), + binop( Iop_Shl32, + unop( Iop_1Uto32, + unop( Iop_Not1, mkexpr( eq ) ) ), + mkU8( 1 ) ) ) ); if (Rc) putGST_field( PPC_GST_CR, mkexpr( cc ), cc_field ); @@ -29190,10 +29196,15 @@ static Bool dis_vx_quadword_arith ( UInt prefix, UInt theInstr ) assign ( gt, Quad_precision_sint_gt( vA, vB ) ); } - assign( cc, binop( Iop_Shl32, - unop( Iop_1Uto32, mkexpr( gt ) ), - mkU8( 2 ) ) ); - + /* if true cc = 0b0100, if flase cc= 0b0010 */ + assign( cc, binop( Iop_Or32, + binop( Iop_Shl32, + unop( Iop_1Uto32, mkexpr( gt ) ), + mkU8( 3 ) ), + binop( Iop_Shl32, + unop( Iop_1Uto32, + unop( Iop_Not1, mkexpr( gt ) ) ), + mkU8( 1 ) ) ) ); if (Rc) putGST_field( PPC_GST_CR, mkexpr( cc ), cc_field ); putVReg( vT_addr, binop( Iop_64HLtoV128,