From: Julian Seward <jseward@acm.org>
Date: Sun, 29 Apr 2007 10:28:33 +0000 (+0000)
Subject: Merge r1747 (Fold Add8(t,t) ==> t << 1.  Fixes #143817 (Unused
X-Git-Tag: svn/VALGRIND_3_2_3^2~5
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=28d4f8826a4f13a8471452e4f8afc3fadec6626d;p=thirdparty%2Fvalgrind.git

Merge r1747 (Fold Add8(t,t) ==> t << 1.  Fixes #143817 (Unused
bitfield pad bits confuse memcheck))



git-svn-id: svn://svn.valgrind.org/vex/branches/VEX_3_2_BRANCH@1756
---

diff --git a/VEX/priv/ir/iropt.c b/VEX/priv/ir/iropt.c
index d579d0852e..31e4cdb0a6 100644
--- a/VEX/priv/ir/iropt.c
+++ b/VEX/priv/ir/iropt.c
@@ -1431,6 +1431,18 @@ static IRExpr* fold_Expr ( IRExpr* e )
                               IRExpr_Const(IRConst_U8(1)));
          } else
 
+         /* Add8(t,t) ==> t << 1;  rationale as for Add32(t,t) above. */
+         if (e->Iex.Binop.op == Iop_Add8
+             && e->Iex.Binop.arg1->tag == Iex_Tmp
+             && e->Iex.Binop.arg2->tag == Iex_Tmp
+             && e->Iex.Binop.arg1->Iex.Tmp.tmp 
+                == e->Iex.Binop.arg2->Iex.Tmp.tmp) {
+            e2 = IRExpr_Binop(Iop_Shl8,
+                              e->Iex.Binop.arg1,
+                              IRExpr_Const(IRConst_U8(1)));
+         } else
+         /* NB no Add16(t,t) case yet as no known test case exists */
+
          /* Or64/Add64(x,0) ==> x */
          if ((e->Iex.Binop.op == Iop_Add64 || e->Iex.Binop.op == Iop_Or64)
              && e->Iex.Binop.arg2->tag == Iex_Const