From: Luis Machado <luis.machado@arm.com>
Date: Thu, 1 Oct 2020 04:38:35 +0000 (-0300)
Subject: [Morello] Add register aliases for Morello (cfp, clr, c31, cip0 and cip1)
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=291b52aee4f98e63dbe45c379fe9cafd7c06fbb1;p=thirdparty%2Fbinutils-gdb.git

[Morello] Add register aliases for Morello (cfp, clr, c31, cip0 and cip1)

This patch adds cfp, clr, c31, cip0 and cip1, aliased to c29, c30, c31, c16 and
c17.

gdb/ChangeLog:

2020-10-20  Luis Machado  <luis.machado@arm.com>

	* aarch64-tdep.c (aarch64_morello_register_aliases): New static global.
	(aarch64_gdbarch_init): Initialize alias registers.
---

diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index 01d1e327da3..29c71f02600 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -188,6 +188,25 @@ static const struct
   {"ip1", AARCH64_X0_REGNUM + 17}
 };
 
+/* A couple register aliases for Morello.  We leave the register numbers
+   undefined because those are assigned dynamically based on the various
+   features a particular system supports.
+
+   We need the static storage so we can pass a register number reference to
+   GDB's hooks.  */
+static struct
+{
+  const char *const name;
+  int regnum;
+} aarch64_morello_register_aliases[] =
+{
+  {"cip0", -1},
+  {"cip1", -1},
+  {"cfp", -1},
+  {"clr", -1},
+  {"c31", -1}
+};
+
 /* The required capability 'C' registers.  */
 static const char *const aarch64_c_register_names[] =
 {
@@ -3980,6 +3999,23 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
       set_gdbarch_pointer_to_address (gdbarch, aarch64_pointer_to_address);
       set_gdbarch_address_to_pointer (gdbarch, aarch64_address_to_pointer);
       set_gdbarch_integer_to_address (gdbarch, aarch64_integer_to_address);
+
+      /* Create the Morello register aliases.  */
+      /* cip0 and cip1 */
+      aarch64_morello_register_aliases[0].regnum = tdep->cap_reg_base + 16;
+      aarch64_morello_register_aliases[1].regnum = tdep->cap_reg_base + 17;
+      /* cfp */
+      aarch64_morello_register_aliases[2].regnum = tdep->cap_reg_base + 29;
+      /* clr */
+      aarch64_morello_register_aliases[3].regnum = tdep->cap_reg_base + 30;
+      /* c31 */
+      aarch64_morello_register_aliases[4].regnum = tdep->cap_reg_base + 31;
+
+
+      for (i = 0; i < ARRAY_SIZE (aarch64_morello_register_aliases); i++)
+	user_reg_add (gdbarch, aarch64_morello_register_aliases[i].name,
+		      value_of_aarch64_user_reg,
+		      &aarch64_morello_register_aliases[i].regnum);
     }
 
   return gdbarch;