From: Julian Seward Date: Sat, 14 Jul 2018 13:47:32 +0000 (+0200) Subject: arm64 front end: add spec rules for {EQ,NE} after {LOGIC32,LOGIC64}. X-Git-Tag: VALGRIND_3_14_0~86 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2a459a7d07c9025010bb64e82cec72dded7c3314;p=thirdparty%2Fvalgrind.git arm64 front end: add spec rules for {EQ,NE} after {LOGIC32,LOGIC64}. --- diff --git a/VEX/priv/guest_arm64_helpers.c b/VEX/priv/guest_arm64_helpers.c index 10065d5470..5d0c3c26a2 100644 --- a/VEX/priv/guest_arm64_helpers.c +++ b/VEX/priv/guest_arm64_helpers.c @@ -1317,6 +1317,7 @@ IRExpr* guest_arm64_spechelper ( const HChar* function_name, # define unop(_op,_a1) IRExpr_Unop((_op),(_a1)) # define binop(_op,_a1,_a2) IRExpr_Binop((_op),(_a1),(_a2)) # define mkU64(_n) IRExpr_Const(IRConst_U64(_n)) +# define mkU32(_n) IRExpr_Const(IRConst_U32(_n)) # define mkU8(_n) IRExpr_Const(IRConst_U8(_n)) Int i, arity = 0; @@ -1507,14 +1508,35 @@ IRExpr* guest_arm64_spechelper ( const HChar* function_name, //ZZ unop(Iop_1Uto32, binop(Iop_CmpLT32U, cc_dep2, cc_dep1)) //ZZ ); //ZZ } -//ZZ -//ZZ /*---------------- LOGIC ----------------*/ -//ZZ -//ZZ if (isU32(cond_n_op, (ARMCondEQ << 4) | ARMG_CC_OP_LOGIC)) { -//ZZ /* EQ after LOGIC --> test res == 0 */ -//ZZ return unop(Iop_1Uto32, -//ZZ binop(Iop_CmpEQ32, cc_dep1, mkU32(0))); -//ZZ } + + /*---------------- LOGIC32 ----------------*/ + + if (isU64(cond_n_op, (ARM64CondEQ << 4) | ARM64G_CC_OP_LOGIC32)) { + /* EQ after LOGIC32 --> test res[31:0] == 0 */ + return unop(Iop_1Uto64, + binop(Iop_CmpEQ32, + unop(Iop_64to32, cc_dep1), mkU32(0))); + } + if (isU64(cond_n_op, (ARM64CondNE << 4) | ARM64G_CC_OP_LOGIC32)) { + /* NE after LOGIC32 --> test res[31:0] != 0 */ + return unop(Iop_1Uto64, + binop(Iop_CmpNE32, + unop(Iop_64to32, cc_dep1), mkU32(0))); + } + + /*---------------- LOGIC64 ----------------*/ + + if (isU64(cond_n_op, (ARM64CondEQ << 4) | ARM64G_CC_OP_LOGIC64)) { + /* EQ after LOGIC64 --> test res[63:0] == 0 */ + return unop(Iop_1Uto64, + binop(Iop_CmpEQ64, cc_dep1, mkU64(0))); + } + if (isU64(cond_n_op, (ARM64CondNE << 4) | ARM64G_CC_OP_LOGIC64)) { + /* NE after LOGIC64 --> test res[63:0] != 0 */ + return unop(Iop_1Uto64, + binop(Iop_CmpNE64, cc_dep1, mkU64(0))); + } + //ZZ if (isU32(cond_n_op, (ARMCondNE << 4) | ARMG_CC_OP_LOGIC)) { //ZZ /* NE after LOGIC --> test res != 0 */ //ZZ return unop(Iop_1Uto32,